Abstract: Provided for is a radio frequency identification (RFID) chip to be connected to a printed circuit board (PCB). The RFID chip includes an RFID antenna for receiving a radio wave from an RFID controller. The RFID chip also includes a register driven by induction power generated by the radio wave received by the antenna. The RFID chip writes data indicated by a write request from the RFID controller into the register being driven by the induction power, without power being supplied to the PCB from a host device containing the PCB.

Abstract: Provided for is a radio frequency identification (RFID) chip to be connected to a printed circuit board (PCB). The RFID chip includes an RFID antenna for receiving a radio wave from an RFID controller. The RFID chip also includes a register driven by induction power generated by the radio wave received by the antenna. The RFID chip writes data indicated by a write request from the RFID controller into the register being driven by the induction power, without power being supplied to the PCB from a host device containing the PCB.

Abstract: A controller is provided which monitors/manages information terminals' access to a network within a secured site. A controller of the present invention includes: a storage device for storing security information about at least one or more information terminals received from the information terminals before accessing a network; and a processor for determining whether to permit access of an information terminal to the network based on the security information read from the storage device and access permission criteria on the security information, and generating a control signal for permitting or blocking the access of the information terminal to the network according to the determination result.

Abstract: A control system for controlling access to a protected function of an information device is disclosed. The control system includes a communication device configured to communicate with the information device entering an area. The control system also includes a database configured to store a relationship between the information device and a registered user. The control system further includes a control computer communicably coupled to the communication device. The control computer is configured to identify a user entering the area with the information device. The control computer is also configured to determine whether or not to permit access to the protected function based on the identified user and the registered user for the information device. The control computer is further configured to control the information device via the communication device so as to unlock or lock the protected function based on a result of determination whether or not to permit access.

Abstract: A method for protecting data on a first storage device from unauthorized access is provided. The method includes copying a data map, such as a file allocation table, from the first storage device, on which the data to be protected resides, to a second storage device. A security key is established for the data map. The data map is then deleted from the first storage device, to render unusable the data thereon. The data map is restored to the first storage device upon successful input of the security key.

Abstract: A method for protecting data on a first storage device from unauthorized access is provided. The method includes copying a data map, such as a file allocation table, from the first storage device, on which the data to be protected resides, to a second storage device. A security key is established for the data map. The data map is then deleted from the first storage device, to render unusable the data thereon. The data map is restored to the first storage device upon successful input of the security key.

Abstract: A method for protecting data on a first storage device from unauthorized access is provided. The method includes copying a data map, such as a file allocation table, from the first storage device, on which the data to be protected resides, to a second storage device. A security key is established for the data map. The data map is then deleted from the first storage device, to render unusable the data thereon. The data map is restored to the first storage device upon successful input of the security key.

Abstract: A control system for controlling access to a protected function of an information device is disclosed. The control system includes a communication device configured to communicate with the information device entering an area. The control system also includes a database configured to store a relationship between the information device and a registered user. The control system further includes a control computer communicably coupled to the communication device. The control computer is configured to identify a user entering the area with the information device. The control computer is also configured to determine whether or not to permit access to the protected function based on the identified user and the registered user for the information device. The control computer is further configured to control the information device via the communication device so as to unlock or lock the protected function based on a result of determination whether or not to permit access.

Abstract: A controller is provided which monitors/manages information terminals' access to a network within a secured site. A controller of the present invention includes: a storage device for storing security information about at least one or more information terminals received from the information terminals before accessing a network; and a processor for determining whether to permit access of an information terminal to the network based on the security information read from the storage device and access permission criteria on the security information, and generating a control signal for permitting or blocking the access of the information terminal to the network according to the determination result.

Abstract: It is intended to provide an AD converter capable of increasing its conversion accuracy. An AD converter is equipped with a clock generator which generates a first clock using a second clock and a comparator which includes a comparison circuit for comparing an input signal with a prescribed value in a first period of the first clock and a precharging circuit for precharging, in a second period of the first clock, an internal voltage to a prescribed value for the next comparison operation. The clock generator includes a replica circuit of the precharging circuit of the comparator. In the replica circuit of the precharging circuit, a precharging period from the start to the end of precharging is set as the second period of the first clock.

Abstract: It is intended to provide an AD converter capable of increasing its conversion accuracy. An AD converter is equipped with a clock generator which generates a first clock using a second clock and a comparator which includes a comparison circuit for comparing an input signal with a prescribed value in a first period of the first clock and a precharging circuit for precharging, in a second period of the first clock, an internal voltage to a prescribed value for the next comparison operation. The clock generator includes a replica circuit of the precharging circuit of the comparator. In the replica circuit of the precharging circuit, a precharging period from the start to the end of precharging is set as the second period of the first clock.

Abstract: An oversampling time-to-digital converter includes an input pulse generation circuit generating two pulse signals, a reference pulse generation circuit generating two pulse signals, a swap circuit swapping two pulse signals, a multiplexer selecting an output of the input pulse generation circuit or the swap circuit, a time-to-current conversion circuit outputting two pulse currents in accordance with an output of the multiplexer, a current mirror circuit whose input and output terminals receive the two pulse currents, an integration circuit integrating a differential current between the pulse current connected to the output terminal of the current mirror circuit and an output current of the current mirror circuit, and a comparison circuit comparing an output signal of the integration circuit to a threshold voltage. An output signal of the comparison circuit is given to the swap circuit as a control signal.

Abstract: A time-to-digital conversion circuit for converting a time difference between two input signals to a 1-bit digital value, and adjusting the time difference between the two input signals to generate two output signals includes: a phase comparator configured to compare phases of the two input signals with each other to generate the digital value; a phase selector configured to output one of the two input signals which has a leading phase as a first signal, and the other of the two input signals which has a lagging phase as a second signal; and a delay unit configured to output the first signal with a delay, wherein the time-to-digital conversion circuit outputs the signal output from the delay unit and the second signal as the two output signals.

Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.

Abstract: A time integrator integrates time axis information represented by a phase difference between two signals. The time integrator includes a pulse generation circuit configured to convert a time difference between edges of two input signals to a difference between pulse widths of two pulse signals, and to output the two pulse signals, a load circuit having load characteristics changed by the two pulse signals, and an oscillation circuit coupled to the load circuit, and having an oscillation frequency changing in accordance with the load characteristics of the load circuit. An output of the oscillation circuit is output as a result of time integration.

Abstract: A comparator offset correction device opens an open switch 205 and closes a short-circuit switch 204 in offset correction of a comparator 201. In this state, a controller 203 allows the comparator 201 to repeat, more than once, the operation of comparing reference voltages 101 input to two input terminals with each other. The filter 202 outputs a frequency signal obtained by smoothing a plurality of comparison results. Based on the frequency signal from the filter 202, the controller 203 outputs a threshold value control signal to the comparator 201 so that the ratio of a high-level voltage to a low-level voltage in the results of the comparison in the comparator 201 is 50%. Thus, even when a current which will be input may differ from a current which is currently input due to, for example, the influence of noise, the threshold value offset amount is normally corrected.

Abstract: A storage device started when connected to a computer so as to be able to communicate. The storage device includes: an interface for controlling communication with the computer, a data storage unit for storing data received from the computer via the interface, a radio signal processing unit for receiving radio signals including ID information at a predetermined timing and for authenticating the received ID information, and a control unit for encrypting data using the authenticated ID information as a key, for sending the encrypted data to a data storage unit, and for disabling communication with the computer via the interface when radio signals including the authenticated ID information are not received by the radio signal processing unit within a predetermined period of time.

Abstract: An edge detector includes flip-flops receiving phase signals of a ring oscillator, a resetter canceling the reset states of the flip-flops at the edge timing of an input signal, and a logical operator performing a logical operation on output signals of the flip-flops. A phase state detector detects a phase state of the ring oscillator occurring at the edge timing of the input signal based on the output signals of the flip-flops. A time-to-digital converter converts an edge interval between the input signal and an output signal of the logical operator into a digital value. A latch latches a value of a counter counting the number of cycles of an output signal of the ring oscillator, at the edge timing of the input signal. An operator calculates a digital value of a received signal from output signals of the latch, the phase state detector, and the time-to-digital converter.

Abstract: A time integrator integrates time axis information represented by a phase difference between two signals. The time integrator includes a pulse generation circuit configured to convert a time difference between edges of two input signals to a difference between pulse widths of two pulse signals, and to output the two pulse signals, a load circuit having load characteristics changed by the two pulse signals, and an oscillation circuit coupled to the load circuit, and having an oscillation frequency changing in accordance with the load characteristics of the load circuit. An output of the oscillation circuit is output as a result of time integration.