Patents by Inventor Masaru Saito

Masaru Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170204549
    Abstract: A sewing machine includes a vertical shuttle and a middle shuttle presser disposed at a front side of the vertical shuttle. The sewing machine includes a presser frame, an optical upper thread detector and a stitch skipping detection processor. The presser frame is movably supported between a pressing position at which the middle shuttle presser is pressed and a retract position separated from the pressing position. The optical upper thread detector is provided at the presser frame and is configured to detect passage of an upper thread using detecting light which passes through passage portions formed in the middle shuttle presser and which crosses a front side of a bobbin case of the vertical shuttle. The stitch skipping detection processor is configured to determine whether the passage of the upper thread is present based on an amount of received light of the detecting light from the upper thread detector.
    Type: Application
    Filed: January 12, 2017
    Publication date: July 20, 2017
    Applicant: JUKI CORPORATION
    Inventors: Masaru SAITO, Etsuo NEMOTO, Hiroyuki TANAKA, Kimihiro YOKOSE
  • Patent number: 9711659
    Abstract: A semiconductor device includes a first conductive type first main electrode region, a first conductive type drift region which makes contact with the first main electrode region, a first conductive type second main electrode region which makes contact with the drift region, a second conductive type well region which is provided in a part of a surface layer portion of the drift region and to which a reference potential is applied, and a first conductive type potential extracting region which is provided in a surface layer portion of the well region and to which the reference potential is applied. The well region serves as a base region which controls a current flowing between the potential extracting region and the drift region. Thus, it is possible to provide a novel semiconductor device which is high in reliability while the increase of the chip size can be suppressed.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: July 18, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Taichi Karino, Masaru Saito, Masaharu Yamaji, Osamu Sasaki
  • Publication number: 20170201124
    Abstract: A contactless electric power supply device includes: a supply coil provided on a supply side device; a high frequency power source circuit that applies high frequency voltage to the supply coil; a receiver coil provided on a receiver side device that is arranged facing the supply side device, the receiver coil receiving high frequency electric power by contactless electric power supply via electromagnetic coupling with the supply coil; a receiver circuit that converts the high frequency electric power received by the receiver coil and supplies power to an electric load of the supply side device; and a supplementary coil provided on the supply side device, the supplementary coil interlinking with at least a portion of a magnetic circuit that electromagnetically couples the supply coil and the receiver coil.
    Type: Application
    Filed: July 16, 2014
    Publication date: July 13, 2017
    Applicant: FUJI MACHINE MFG. CO., LTD.
    Inventors: Masaru SAITO, Shinji TAKIKAWA
  • Publication number: 20170163090
    Abstract: An electric power supply device for supplying electric power from a supply side device to a receiver side device including a mechanism section that operates intermittently with a drive voltage and a receiver side control section that controls an operation of the mechanism section with a control voltage that is lower than the drive voltage, the electric power supply device including: a regulator section, which is provided on the receiver side device, that converts a received voltage received via an electric power supply into the control voltage; a supply voltage adjusting section, which is provided on the supply side device, that adjustably supplies the received voltage; and a supply side control section, which is provided on the supply side device, that controls the received voltage by controlling the supply voltage adjusting section.
    Type: Application
    Filed: July 17, 2014
    Publication date: June 8, 2017
    Applicant: FUJI MACHINE MFG. CO., LTD.
    Inventors: Shinji TAKIKAWA, Masaru SAITO
  • Patent number: 9667242
    Abstract: A semiconductor substrate of a first conductivity type having a first region of a second conductivity type formed in a surface thereof; an insulating film on the semiconductor substrate; a primary wiring line connected to the first region and configured to receive a voltage from outside; a plurality of diodes connected in series on the insulating film and having a spiral shape generally centering around the first region in a plan view, the diodes having one end of the series thereof connected to the primary wiring line and serving as a cathode; a resistor voltage divider having one end connected to another end of the series of diodes; a first connection wiring line connected to another end of the resistor voltage divider; and a second connection wiring line connected to a midpoint between the another end of the series of diodes and the another end of the resistor voltage divider.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: May 30, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masaru Saito
  • Patent number: 9660014
    Abstract: A semiconductor device includes: a semiconductor substrate; and a thin film resistor formed over an upper surface of the semiconductor substrate, the thin film resistor including first thin film resistor units and second thin film resistor units alternately connected in series, each of the first thin film resistor units having an elongated main portion and end portions that are connected to the elongated main portion, the end portions each forming a U-shape together with the elongated main portion in a plan view, and respectively overlapping with two of the second thin film resistor units that are adjacent to and connected to the first thin film resistor unit in series.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: May 23, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Masaru Saito
  • Patent number: 9461115
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: October 4, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Masaru Saito, Koji Sonobe
  • Publication number: 20160276425
    Abstract: A semiconductor device includes: a semiconductor substrate; and a thin film resistor formed over an upper surface of the semiconductor substrate, the thin film resistor including first thin film resistor units and second thin film resistor units alternately connected in series, each of the first thin film resistor units having an elongated main portion and end portions that are connected to the elongated main portion, the end portions each forming a U-shape together with the elongated main portion in a plan view, and respectively overlapping with two of the second thin film resistor units that are adjacent to and connected to the first thin film resistor unit in series.
    Type: Application
    Filed: February 4, 2016
    Publication date: September 22, 2016
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Masaru SAITO
  • Publication number: 20160133704
    Abstract: A semiconductor device includes a first conductive type first main electrode region, a first conductive type drift region which makes contact with the first main electrode region, a first conductive type second main electrode region which makes contact with the drift region, a second conductive type well region which is provided in a part of a surface layer portion of the drift region and to which a reference potential is applied, and a first conductive type potential extracting region which is provided in a surface layer portion of the well region and to which the reference potential is applied. The well region serves as a base region which controls a current flowing between the potential extracting region and the drift region. Thus, it is possible to provide a novel semiconductor device which is high in reliability while the increase of the chip size can be suppressed.
    Type: Application
    Filed: October 5, 2015
    Publication date: May 12, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Taichi KARINO, Masaru SAITO, Masaharu YAMAJI, Osamu SASAKI
  • Publication number: 20160104724
    Abstract: A semiconductor substrate of a first conductivity type having a first region of a second conductivity type formed in a surface thereof; an insulating film on the semiconductor substrate; a primary wiring line connected to the first region and configured to receive a voltage from outside; a plurality of diodes connected in series on the insulating film and having a spiral shape generally centering around the first region in a plan view, the diodes having one end of the series thereof connected to the primary wiring line and serving as a cathode; a resistor voltage divider having one end connected to another end of the series of diodes; a first connection wiring line connected to another end of the resistor voltage divider; and a second connection wiring line connected to a midpoint between the another end of the series of diodes and the another end of the resistor voltage divider.
    Type: Application
    Filed: September 3, 2015
    Publication date: April 14, 2016
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Masaru SAITO
  • Publication number: 20160046969
    Abstract: Provided is a method for producing 5-aminolevulinic acid or a salt thereof at a high yield using 5-aminolevulinic acid-producing microorganisms. The method for producing 5-aminolevulinic acid or a salt thereof comprises culturing 5-aminolevulinic acid-producing microorganisms in a medium comprising one or more components selected from the group consisting of L-arginine, glutamic acid, and a salt thereof. The content of glutamic acid or the salt thereof is from 42 to 100 mM in the medium as the glutamic acid.
    Type: Application
    Filed: March 19, 2014
    Publication date: February 18, 2016
    Applicant: COSMO OIL CO., LTD.
    Inventors: Masaru SAITO, Taishi YAMAMOTO, Haruki KAWANO
  • Publication number: 20150311197
    Abstract: A semiconductor device has a configuration wherein a resistor that restricts overvoltage is inserted between an input terminal and the drain of JFETs, and the resistor is disposed on the JFETs. Also, the resistor is formed contiguously and integrally with a spiral form high breakdown voltage high resistance element that configures a resistive voltage divider circuit.
    Type: Application
    Filed: July 6, 2015
    Publication date: October 29, 2015
    Inventor: Masaru SAITO
  • Publication number: 20150228641
    Abstract: Aspects of the invention can include a semiconductor device, control IC for switching power supply and switching power supply unit, which allow input voltage detecting function to be realized without resistor-voltage dividing circuit. An npn-type element consisting of p-type region, collector region and emitter region is included inside of drain region of starting element. On a first interlayer insulating film, aspects of the invention can provide collector electrode wiring of npn-type element, emitter-drain electrode wiring serving as both emitter electrode wiring of npn-type electrode and drain electrode wiring of starting element, source electrode wiring of starting element, and gate electrode wiring of starting element. A first metal wiring can serve both as input terminal of starting element and input terminal of npn-type element is connected to collector electrode wiring. The npn-type element can function as input voltage detecting means for detecting input voltage drop applied to the first wiring.
    Type: Application
    Filed: January 7, 2015
    Publication date: August 13, 2015
    Inventor: Masaru SAITO
  • Patent number: 8860145
    Abstract: A semiconductor device incorporates a resistor on a structure that uses diffusion layers for sustaining the breakdown voltage thereof to realizes a very resistive element that exhibits a high breakdown voltage and high electrical resistance, includes a spiral very resistive element buried in an interlayer insulator film. A first end of the very resistive element is connected to a drain electrode wiring and the second end of the very resistive element is grounded. An intermediate point of the very resistive element is connected to ae voltage comparator of a control IC. The semiconductor device according to the invention facilitates reducing the components parts costs, assembly costs and size of a switching power supply that includes a very resistive element.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: October 14, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Masaru Saito
  • Patent number: 8680622
    Abstract: A semiconductor device incorporates a resistor on a structure that uses diffusion layers for sustaining the breakdown voltage thereof to realizes a very resistive element that exhibits a high breakdown voltage and high electrical resistance, includes a spiral very resistive element buried in an interlayer insulator film. A first end of the very resistive element is connected to a drain electrode wiring and the second end of the very resistive element is grounded. An intermediate point of the very resistive element is connected to ae voltage comparator of a control IC. The semiconductor device according to the invention facilitates reducing the components parts costs, assembly costs and size of a switching power supply that includes a very resistive element.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: March 25, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Masaru Saito
  • Publication number: 20120319177
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Application
    Filed: August 27, 2012
    Publication date: December 20, 2012
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Masaru SAITO, Koji SONOBE
  • Patent number: 8283705
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: October 9, 2012
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Masaru Saito, Koji Sonobe
  • Publication number: 20110228575
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 22, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Masaru SAITO, Koji SONOBE
  • Patent number: 7982248
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Grant
    Filed: March 24, 2007
    Date of Patent: July 19, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Masaru Saito, Koji Sonobe
  • Patent number: 7687385
    Abstract: The invention provides a semiconductor device exhibiting a stable and high breakdown voltage, which is manufactured at a low manufacturing cost. The semiconductor device of the invention includes an n-type silicon substrate; a p-type base region in the surface portion of substrate; an n-type drain region in the surface portion of n-type substrate; a p-type offset region in the surface portion of n-type substrate; an n-type source region in the surface portion of p-type base region; a p-type contact region in the surface portion of p-type base region; a gate electrode above the extended portion of p-type base region extending between n-type source region and n-type substrate (or p-type offset region), with a gate insulation film interposed therebetween; an insulation film on gate electrode and p-type offset region; a source electrode on n-type source region; and a drain electrode on n-type drain region.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: March 30, 2010
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Kazuo Matsuzaki, Naoto Fujishima, Akio Kitamura, Gen Tada, Masaru Saito