Patents by Inventor Masaru Sugimoto
Masaru Sugimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6930332Abstract: A light emitting device that can provide enhanced heat radiation as well as allowing light from a light emitting diode (LED) chip to be efficiently extracted out of the device. This light emitting device includes a metal plate (11) that is made of aluminum. The metal plate (11) has a projection (11a) projecting forward. The projection (11a) has a front side provided with a housing recess (11b). An LED chip (1) is mounted on the bottom of the housing recess (11b) so that it is thermally coupled to the metal plate (11), thus allowing heat to be radiated efficiently. A printed circuit board (12), having a grass epoxy substrate to be joined to the front surface of the metal plate (11), is provided with an insertion hole (13) into which the projection (11a) is inserted. The LED chip (1) and a bonding wire (W) are encapsulated in a transparent resin seal portion (50).Type: GrantFiled: August 28, 2002Date of Patent: August 16, 2005Assignee: Matsushita Electric Works, Ltd.Inventors: Takuma Hashimoto, Masaru Sugimoto, Hideyoshi Kimura, Eiji Shiohama
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Patent number: 6874910Abstract: A light source apparatus having a radiator plate having thermally conductive properties and an insulating member coupled to at least one side of the radiator plate having a through hole provided in a side thereof facing the radiator plate. The light source apparatus further including a LED chip installed and thermally coupled to an exposed portion of the radiator plate facing the through hole, an extension inwardly projecting at the through hole from the radiator plate end of the insulating member, and a wiring pattern provided on the insulating member electrically isolated by the insulating member from the radiator plate. The light source apparatus also including bonding wires electrically connecting portions of the wiring pattern on the extension and the electrodes of the LED chip, and a light-transmissive sealing material filling the through hole for entirely encapsulating the LED chip and the bonding wires.Type: GrantFiled: December 3, 2001Date of Patent: April 5, 2005Assignee: Matsushita Electric Works, Ltd.Inventors: Masaru Sugimoto, Eiji Shiohama, Hideyoshi Kimura, Takuma Hashimoto, Toshiyuki Suzuki, Kazuya Nakagawa, Mitsuru Kobayashi, Jiro Hashizume
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Publication number: 20040190304Abstract: A light-emitting device (10) using an LED is proposed. This light-emitting device (10) is provided with a packaging substrate (1), a light-emitting element (2) which is mounted on this packaging substrate (1) with its face down, a fluorescent member (3) that is arranged face to face with a light-extracting surface (S) of the light-emitting element (2) without contacting the light-emitting element (2) and an optical member (4) which receives light that has been emitted from the light-emitting element (2) and made incident thereon through the fluorescent member (3), and aligns the incident light toward the outside of the device. Light, emitted from the light-emitting element (2), is made incident on the fluorescent member (3) to excite the fluorescent material so that the fluorescent material re-emits light having a wavelength different from that of the incident light.Type: ApplicationFiled: January 23, 2004Publication date: September 30, 2004Inventors: Masaru Sugimoto, Masao Yamaguchi, Takuma Hashimoto, Koji Nishioka, Ryoji Yokotani, Hideyoshi Kimura, Tadashi Murakami, Eiji Shiohama
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Patent number: 6796027Abstract: A method of efficiently manufacturing a printed wiring board is provided. In this method, a metal thin film is formed on a substrate having a projection. Then, an initial circuit pattern is formed on the substrate by patterning the metal thin film. The initial circuit pattern comprises first and second circuit patterns isolated from each other and a conductive layer formed on the projection to make a temporary electrical connection between the first and second circuit patterns. Electroplating is performed by the passage of electric current through the initial circuit pattern to form an additional metal film on the initial circuit pattern. After the electroplating, the conductive layer on the projection is removed to provide electrical insulation between the first and second circuit patterns.Type: GrantFiled: May 17, 2002Date of Patent: September 28, 2004Assignee: Matsushita Electric Works, Ltd.Inventors: Toshiyuki Suzuki, Kazuya Nakagawa, Mitsuru Kobayashi, Eiji Shiohama, Masaru Sugimoto, Hideyoshi Kimura, Takuma Hashimoto
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Publication number: 20040113642Abstract: The interface circuit includes n buffer circuits, switches for connecting an external pin of a tester to input nodes of n buffer circuits and connecting output nodes of n buffers respectively to n DUTs when a signal is provided from the tester to n DUTs, and successively connecting n DUTs to the external pin of the tester by a prescribed time period when voltage-ampere characteristics of n DUTs are measured. Therefore the number of devices that can be measured by the tester at a time can be increased by n times. As a result, the test cost can be reduced and the test accuracy can be improved.Type: ApplicationFiled: June 17, 2003Publication date: June 17, 2004Applicant: Renesas Technology Corp.Inventors: Masaru Sugimoto, Teruhiko Funakura, Hidekazu Nagasawa
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Publication number: 20040065894Abstract: A light emitting device that can provide enhanced heat radiation as well as allowing light from a light emitting diode (LED) chip to be efficiently extracted out of the device. This light emitting device includes a metal plate (11) that is made of aluminum. The metal plate (11) has a projection (11a) projecting forward. The projection (11a) has a front side provided with a housing recess (11b). An LED chip (1) is mounted on the bottom of the housing recess (11b) so that it is thermally coupled to the metal plate (11), thus allowing heat to be radiated efficiently. A printed circuit board (12), having a grass epoxy substrate to be joined to the front surface of the metal plate (11), is provided with an insertion hole (13) into which the projection (11a) is inserted. The LED chip (1) and a bonding wire (W) are encapsulated in a transparent resin seal portion (50).Type: ApplicationFiled: July 22, 2003Publication date: April 8, 2004Inventors: Takuma Hashimoto, Masaru Sugimoto, Hideyoshi Kimura, Eiji Shiohama
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Publication number: 20040012958Abstract: A light emitting device comprising an LED chip including an n-type semiconductor layer (3) formed on a light-transmissive substrate (2), a p-type semiconductor layer (5) formed on the n-type semiconductor layer (3), and electrodes (6 and 7) that are provided at the side where the semiconductor layers are formed and that are connected to the respective layers. The LED chip is mounted face down on a mounting board (8). The electrodes (6 and 7) are configured and arranged to be flat so that the whole light-emitting surface of the LED chip (1) can emit light with a substantially uniform intensity. At least one of the electrodes functions as a light reflector. The electrodes have respective feeding points (15 and 16). The electrode provided on the semiconductor layer adjacent to the light-transmissive substrate (2) is tapered with distance from its feeding point. This structure can provide increased light emission area in the LED chip (1), thus enhancing the luminous efficiency and the light extraction efficiency.Type: ApplicationFiled: May 7, 2003Publication date: January 22, 2004Inventors: Takuma Hashimoto, Masaru Sugimoto, Hideyoshi Kimura, Eiji Shiohama, Ikko Kuzuhara, Sigenari Takami
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Publication number: 20030189830Abstract: A light source apparatus which is improved in the efficiency of light emission thus to increase the operating life and the mechanical strength and a method of producing the same are provided.Type: ApplicationFiled: April 14, 2003Publication date: October 9, 2003Inventors: Masaru Sugimoto, Eiji Shiohama, Hideyoshi Kimura, Takuma Hashimoto, Toshiyuki suzuki, Kazuya Nakagawa, Mitsuru Kobayashi, Jiro Hashizume
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Patent number: 6546525Abstract: An LSI testing apparatus of the invention comprises: a plurality of pins P1, P2, . . . PN; function units 10, 11 and 12 which supply the pins with LSI testing signals, which have functions for making judgments on tests, and which are furnished for each of the pins; and clock mask function units 15A and 15B furnished on the input side of each function unit. Upon testing, any unused pin and function are detected so as to mask the clock mask function unit corresponding to the detected pin and function, whereby power dissipation is reduced in terms of unused pins and functions.Type: GrantFiled: January 18, 2001Date of Patent: April 8, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masaru Sugimoto, Yasuhide Nakase, Teruhiko Funakura
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Publication number: 20020172019Abstract: A method of efficiently manufacturing a printed wiring board is provided. In this method, a metal thin film is formed on a substrate having a projection. Then, an initial circuit pattern is formed on the substrate by patterning the metal thin film. The initial circuit pattern comprises first and second circuit patterns isolated from each other and a conductive layer formed on the projection to make a temporary electrical connection between the first and second circuit patterns. Electroplating is performed by the passage of electric current through the initial circuit pattern to form an additional metal film on the initial circuit pattern. After the electroplating, the conductive layer on the projection is removed to provide electrical insulation between the first and second circuit patterns.Type: ApplicationFiled: May 17, 2002Publication date: November 21, 2002Applicant: MATSUSHITA ELECTRIC WORKS, LTD.Inventors: Toshiyuki Suzuki, Kazuya Nakagawa, Mitsuru Kobayashi, Eiji Shiohama, Masaru Sugimoto, Hideyoshi Kimura, Takuma Hashimoto
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Publication number: 20020007479Abstract: An LSI testing apparatus of the invention comprises: a plurality of pins P1, P2, . . . PN; function units 10, 11 and 12 which supply the pins with LSI testing signals, which have functions for making judgments on tests, and which are furnished for each of the pins; and clock mask function units 15A and 15B furnished on the input side of each function unit. Upon testing, any unused pin and function are detected so as to mask the clock mask function unit corresponding to the detected pin and function, whereby power dissipation is reduced in terms of unused pins and functions.Type: ApplicationFiled: January 18, 2001Publication date: January 17, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Masaru Sugimoto, Yasuhide Nakase, Teruhiko Funakura
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Publication number: 20020006040Abstract: An LED luminaire is formed such that a plurality of LED chips are disposed three-dimensionally on an MID (molded interconnection device) substrate in a rectangular plate shape, by mounting three LED chips on bottom face of respective dents provided lengthwise and crosswise in one surface of the MID substrate, the LED chips including at least two types diffferent in luminous color, desirably three types of red, blue and green colors. Any optional light distribution characteristic is made thereby easily obtainable depending on a configuration of the substrate, luminaire module can be thinned, and such delicate color difference as white color and day-light color of luminescent lamps is enabled by mixing the luminous colors of the respective LED chips.Type: ApplicationFiled: June 29, 2001Publication date: January 17, 2002Inventors: Kazuo Kamada, Shoichi Koyama, Nobuyuki Asahi, Toshiyuki Suzuki, Eiji Shiohama, Masaru Sugimoto, Shohei Yamamoto, Jiro Hashizume, Taishi Akiniwa, Takashi Tanaka
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Patent number: 6331063Abstract: An LED luminaire is formed such that a plurality of LED chips are disposed three-dimensionally on an MID (molded interconnection device) substrate in a rectangular plate shape, by mounting three LED chips on bottom face of respective dents provided lengthwise and crosswise in one surface of the MID substrate, the LED chips including at least two types mutually diffferent in luminous color, desirably three types of red, blue and green colors. Any optional light distribution characteristic is made thereby easily obtainable depending on a configuration of the substrate, luminaire module can be thinned, and such delicate color difference as white color and day-light color of luminescent lamps is enabled by mixing the luminous colors of the respective LED chips.Type: GrantFiled: November 25, 1998Date of Patent: December 18, 2001Assignee: Matsushita Electric Works, Ltd.Inventors: Kazuo Kamada, Shoichi Koyama, Nobuyuki Asahi, Toshiyuki Suzuki, Eiji Shiohama, Masaru Sugimoto, Shohei Yamamoto, Jiro Hashizume, Taishi Akiniwa, Takashi Tanaka
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Patent number: 6281698Abstract: A waveform and timing generation circuit 28, a skew circuit 30, and a pin driver 32 are provided for each of a plurality of I/O terminals 22 corresponding respectively to a plurality of pins furnished on an LSI. A relay 44 and a loop control circuit 46 are provided to feed an output signal of the pin driver 32 back to an input side of the waveform and timing generation circuit 28. A skew board 100 is used to adjust the skew circuit 30, whereby the initial timing calibration is carried out. With the skew circuit 30 thus adjusted, oscillations are generated over the feedback path, and the number of resulting pulses is counted (to obtain pulse cycles). When the skew circuit 30 is adjusted so that the pulse count above matches the number of pulses generated during oscillations, a simplified form of timing calibration is implemented.Type: GrantFiled: December 20, 1999Date of Patent: August 28, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Masaru Sugimoto, Yasuhide Nakase, Tomohiro Nishimura, Teruhiko Funakura
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Publication number: 20010006184Abstract: A welding wire holder includes a container body having an annular space defined therein for receiving therein a coil of welding wire, and a coil keeper for keeping the coil of welding wire stably in position against floating when the welding wire is pulled out from the container body in an upward direction. The coil keeper is comprised of a layer of spheroidal members spread over the entire area of an upper surface of the coil of welding wire received in the annular space. The spheroidal members thus spread produce a distributed load acting on the upper surface of the coil of welding wire with uniform distribution of load.Type: ApplicationFiled: December 19, 2000Publication date: July 5, 2001Applicant: Honda Giken Kogyo Kabushiki Kaisha andInventors: Hideaki Ohike, Masaru Sugimoto
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Patent number: 5283232Abstract: A method for producing an oxide superconducting composite wire is disclosed, which comprises the steps of: (a) molding a powdered oxide superconductor material to form a wire; (b) heat treating the wire in an oxygen atmosphere thereby forming the wire into an oxide superconducting member; (c) forming a non-oxidizing metal intermediate layer on a surface of the oxide superconducting member; (d) bundling a plurality of the oxide superconducting members containing the intermediate layer; (e) inserting the bundled oxide superconducting members into an oxidizing metal support tube; and (f) drawing the product of step (e) to reduce its diameter and heat-treating it.Type: GrantFiled: August 20, 1992Date of Patent: February 1, 1994Assignee: Fujikura Ltd.Inventors: Osamu Kohno, Yoshimitsu Ikeno, Nobuyuki Sadakata, Masaru Sugimoto, Mikio Nakagawa
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Patent number: 5168127Abstract: A method of producing an oxide superconducting wire. A non-oxidizing metal layer is formed between an oxide superconducting material and an oxidizing metal support in order to prevent oxygen from being taken away from the oxide superconducting material by the oxidizing metal support during a subsequent heat treatment for producing an oxide superconductor to thereby obtaining a wire composite. The wire composite is then heated to produce the oxide superconductor.Type: GrantFiled: February 6, 1992Date of Patent: December 1, 1992Assignee: Fujikura Ltd.Inventors: Osamu Kohno, Yoshimitsu Ikeno, Nobuyuki Sadakata, Masaru Sugimoto, Mikio Nakagawa
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Patent number: 5108986Abstract: The invention relates to a superconductor manufacturing method and a superconductor manufactured by the method. More particularly, the invention is concerned wih an oxide superconductor of lamellar perovskite type and a method of manufacturing the same having extemely high critical temperature and critical current density as compared with conventional alloy superconductors or intermetallic compound superconductos. The superconductor is expressed byA-B-Cu-OwhereA represents at least one of elements of the group IIIa in the periodic table; andB represents at least one of elements of the group IIa in the periodic table,wherein at least one A and B consists of two elements belonging to the same group.Type: GrantFiled: August 13, 1990Date of Patent: April 28, 1992Assignee: Fujikura Ltd.Inventors: Osamu Kohno, Yoshimitsu Ikeno, Nobuyuki Sadakata, Masaru Sugimoto, Mikio Nakagawa, Shin'ya Aoki
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Patent number: 5045527Abstract: A method of producing a superconductor including a superconductive oxide. At least one material is pressed for forming a filling material, the at least one material being selected from the group consisting of a starting material powder of the superconductive oxide, a powder of the superconductive oxide and a compact made of the starting material powder and/or the superconductive oxide powder, for forming a filling material. The filling material is charged into a metallic pipe to form a preform. The preform is moved along an axis thereof. During moving, the preform is swaged perpendicularly to the axis thereof to form a composite having a metallic sheath, made of the metallic pipe, and a core sheathed with the metallic sheath. The core of the composite is heated for producing the superconductive oxide.Type: GrantFiled: October 3, 1988Date of Patent: September 3, 1991Assignee: Fujikura Ltd.Inventors: Yoshimitsu Ikeno, Osamu Kohno, Kenji Goto, Atsushi Kume, Shin'ya Aoki, Nobuyuki Sadakata, Masaru Sugimoto, Toshio Usui, Mikio Nakagawa, Taichi Yamaguchi
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Patent number: 4965245Abstract: A method of producing a superconducting cable or a coil including an A-B-C-D system superconductor where the A includes an element of group IIIa of the Periodic Table, the B an element of group IIa of the Periodic Table, C copper, D oxygen.Type: GrantFiled: July 15, 1988Date of Patent: October 23, 1990Assignee: Fujikura Ltd.Inventors: Masaru Sugimoto, Osamu Kohno, Yoshimitsu Ikeno, Nobuyuki Sadakata, Mikio Nakagawa, Shin'ya Aoki, Masayuki Tan, Ryuichi Okiai, Syotaro Yoshida, Masakazu Hasegawa, Hiroshi Yamanouchi