Abstract: A semiconductor device includes switching devices in an epitaxial layer on a silicon substrate. Diffusion regions of different conductivity types are provided. In some instances, an electrode layer makes ohmic contact with the epitaxial layer and extends to, and makes ohmic contact with, a diffusion region electrically connected to the epitaxial layer. In some instances, diffusion regions of different conductivity types are arranged alternately one by one outward away from the epitaxial layer side.

Abstract: A semiconductor device including a drain region of a first conductivity type formed on a semiconductor substrate; an element forming region that is provided on the drain region and that has a concave portion reaching the drain region; a gate electrode disposed in the concave portion; a superjunction structure portion that is disposed in the element forming region and that is formed by alternately arranging a drift layer of the first conductivity type penetrated by the concave portion and a resurf layer of a second conductivity type being in contact with the drift layer on the semiconductor substrate; and a base region of the second conductivity type that is disposed on the superjunction structure portion so as to be in contact with the drift layer in the element forming region, that is penetrated by the concave portion, and that faces the gate electrode with the gate insulating film therebetween.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. The semiconductor device includes an n type epitaxial layer in which each region between neighboring trenches becomes a channel, and a plurality of embedded electrodes each of which is formed on an inner surface of each trench via a silicon oxide film. By blocking each region between neighboring trenches with every depletion layer formed around each of trenches, current flowing through each region between the neighboring trenches is interrupted. By deleting every depletion layer formed around each of the trenches, current can flow through each region between the neighboring trenches.

Abstract: Provided is a semiconductor device having a high switching speed. A semiconductor device is provided with an n-type epitaxial layer having a plurality of trenches arranged at prescribed intervals; an embedded electrode formed on an inner surface of the trench through a silicon oxide film to embed each trench; and a metal layer, which is capacitively coupled with the embedded electrode by being arranged above the embedded electrode through a silicon oxide film. In the semiconductor device, a region between the adjacent trenches operates as a channel (current path). A current flowing in the channel is interrupted by covering the region with a depletion layer formed at the periphery of the trenches, and the current is permitted to flow through the channel by eliminating the depletion layer at the periphery of the trenches.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage (12) is interrupted, while a part of the depletion layer (14) formed around the trench (3) is deleted so that the current passage (12) is opened. In a region (2b), a junction portion (8) between the N type epitaxial layer (2) and a P+ type diffusion region (7) makes a Zener diode (8).

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced based on a new principle of operation. In the semiconductor device, if an embedded electrode is at negative potential, a depletion layer is formed from a trench to a neighboring trench so that a channel is turned off. If the embedded electrode is at a positive potential, the depletion layer is not formed in every region between the neighboring trenches so that the channel is turned on.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage (12) is interrupted, while a part of the depletion layer (14) formed around the trench (3) is deleted so that the current passage (12) is opened. In a region (2b), a junction portion (8) between the N type epitaxial layer (2) and a P+ type diffusion region (7) makes a Zener diode (8).

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. The semiconductor device includes an n type epitaxial layer in which each region between neighboring trenches becomes a channel, and a plurality of embedded electrodes each of which is formed on an inner surface of each trench via a silicon oxide film. The plurality of embedded electrodes include two types of embedded electrodes to which voltages are applied separately. By blocking each region between neighboring trenches with a depletion layer formed around every trench, current flowing through each region between the neighboring trenches is interrupted. By deleting the depletion layer formed around the trench filled with the embedded electrode, current can flow through each region between neighboring trenches.

Abstract: Provided is a semiconductor device which can reduce on-resistance by improving hole mobility of a channel region. A trench gate type MOSFET (semiconductor device) is provided with a p+-type silicon substrate whose crystal plane of a main surface is a (110) plane; an epitaxial layer formed on the silicon substrate; a trench, which is formed on the epitaxial layer and includes a side wall parallel to the thickness direction (Z direction) of the silicon substrate; a gate electrode formed inside the trench through a gate dielectric film; an n-type channel region formed along the side wall of the trench; and a p+-type source region and a p?-type drain region which are formed to sandwich the channel region in the thickness direction (Z direction) of the silicon substrate. The trench is formed to have the crystal plane of the side wall as a (110) plane.

Abstract: A semiconductor device including a drain region of a first conductivity type formed on a semiconductor substrate; an element forming region that is provided on the drain region and that has a concave portion reaching the drain region; a gate electrode disposed in the concave portion; a superjunction structure portion that is disposed in the element forming region and that is formed by alternately arranging a drift layer of the first conductivity type penetrated by the concave portion and a resurf layer of a second conductivity type being in contact with the drift layer on the semiconductor substrate; and a base region of the second conductivity type that is disposed on the superjunction structure portion so as to be in contact with the drift layer in the element forming region, that is penetrated by the concave portion, and that faces the gate electrode with the gate insulating film therebetween.

Abstract: A semiconductor device including a drain region of a first conductivity type formed on a semiconductor substrate; an element forming region that is provided on the drain region and that has a concave portion reaching the drain region; a gate electrode disposed in the concave portion; a superjunction structure portion that is disposed in the element forming region and that is formed by alternately arranging a drift layer of the first conductivity type penetrated by the concave portion and a resurf layer of a second conductivity type being in contact with the drift layer on the semiconductor substrate; and a base region of the second conductivity type that is disposed on the superjunction structure portion so as to be in contact with the drift layer in the element forming region, that is penetrated by the concave portion, and that faces the gate electrode with the gate insulating film therebetween.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage (12) is interrupted, while a part of the depletion layer (14) formed around the trench (3) is deleted so that the current passage (12) is opened. In a region (2b), a junction portion (8) between the N type epitaxial layer (2) and a P+ type diffusion region (7) makes a Zener diode (8).

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage (12) is interrupted, while a part of the depletion layer (14) formed around the trench (3) is deleted so that the current passage (12) is opened. In a region (2b), a junction portion (8) between the N type epitaxial layer (2) and a P+ type diffusion region (7) makes a Zener diode (8).

Abstract: A trench semiconductor device is provided which ensures a reduced turn-on time.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced based on a new principle of operation. In the semiconductor device (1), if an embedded electrode (5) is at negative potential, a depletion layer (11) is formed from a trench (3a) to a neighboring trench so that a channel (10) is turned off. If the embedded electrode is at a positive potential, the depletion layer is not formed in every region between the neighboring trenches so that the channel is turned on.

Abstract: Provided is a semiconductor device having a high switching speed. A semiconductor device (20) is provided with an n-type epitaxial layer (2) having a plurality of trenches (3) arranged at prescribed intervals (b); an embedded electrode (5) formed on an inner surface of the trench (3) through a silicon oxide film (4) to embed each trench (3); and a metal layer (7), which is capacitively coupled with the embedded electrode (5) by being arranged above the embedded electrode (5) through a silicon oxide film (6). In the semiconductor device (20), a region between the adjacent trenches (3) operates as a channel (current path)(11). A current flowing in the channel (11) is interrupted by covering the region with a depletion layer formed at the periphery of the trenches (3), and the current is permitted to flow through the channel (11) by eliminating the depletion layer at the periphery of the trenches (3).

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. The semiconductor device includes an n type epitaxial layer (2) in which each region between neighboring trenches (3) becomes a channel (9), and a plurality of embedded electrodes (5) each of which is formed on an inner surface of each trench (3) via a silicon oxide film (4). The plurality of embedded electrodes (5) include two types of embedded electrodes (5a and 5b) to which voltages are applied separately. By blocking each region between neighboring trenches (3) with a depletion layer (10) formed around every trench (3), current flowing through each region between the neighboring trenches (3) is interrupted. By deleting the depletion layer (10a) formed around the trench (3a) filled with the embedded electrode (5a), current can flow through each region between neighboring trenches (3).

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage (12) is interrupted, while a part of the depletion layer (14) formed around the trench (3) is deleted so that the current passage (12) is opened. In a region (2b), a junction portion (8) between the N type epitaxial layer (2) and a P+ type diffusion region (7) makes a Zener diode (8).

Abstract: Provided is a semiconductor device which can reduce on-resistance by improving hole mobility of a channel region. A trench gate type MOSFET (semiconductor device) is provided with a p+-type silicon substrate whose crystal plane of a main surface is a (110) plane; an epitaxial layer formed on the silicon substrate; a trench, which is formed on the epitaxial layer and includes a side wall parallel to the thickness direction (Z direction) of the silicon substrate; a gate electrode formed inside the trench through a gate dielectric film; an n-type channel region formed along the side wall of the trench; and a p+-type source region and a p?-type drain region which are formed to sandwich the channel region in the thickness direction (Z direction) of the silicon substrate. The trench is formed to have the crystal plane of the side wall as a (110) plane.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced. The semiconductor device includes an n type epitaxial layer (2) in which each region between neighboring trenches (3) becomes a channel (9), and a plurality of embedded electrodes (5) each of which is formed on an inner surface of each trench (3) via a silicon oxide film (4). By blocking each region between neighboring trenches (3) with every depletion layer (10) formed around each of trenches (3), current flowing through each region between the neighboring trenches (3) is interrupted. By deleting every depletion layer (10) formed around each of the trenches (3), current can flow through each region between the neighboring trenches (3).