Patents by Inventor Masaru Takaishi

Masaru Takaishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7642139
    Abstract: A production method for a semiconductor device, including the steps of: forming a semiconductor layer of the first conductivity on the semiconductor substrate; forming a trench in the semiconductor layer, the trench penetrating through the semiconductor layer to reach the semiconductor substrate; filling a filling material in a predetermined bottom portion of the trench, so that a filling material portion is provided in the bottom portion of the trench up to a predetermined upper surface position which is shallower than an interface between the semiconductor substrate and the semiconductor layer; and, after the filling step, introducing an impurity of the second conductivity into a portion of the semiconductor layer exposed to an interior side wall of the trench.
    Type: Grant
    Filed: December 24, 2004
    Date of Patent: January 5, 2010
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Publication number: 20090302379
    Abstract: A trench semiconductor device is provided which ensures a reduced turn-on time.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 10, 2009
    Inventor: Masaru Takaishi
  • Patent number: 7598586
    Abstract: A semiconductor device, including: a semiconductor substrate of a first conductivity; and a semiconductor layer provided on the semiconductor substrate and having a super junction structure including drift layers of the first conductivity and RESURF layers of a second conductivity different from the first conductivity, the drift layers and the RESURF layers being laterally arranged in alternate relation parallel to the semiconductor substrate, the RESURF layers being each provided alongside an interior side wall of a trench penetrating through the semiconductor layer, the drift layers each having an isolation region present between the RESURF layer and the semiconductor substrate to prevent the RESURF layer from contacting the semiconductor substrate.
    Type: Grant
    Filed: December 24, 2004
    Date of Patent: October 6, 2009
    Assignee: ROHM Co., Ltd.
    Inventor: Masaru Takaishi
  • Publication number: 20090050961
    Abstract: A semiconductor device is disclosed which has a shorter turn-on time. The semiconductor device includes an epitaxial layer, two base regions embedded in a surface portion of the epitaxial layer, source regions respectively embedded in the base regions, a drain region including at least a portion of the epitaxial layer excluding the base regions, and a gate electrode provided on the epitaxial layer with the intervention of an insulation film with ends thereof respectively opposed to surfaces of the two base regions. The drain region is arranged so that depletion layers respectively extending from boundaries between the drain region and the two base regions are connected to each other in an OFF state in a portion of the drain region located between the two base regions.
    Type: Application
    Filed: April 11, 2006
    Publication date: February 26, 2009
    Applicant: ROHM CO., LTD.
    Inventor: Masaru Takaishi
  • Patent number: 7399677
    Abstract: A method for manufacturing a semiconductor device including the steps of: forming a hole having a predetermined depth in a semiconductor layer of a first conductivity type in correspondence with a drain region, the semiconductor layer being formed on a semiconductor substrate; forming a diffusion source layer containing impurities of a second conductivity type different from the first conductivity type in the hole; forming a source region of the first conductivity type in a region shallower than the depth of the hole in the semiconductor layer; forming a channel region of the second conductivity type to be disposed between the drain region and the source region in a region deeper than the depth of the source region in the semiconductor layer; and heating the semiconductor substrate to a first temperature after completing the diffusion source layer forming step to diffuse the impurities of the second conductivity type from the diffusion source layer into the channel region, thereby forming a low resistance reg
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: July 15, 2008
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Patent number: 7288815
    Abstract: A semiconductor device (20, 21, 22), including: a channel region (4) of a first conductivity type formed at a surface layer portion of a semiconductor substrate (1); a source region (25) of a second conductivity type which is different from the first conductivity type, the source region (25) being formed at a rim of a trench (17) having a depth sufficient to penetrate through the channel region (4); a drain region (2) of the second conductivity type formed at a region adjacent to a bottom of the trench (17); a gate insulating film (13) formed along an inner side wall of the trench (17); a gate electrode (26, 36) arranged in the trench (17) so as to be opposed to the channel region (4) with the gate insulating film (13) interposed therebetween; a conductive layer (37, 40, 40a, 40b) formed in the trench (17) so as to be nearer to the drain region (2) than the gate electrode (26, 36); and an insulating layer (15) surrounding the conductive layer (37, 40, 40a, 40b) to electrically insulate the conductive layer (3
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: October 30, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Patent number: 7276434
    Abstract: A method for manufacturing a semiconductor device having a semiconductor substrate with a contact hole filled by an aluminum-containing thin film. This manufacturing method includes a step of forming a silicon-containing thin film in a region having a predetermined area including the inner surface of the contact hole on the surface of the semiconductor substrate, an step of forming an aluminum-containing thin film on the surface of the semiconductor substrate on which the silicon-containing thin film is formed, and a step of heating the semiconductor substrate on which the aluminum-containing thin film is formed to such a temperature as to cause silicon to diffuse with respect to aluminum.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: October 2, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Patent number: 7245004
    Abstract: A semiconductor device mountable on a wiring board with the bottom surface being opposed to the wiring board including a semiconductor chip; a mold resin encapsulating the semiconductor chip; a first heat spreader joined to the semiconductor chip on the bottom surface side with both ends protruding from the mold resin, the first heat spreader being capable of being joined to the wiring board at both ends; and a second heat spreader joined to the semiconductor chip on a top surface side with both ends thereof protruding from the mold resin, the second heat spreader being capable of being joined to the wiring board at both ends. One of the heat spreaders is a lead frame electrically connected to the semiconductor chip. The first and second heat spreaders are substantially entirely covered with the mold resin on the bottom surface side and the top surface side, respectively.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: July 17, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Publication number: 20070080399
    Abstract: A semiconductor device, including: a semiconductor substrate of a first conductivity; and a semiconductor layer provided on the semiconductor substrate and having a super junction structure including drift layers of the first conductivity and RESURF layers of a second conductivity different from the first conductivity, the drift layers and the RESURF layers being laterally arranged in alternate relation parallel to the semiconductor substrate, the RESURF layers being each provided alongside an interior side wall of a trench penetrating through the semiconductor layer, the drift layers each having an isolation region present between the RESURF layer and the semiconductor substrate to prevent the RESURF layer from contacting the semiconductor substrate.
    Type: Application
    Filed: December 24, 2004
    Publication date: April 12, 2007
    Inventor: Masaru Takaishi
  • Publication number: 20070069324
    Abstract: A production method for a semiconductor device, including the steps of: forming a semiconductor layer of the first conductivity on the semiconductor substrate; forming a trench in the semiconductor layer, the trench penetrating through the semiconductor layer to reach the semiconductor substrate; filling a filling material in a predetermined bottom portion of the trench, so that a filling material portion is provided in the bottom portion of the trench up to a predetermined upper surface position which is shallower than an interface between the semiconductor substrate and the semiconductor layer; and, after the filling step, introducing an impurity of the second conductivity into a portion of the semiconductor layer exposed to an interior side wall of the trench.
    Type: Application
    Filed: December 24, 2004
    Publication date: March 29, 2007
    Inventor: Masaru Takaishi
  • Publication number: 20070020850
    Abstract: A method for manufacturing a semiconductor device including the steps of: forming a hole having a predetermined depth in a semiconductor layer of a first conductivity type in correspondence with a drain region, the semiconductor layer being formed on a semiconductor substrate; forming a diffusion source layer containing impurities of a second conductivity type different from the first conductivity type in the hole; forming a source region of the first conductivity type in a region shallower than the depth of the hole in the semiconductor layer; forming a channel region of the second conductivity type to be disposed between the drain region and the source region in a region deeper than the depth of the source region in the semiconductor layer; and heating the semiconductor substrate to a first temperature after completing the diffusion source layer forming step to diffuse the impurities of the second conductivity type from the diffusion source layer into the channel region, thereby forming a low resistance reg
    Type: Application
    Filed: August 17, 2006
    Publication date: January 25, 2007
    Inventor: Masaru Takaishi
  • Patent number: 7112843
    Abstract: A method for manufacturing a semiconductor device including the steps of: forming a hole having a predetermined depth in a semiconductor layer of a first conductivity type in correspondence with a drain region, the semiconductor layer being formed on a semiconductor substrate; forming a diffusion source layer containing impurities of a second conductivity type different from the first conductivity type in the hole; forming a source region of the first conductivity type in a region shallower than the depth of the hole in the semiconductor layer; forming a channel region of the second conductivity type to be disposed between the drain region and the source region in a region deeper than the depth of the source region in the semiconductor layer; and heating the semiconductor substrate to a first temperature after completing the diffusion source layer forming step to diffuse the impurities of the second conductivity type from the diffusion source layer into the channel region, thereby forming a low resistance reg
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: September 26, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Publication number: 20060199319
    Abstract: A semiconductor device (20, 21, 22), including: a channel region (4) of a first conductivity type formed at a surface layer portion of a semiconductor substrate (1); a source region (25) of a second conductivity type which is different from the first conductivity type, the source region (25) being formed at a rim of a trench (17) having a depth sufficient to penetrate through the channel region (4); a drain region (2) of the second conductivity type formed at a region adjacent to a bottom of the trench (17); a gate insulating film (13) formed along an inner side wall of the trench (17); a gate electrode (26, 36) arranged in the trench (17) so as to be opposed to the channel region (4) with the gate insulating film (13) interposed therebetween; a conductive layer (37, 40, 40a, 40b) formed in the trench (17) so as to be nearer to the drain region (2) than the gate electrode (26, 36); and an insulating layer (15) surrounding the conductive layer (37, 40, 40a, 40b) to electrically insulate the conductive layer (3
    Type: Application
    Filed: December 12, 2003
    Publication date: September 7, 2006
    Inventor: Masaru Takaishi
  • Publication number: 20060076674
    Abstract: A semiconductor device mountable on a wiring board with the bottom surface being opposed to the wiring board. The semiconductor device includes: a semiconductor chip; a mold resin encapsulating the semiconductor chip; a first heat spreader joined to the semiconductor chip on the bottom surface side with both ends thereof protruding from an edge of the mold resin, the first heat spreader being capable of being joined to the wiring board at the both ends thereof; and a second heat spreader joined to the semiconductor chip on a top surface side with both ends thereof protruding from the edge of the mold resin, the second heat spreader being capable of being joined to the wiring board at the both ends thereof. One of the first and second heat spreaders is a lead frame electrically connected to the semiconductor chip. The first and second heat spreaders are substantially entirely covered with the mold resin on the bottom surface side and the top surface side, respectively.
    Type: Application
    Filed: November 1, 2005
    Publication date: April 13, 2006
    Inventor: Masaru Takaishi
  • Publication number: 20060027861
    Abstract: A semiconductor device including a drain region of a first conductivity type formed on a semiconductor substrate; an element forming region that is provided on the drain region and that has a concave portion reaching the drain region; a gate electrode disposed in the concave portion; a superjunction structure portion that is disposed in the element forming region and that is formed by alternately arranging a drift layer of the first conductivity type penetrated by the concave portion and a resurf layer of a second conductivity type being in contact with the drift layer on the semiconductor substrate; and a base region of the second conductivity type that is disposed on the superjunction structure portion so as to be in contact with the drift layer in the element forming region, that is penetrated by the concave portion, and that faces the gate electrode with the gate insulating film therebetween.
    Type: Application
    Filed: August 3, 2005
    Publication date: February 9, 2006
    Inventor: Masaru Takaishi
  • Patent number: 6965150
    Abstract: A plurality of transistor cells (T) are arranged in the semiconductor layer (4). Ring-shaped p-type layers (1b) and n-type layers (1a) composed of polysilicon film are formed alternately on an insulating layer (6) in an outer side than the plurality of transistor cells (T) (the peripheral portion of chip), thereby forming a protective diode (1). The most outer layer of the protective diode (1) is contacted to the gate wiring (2) composed of metal film such as Al, which is formed circularly on the most external layer, and the most inner layer is contacted to the source wiring composed of metal layer, thereby the protective diode is connected between the gate and source of a transistor. As a result of this, the semiconductor device with the protective diode which has the small series resistance, can be formed without enlarging chip area and by using unoccupied space of chip, and realize protection function sufficiently, can be obtained.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: November 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Syouji Higashida, Masaru Takaishi
  • Patent number: 6890866
    Abstract: A method for manufacturing a semiconductor device having a semiconductor substrate with a contact hole filled by an aluminum-containing thin film. This manufacturing method includes a step of forming a silicon-containing thin film so as to fill the contact hole on the surface of the semiconductor substrate, a step of removing the part of the silicon-containing thin film outside the contact hole, a step of forming an aluminum-containing thin film on the surface of the semiconductor substrate after completing the step of removing the part of the silicon-containing substrate, and a step of heating the semiconductor substrate on which the aluminum-containing thin film is formed to such a temperature as to cause silicon to diffuse with respect to aluminum.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: May 10, 2005
    Assignee: Rohm Co., Ltd.
    Inventor: Masaru Takaishi
  • Publication number: 20040232545
    Abstract: A semiconductor device mountable on a wiring board with the bottom surface being opposed to the wiring board. The semiconductor device includes: a semiconductor chip; a mold resin encapsulating the semiconductor chip; a first heat spreader joined to the semiconductor chip on the bottom surface side, and extending in almost parallel with the bottom surface with both ends thereof protruding from an edge of the mold resin, the first heat spreader being capable of being joined to the wiring board at the both ends thereof; and a second heat spreader joined to the semiconductor chip on a top surface side, and extending in almost parallel with the bottom surface to cross with the first heat spreader with both ends thereof protruding from the edge of the mold resin, the second heat spreader being capable of being joined to the wiring board at the both ends thereof. One of the first and second heat spreaders is a lead frame electrically connected to the semiconductor chip.
    Type: Application
    Filed: March 31, 2004
    Publication date: November 25, 2004
    Inventor: Masaru Takaishi
  • Publication number: 20040191996
    Abstract: A method for manufacturing a semiconductor device including the steps of: forming a hole having a predetermined depth in a semiconductor layer of a first conductivity type in correspondence with a drain region, the semiconductor layer being formed on a semiconductor substrate; forming a diffusion source layer containing impurities of a second conductivity type different from the first conductivity type in the hole; forming a source region of the first conductivity type in a region shallower than the depth of the hole in the semiconductor layer; forming a channel region of the second conductivity type to be disposed between the drain region and the source region in a region deeper than the depth of the source region in the semiconductor layer; and heating the semiconductor substrate to a first temperature after completing the diffusion source layer forming step to diffuse the impurities of the second conductivity type from the diffusion source layer into the channel region, thereby forming a low resistance reg
    Type: Application
    Filed: March 26, 2004
    Publication date: September 30, 2004
    Inventor: Masaru Takaishi
  • Patent number: 6798018
    Abstract: A semiconductor device has a cell region where transistor cells of a trench structure are arranged in a matrix form, in which a recessed trench is formed in a semiconductor layer, a gate oxide film is formed inside the recessed trench, and a gate electrode formed of polysilicon is disposed inside the recessed trench. To have contact with a gate wiring formed of a metal film, a gate pad disposed continuously to the gate electrode is placed inside a recessed part formed in the same depth as the recessed trench. Consequently, many transistor cells of the trench structure are formed in a matrix form. Even in a semiconductor device where the gate wiring formed of a metal film is contacted with the gate electrode, a semiconductor device of a structure allowing gate voltage to be increased sufficiently can be obtained.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: September 28, 2004
    Assignee: Rohm Co., Ltd.
    Inventors: Masaru Takaishi, Koichi Kitaguro, Hiroki Takada