Patents by Inventor Masataka Sato

Masataka Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210060982
    Abstract: Provided is an inkjet printing apparatus that can reduce smears on a back surface of a print result medium by reducing accumulation of ink in a platen while reducing generation of mist. To achieve this, an ink receiving portion of a platen is provided away from a support surface by a predetermined distance, is formed in a mesh shape by laying multiple linear members, and is formed as a guide member that guides the ink received in the ink receiving portion to an ink guide holes.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 4, 2021
    Inventors: Shin Genta, Kazuhiko Sato, Kazuo Suzuki, Yoshinori Nakajima, Masataka Kato, Mitsutoshi Nagamura, Satoshi Azuma, Shingo Nishioka, Sae Mogi
  • Publication number: 20210051056
    Abstract: An operation apparatus for outputting a request to a management apparatus which manages a Network Service (NS) constructed on a NetWork (NW) including a core NW serving as a virtualization area and an access NW serving as a non-virtualization area including: a storage unit configured to store new configuration information obtained by updating NW configuration information indicating an NW configuration including devices disposed on the NW due to a fault of the NS, a catalog which is a template of the NS, a record describing a lifecycle of the NS, and an order for requesting the management apparatus to control the NS; an optimal configuration determination unit configured to determine an optimal configuration of the NS based on the new configuration information, the catalog, the record, and the order; and an order generation unit configured to generate a change order for changing an NS configuration of the NS to the optimal configuration determined by the optimal configuration determination unit.
    Type: Application
    Filed: February 6, 2019
    Publication date: February 18, 2021
    Inventors: Motomu Nakajima, Yuji Soejima, Aiko OI, Kosuke Sakata, Yuichi Suto, Shingo Horiuchi, Masataka Sato, Kimihiko Fukami
  • Patent number: 10923350
    Abstract: The yield of a manufacturing process of a semiconductor device is increased. The mass productivity of a semiconductor device is increased. A semiconductor device is manufactured by forming a first material layer over a substrate; forming a second material layer over the first material layer; and separating the first material layer and the second material layer from each other; and heating the first material layer and the second material layer that are stacked before the separation. The first material layer includes a gas containing hydrogen, oxygen, or hydrogen and oxygen (e.g., water) in a metal oxide, for example. The second material layer includes a resin. The first material layer and the second material layer are separated from each other by a break of a hydrogen bond. Specifically water is separated out at the interface or near the interface, and then adhesion is reduced due to the water present.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: February 16, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masataka Sato, Seiji Yasumoto, Kayo Kumakura, Satoru Idojiri
  • Publication number: 20210031547
    Abstract: An inkjet printing apparatus, comprising a printing head, a carriage having the printing head, a first roller pair disposed upstream of the printing head and configured to nip and convey a printing medium, a second roller pair disposed downstream of the printing head and configured to nip and convey a printing medium, a first ink receiver disposed inside a printing region and configured to receive an ink from the printing head, and a second ink receiver disposed outside the printing region and configured to receive an ink from the printing head, wherein the printing head performs preliminary discharge on the first ink receiver in a first nip state, and performs preliminary discharge on the second ink receiver in a second nip state.
    Type: Application
    Filed: July 23, 2020
    Publication date: February 4, 2021
    Inventors: Masataka Kato, Kazuhiko Sato, Kazuo Suzuki, Toshimitsu Danzuka, Yasunori Fujimoto, Shin Genta, Kazuki Narumi, Tomoki Yamamuro, Hiroto Kango
  • Publication number: 20210020668
    Abstract: A peeling method at low cost with high mass productivity is provided. A silicon layer having a function of releasing hydrogen by irradiation with light is formed over a formation substrate, a first layer is formed using a photosensitive material over the silicon layer, an opening is formed in a portion of the first layer that overlaps with the silicon layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the silicon layer, the silicon layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.
    Type: Application
    Filed: August 3, 2020
    Publication date: January 21, 2021
    Inventors: Shunpei YAMAZAKI, Masataka SATO, Masakatsu OHNO, Seiji YASUMOTO, Hiroki ADACHI
  • Publication number: 20210011532
    Abstract: A novel electrical module that is highly convenient or reliable is provided. A novel display panel that is highly convenient or reliable is provided. A novel display device that is highly convenient or reliable is provided. The functional layer includes an element, a conductive film, and an intermediate layer and the element is electrically connected to the conductive film. The intermediate layer includes an opening portion and a first surface, the opening portion overlaps with the conductive film, the opening portion includes a side end portion, and the side end portion is in contact with the conductive film. Moreover, the first surface includes a first region, the first region is positioned at the periphery of the opening portion, and the first region is in contact with the conductive film.
    Type: Application
    Filed: March 4, 2019
    Publication date: January 14, 2021
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masataka Sato, Hiroki ADACHI
  • Publication number: 20200412606
    Abstract: A network management device according to an embodiment includes network property storage means for storing information representing network properties, information object storage means for storing an information object relating to a network configuration corresponding to information representing network properties stored in the network property storage means, network property acquisition means for acquiring, from the network property storage means, information representing network properties corresponding to an optional protocol layer, information object acquisition means for acquiring, from the information object storage means, the information object corresponding to information representing network properties acquired by the network property acquisition means, and display means for displaying the information object acquired by the information object acquisition means.
    Type: Application
    Filed: February 21, 2019
    Publication date: December 31, 2020
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kimihiko FUKAMI, Masataka SATO, Kenichi TAYAMA, Shingo HORIUCHI
  • Publication number: 20200388776
    Abstract: A method of fabricating a semiconductor device, which includes a separation step and has a high yield, is provided. A metal layer is formed over a substrate, fluorine is supplied to the metal layer, and the metal layer is then oxidized, whereby a metal compound layer is formed. A functional layer is formed over the metal compound layer, heat treatment is performed on the metal compound layer, and the functional layer is separated from the substrate with use of the metal compound layer. By performing first plasma treatment using a gas containing fluorine, fluorine can be supplied to the metal layer. By performing second plasma treatment using a gas containing oxygen, the metal layer supplied with fluorine can be oxidized.
    Type: Application
    Filed: December 3, 2018
    Publication date: December 10, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masataka SATO, Kayo KUMAKURA, Seiji YASUMOTO, Satoru IDOJIRI
  • Publication number: 20200381936
    Abstract: An auxiliary power source device includes a main power source-side path, an auxiliary power source-side path, a power source control circuit, an analog determination circuit that is provided separately from the power source control circuit, and a power source switching circuit. The power source control circuit controls switching between a conduction state and an interruption state on the main power source-side path and the auxiliary power source-side path. The analog determination circuit determines an occurrence of abnormality in the main power source and generates a switching signal when the occurrence of the abnormality in the main power source is determined. The power source switching circuit switchs a power source for supplying power to a power supply target, from the main power source to the auxiliary power source.
    Type: Application
    Filed: May 27, 2020
    Publication date: December 3, 2020
    Applicants: JTEKT CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Fumihiko SATO, Masataka OKUDA, Toshiyuki MIKIDA, Hiroaki HANZAWA
  • Publication number: 20200357863
    Abstract: Display unevenness in a display panel is suppressed. A display panel with a high aperture ratio of a pixel is provided. The display panel includes a first pixel electrode, a second pixel electrode, a third pixel electrode, a first light-emitting layer, a second light-emitting layer, a third light-emitting layer, a first common layer, a second common layer, a common electrode, and an auxiliary wiring. The first common layer is positioned over the first pixel electrode and the second pixel electrode. The first common layer has a portion overlapping with the first light-emitting layer and a portion overlapping with the second light-emitting layer. The second common layer is positioned over the third pixel electrode. The second common layer has a portion overlapping with the third light-emitting layer.
    Type: Application
    Filed: November 19, 2018
    Publication date: November 12, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daiki NAKAMURA, Shingo EGUCHI, Tomoya AOYAMA, Nozomu SUGISAWA, Junya MARUYAMA, Kazuhiko FUJITA, Masataka SATO, Susumu KAWASHIMA
  • Publication number: 20200338893
    Abstract: The object of the present disclosure is to optimize the time necessary for filling and the ink consumption. One embodiment of the present disclosure is a printing apparatus having: a storage unit; a print head having an ejection port from which ink supplied from the storage unit is ejected; an ink supply path that connects the storage unit and the print head; a suction unit configured to perform suction at the ejection port; and a supply control unit configured to supply ink stored in the storage unit to the ink supply path and the print head by performing suction at the ejection port by the suction unit, and the printing apparatus has an acquisition unit configured to acquire information relating to ink discharge from the ink supply path and the supply control unit determines the number of times of suction by the suction unit based on the information.
    Type: Application
    Filed: April 22, 2020
    Publication date: October 29, 2020
    Inventors: Kazuki Narumi, Masataka Kato, Toshimitsu Danzuka, Yasunori Fujimoto, Shin Genta, Tomoki Yamamuro, Hiroto Kango, Kazuhiko Sato, Kazuo Suzuki
  • Publication number: 20200335966
    Abstract: An electric power supply circuit includes an auxiliary electric power supply; a first MOSFET provided on an auxiliary electric power supply-side feed path, the first MOSFET including a parasitic diode configured to restrict conduction of electric current in a direction from the auxiliary electric power supply toward the feed target; a second MOSFET provided on the auxiliary electric power supply-side feed path, the second MOSFET including a parasitic diode configured to restrict conduction of the electric current in a direction from the feed target toward the auxiliary electric power supply; and a third MOSFET provided on at least one of the auxiliary electric power supply-side feed path and the main electric power supply-side feed path, the third MOSFET including a parasitic diode configured to restrict conduction of the electric current in a direction from the main electric power supply toward the auxiliary electric power supply.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 22, 2020
    Applicant: JTEKT CORPORATION
    Inventors: Fumihiko SATO, Masataka OKUDA, Toshiyuki MIKIDA, Hiroaki HANZAWA
  • Publication number: 20200331522
    Abstract: An actuator that applies force to a member associated with steering, and a control device that controls the actuator, have duplex configuration. First and second control devices compute the same controlled variable as first and second controlled variables, respectively. In a normal mode, the control device controls the actuator according to the first controlled variable. The first and second control devices send and receive respectively computed controlled variables to and from each other via communications. When a discrepancy arises between the first and second controlled variables, or an abnormality occurs in communications between the first and second control devices, the operating mode is switched from the normal mode to an independent mode. In the independent mode, the first and second control devices control the first and second actuators, according to the first and second controlled variables, respectively.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 22, 2020
    Applicants: Toyota Jidosha Kabushiki Kaisha, JTEKT Corporation, Denso Corporation
    Inventors: Masaharu Yamashita, Atsushi Sato, Masataka Okuda, Yosuke Yamashita, Shintaro Takayama, Shunsuke Hiromasa, Toshiyuki Mikida, Shoji Kubota, Yuji Fujita, Kenichi Abe, Toshimitsu Sakai
  • Publication number: 20200313667
    Abstract: A power supply circuit includes a first P-channel MOSFET and a first voltage application circuit. The first P-channel MOSFET is provided between an on-board power supply and a vehicular apparatus that is a power supply target, and is configured to switch a power-ON state in which electric power is supplied to the vehicular apparatus and a power-OFF state in which the supply of the electric power is interrupted. The first voltage application circuit is configured to apply a voltage having a potential lower than a potential of the on-board power supply to a gate terminal such that a state of the first P-channel MOSFET is switched to the power-ON state, and apply a voltage having a potential equal to the potential of the on-board power supply to the gate terminal such that the state of the first P-channel MOSFET is switched to the power-OFF state.
    Type: Application
    Filed: March 18, 2020
    Publication date: October 1, 2020
    Applicant: JTEKT CORPORATION
    Inventors: Fumihiko SATO, Shingo SUZUKI, Hiroaki HANZAWA, Masataka OKUDA, Toshiyuki MIKIDA
  • Publication number: 20200307283
    Abstract: Images with high image quality having less time-difference unevenness are outputted in an inkjet printing apparatus that performs multi-pass printing using full-line inkjet print heads 2. For this purpose, a CPU is capable of setting a first printing method in which an image for a unit area is printed by a specified number of printing conveyance operations and a second printing method in which an image for a unit area is printed by a smaller number than the specified number of printing conveyance operations. The CPU sets conveyance conditions such that a taken time for one printing conveyance operation of the printing conveyance operations for a unit area in the second printing method is smaller than a taken time for one successive printing conveyance operation of the printing conveyance operations for a unit area in the first printing method.
    Type: Application
    Filed: March 19, 2020
    Publication date: October 1, 2020
    Inventors: Shingo Nishioka, Sae Mogi, Satoshi Azuma, Kazuhiko Sato, Shin Genta, Mitsutoshi Nagamura, Masataka Kato, Yoshinori Nakajima, Kazuo Suzuki
  • Patent number: 10741590
    Abstract: A peeling method at low cost with high mass productivity is provided. A silicon layer having a function of releasing hydrogen by irradiation with light is formed over a formation substrate, a first layer is formed using a photosensitive material over the silicon layer, an opening is formed in a portion of the first layer that overlaps with the silicon layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the silicon layer, the silicon layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: August 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masataka Sato, Masakatsu Ohno, Seiji Yasumoto, Hiroki Adachi
  • Publication number: 20200243128
    Abstract: First and second memory cell arrays each having memory cells arranged in the X and Y directions lie side by side in the Y direction with space between them. A relay buffer is provided between first and second row decoders for buffering a control signal to be supplied to the second row decoder. An inter-array block between the first and second memory cell arrays is constituted by at least either a tap cell or a dummy memory cell. The relay buffer and the inter-array block are the same in position and size in the Y direction.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: Masataka Sato, Hideo Akiyoshi, Masanobu Hirose, Yoshinobu Yamagami
  • Publication number: 20200243371
    Abstract: To improve peelability, yield in a peeling step, and yield in manufacturing a flexible device. A peeling method is employed which includes a first step of forming a peeling layer containing tungsten over a support substrate; a second step of forming, over the peeling layer, a layer to be peeled formed of a stack including a first layer containing silicon oxynitride and a second layer containing silicon nitride in this order and forming an oxide layer containing tungsten oxide between the peeling layer and the layer to be peeled; a third step of forming a compound containing tungsten and nitrogen in the oxide layer by heat treatment; and a fourth step of peeling the peeling layer from the layer to be peeled at the oxide layer.
    Type: Application
    Filed: April 16, 2020
    Publication date: July 30, 2020
    Inventors: Seiji YASUMOTO, Masataka SATO, Shingo EGUCHI, Kunihiko SUZUKI
  • Patent number: 10693097
    Abstract: A first display element includes a first pixel electrode that reflects visible light, a liquid crystal layer, and a first common electrode that transmits visible light. A second display element includes a second pixel electrode that transmits visible light, a light-emitting layer, and a second common electrode that reflects visible light. A separation layer that reflects visible light is formed over a formation substrate, an insulating layer is formed over the separation layer, and the second display element is formed over the insulating layer. The formation substrate and a second substrate are bonded to each other. Then, the formation substrate and the separation layer are separated from each other. The exposed separation layer is processed into the first pixel electrode. The liquid crystal layer is positioned between the first common electrode and the first pixel electrode and a first substrate and the second substrate are bonded to each other.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiji Yasumoto, Masataka Sato, Hiroki Adachi, Toru Takayama, Natsuko Takase
  • Patent number: 10668717
    Abstract: An object of the present invention is to quickly correct a temperature sensor for an ejection head by, both efficiently and in a brief time, estimating a detected temperature of the temperature sensor for the ejection head in a case where the temperature of the ejection head of liquid becomes sufficiently close to an environment temperature. The temperature of a print head 1 is detected by a diode sensor 17 and the environment temperature is detected by a thermistor 10. Based on a change in the detected temperature of the diode sensor 17 at the time of filling of ink for the print head 1, the detected temperature of the diode sensor 17 in a case where the temperature of the print head 1 becomes close to the environment temperature is estimated as an estimated detected temperature. Based on a difference between the estimated detected temperature and the environment temperature, a correction value of the detected temperature of the diode sensor 17 is set.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: June 2, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoshi Azuma, Kazuhiko Sato, Kazuo Suzuki, Yoshinori Nakajima, Masataka Kato, Mitsutoshi Nagamura, Shin Genta, Shingo Nishioka, Sae Tabuchi