Abstract: The present invention provides a useful and novel alicyclic polyesterimide. An alicyclic polyesterimide produced by imidation of an alicyclic polyesterimide precursor is found to be a useful material in industrial fields, the alicyclic polyesterimide precursor being obtained by reacting an alicyclic tetracarboxylic anhydride having an ester group or a class of tetracarboxylic acid thereof as a starting material with an amine.

Abstract: Disclosed is a linear polyimide precursor having an intrinsic viscosity of not less than 0.5 dL/g and composed of a repeating unit represented by at least one formula selected from the group consisting of the general formula (1) below and the general formula (2) below. In the general formulae (1) and (2), X represents a divalent aromatic group other than a residue of 1,4-bis(4-aminophenoxy)benzene and a residue of bis(4-amino-3-methylphenyl)methane or an aliphatic group. Since this linear polyimide precursor has high glass transition temperature and high toughness, while exhibiting excellent solubility and thermoplasticity, it is suitably used as a raw material for an asymmetric polyimide which is useful as an adhesive resin for flexible printed circuits (FPC) or the like.

Abstract: The present invention provides a useful and novel alicyclic polyesterimide. An alicyclic polyesterimide produced by imidation of an alicyclic polyesterimide precursor is found to be a useful material in industrial fields, the alicyclic polyesterimide precursor being obtained by reacting an alicyclic tetracarboxylic anhydride having an ester group or a class of tetracarboxylic acid thereof as a starting material with an amine.

Abstract: A semiconductor integrated circuit device including a memory circuit with both high access efficiency and high memory efficiency in a simple configuration is provided. In a memory read control circuit, burst length is changed based on whether or not a read instruction is issued at a cycle after a cycle at which a read instruction /R is issued. And, in a memory write control circuit, burst length is changed based on whether or not a write instruction is issued at a cycle before a cycle at which a write instruction /W is issued.

Abstract: A poly(imide-azomethine)copolymer that has a low linear thermal expansion coefficient and a method for producing the same copolymer are provided. Also provided are a poly(amic acid-azomethine)copolymer that is a precursor polymer of the poly(imide-azomethine)copolymer; a positive photosensitive resin composition composed of the precursor polymer and a photosensitizer; and a method for making a fine pattern of poly(imide-azomethine) copolymer from the resin composition.

Abstract: Provided are a polyimide that demonstrates low coefficient of hygroscopic expansion and low water absorption coefficient when used as an insulation film, as well as an ester group-containing tetracarboxylic acid dianhydride expressed by the general formula below, and a novel polyesterimide precursor derived therefrom and polyesterimide, for use in the production of such polyimide: In the formula, each R is independent and represents a straight or branched-chain alkyl group with 1 to 6 carbon atoms or straight or branched-chain alkoxyl group with 1 to 6 carbon atoms, n is an integer of 0 to 4, and m is an integer of 2 to 4, with the proviso that if m=2, n is an integer of 1 to 4.

Abstract: A blue-light-emitting element includes a polyimide containing a repeating unit represented by formula (1): (wherein X represents a divalent alicyclic hydrocarbon group having 6 to 24 carbon atoms). Since the polyimide has a high glass transition temperature and toughness and exhibits a stable luminous efficiency; the blue-light-emitting element is suitable for an organic EL display.

Abstract: Provided are an ester group-containing poly(imide-azomethine)copolymer having low linear thermal expansion coefficient; a production method thereof; an ester group-containing poly(amide acid-azomethine)copolymer to serve as the precursor of the poly(imide-azomethine)copolymer; a positive photosensitive composition including the poly(amide acid-azomethine)copolymer and a photosensitizer; a method for forming a fine pattern of an ester group-containing poly(imide-azomethine)copolymer from the composition; and a method for forming a fine pattern of an ester group-containing poly(imide-azomethine)copolymer by etching a photosensitizer-free, ester group-containing poly(imide-azomethine)copolymer in an alkaline solution.

Abstract: In a bit-line direction, a plurality of memory mats are arranged including a plurality of memory cells respectively coupled to bit lines and word lines, and a sense amplifier array is arranged including a plurality of latch circuits having input/output nodes connected to a half of bit-line pairs separately provided to the memory mats in a region between the memory mats placed in the bit-line direction, thereby making possible to replace with a redundant bit line pair and the corresponding redundant sense amplifier on a basis of each bit-line pair and sense amplifier connected thereto, thereby realizing effective and rational Y-system relief.

Abstract: A hair growth promotor which is an ethanol or aqueous ethanol preparation comprising, as active ingredients for a hair growth promotor, (A) at least one compound selected from fatty acids having a chain length of an odd number of carbon atoms, the derivatives of the fatty acids, aliphatic alcohols having a chain length of an odd number of carbon atoms and the derivatives of the aliphatic alcohols and (B) at least one selected from 6-benzylaminopurine and/or the derivatives thereof represented by the following Formula (I), wherein it further comprises (C) at least one of polyglycerin fatty acid esters and (D) at least one of sorbitan fatty acid esters: in Formula (I), R1 and R2 are defined. The hair growth promotor can have an excellent hair growth effect and can provide an excellent stabilization effect at low temperature and can provide good feeling having no stickiness.

Abstract: A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.

Abstract: A semiconductor integrated circuit device including a memory circuit with both high access efficiency and high memory efficiency in a simple configuration is provided. In a memory read control circuit, burst length is changed based on whether or not a read instruction is issued at a cycle after a cycle at which a read instruction /R is issued. And, in a memory write control circuit, burst length is changed based on whether or not a write instruction is issued at a cycle before a cycle at which a write instruction /W is issued.

Abstract: A semiconductor memory device that satisfies needs of both a large number of memory banks and a higher operation speed is provided. A semiconductor memory device includes a plurality of data terminal pads, and a plurality of memory banks independently subject to memory access. Each of the memory banks is divided into a plurality of submemory banks. The data terminal pads are also divided into a plurality of groups so as to be associated with submemory banks obtained by the division. Blocks each including submemory banks obtained by the division and data terminal pads associated with the submemory banks are arranged so as not to overlap each other on a semiconductor chip.

Abstract: In a bit-line direction, a plurality of memory mats are arranged including a plurality of memory cells respectively coupled to bit lines and word lines, and a sense amplifier array is arranged including a plurality of latch circuits having input/output nodes connected to a half of bit-line pairs separately provided to the memory mats in a region between the memory mats placed in the bit-line direction, thereby making possible to replace with a redundant bit line pair and the corresponding redundant sense amplifier on a basis of each bit-line pair and sense amplifier connected thereto, thereby realizing effective and rational Y-system relief.

Abstract: A poly(imide-azomethine)copolymer that has a low linear thermal expansion coefficient and a method for producing the same copolymer are provided. Also provided are a poly(amic acid-azomethine)copolymer that is a precursor polymer of the poly(imide-azomethine)copolymer; a positive photosensitive resin composition composed of the precursor polymer and a photosensitizer; and a method for making a fine pattern of poly(imide-azomethine)copolymer from the resin composition. The poly(imide-azomethine)copolymer is composed of azomethine polymer units of the following formula (1) and imide polymer units of the following general formula (2), and the poly(amic acid-azomethine)copolymer, the major component of the positive photosensitive resin composition, is composed of azomethine polymer units of the following formula (1) and amic acid polymer units of the following formula (3).

Abstract: In a bit-line direction, a plurality of memory mats are arranged including a plurality of memory cells respectively coupled to bit lines and word lines, and a sense amplifier array is arranged including a plurality of latch circuits having input/output nodes connected to a half of bit-line pairs separately provided to the memory mats in a region between the memory mats placed in the bit-line direction, thereby making possible to replace with a redundant bit line pair and the corresponding redundant sense amplifier on a basis of each bit-line pair and sense amplifier connected thereto, thereby realizing effective and rational Y-system relief.

Abstract: A Y selection line for write for controlling operations of a column selection switch within a write amplifier and a Y selection line for read for controlling operations of a column selection switch within a read amplifier are provided individually and the column selection switch within the read amplifier is set to the non-operating condition during the write operation. Accordingly, a through-current during the write operation may be reduced. In this case, the write IO line and read IO line are allocated crossing sense amplifier columns, while the column selection line for write and column selection line for read are allocated in parallel to the sense amplifier columns.

Abstract: A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.

Abstract: A hair growth promotor which is an ethanol or aqueous ethanol preparation comprising, as active ingredients for a hair growth promotor, (A) at least one compound selected from fatty acids having a chain length of an odd number of carbon atoms, the derivatives of the fatty acids, aliphatic alcohols having a chain length of an odd number of carbon atoms and the derivatives of the aliphatic alcohols and (B) at least one selected from 6-benzylaminopurine and/or the derivatives thereof represented by the following Formula (I), wherein it further comprises (C) at least one of polyglycerin fatty acid esters and (D) at least one of sorbitan fatty acid esters: in Formula (I), R1 and R2 are defined. The hair growth promotor can have an excellent hair growth effect and can provide an excellent stabilization effect at low temperature and can provide good feeling having no stickiness.

Abstract: A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.