Abstract: According to an embodiment, an electronic circuit board includes a nonvolatile memory, a reading circuit to read data stored in the nonvolatile memory, a switch, and a communication circuit. When power is supplied from a first power source, the switch performs switching to a first state in which the nonvolatile memory and a host device configured to read and write data from and in the nonvolatile memory are connected. When power is supplied from a second power source, the switch performs switching to a second state in which the host device and the nonvolatile memory are not connected and the reading circuit and the nonvolatile memory are connected. The communication circuit transmits, to an external device, the data read by the reading circuit from the nonvolatile memory when power is being supplied from the second power source.

Abstract: According to one embodiment, a memory controller includes a nonvolatile cache memory and a controller. The nonvolatile cache memory is configured to store a piece of data stored in a nonvolatile main memory connected to the memory controller. The controller is configured to control writing of data to the nonvolatile cache memory. The memory controller is connected to a processor via an interconnect that ensures a protocol indicating a procedure for preventing data inconsistency in a plurality of cache memories. The controller causes, after detecting that the processor has updated data corresponding to any area of the nonvolatile main memory using the protocol, the updated data to be transmitted to the memory controller and writes the updated data to the nonvolatile cache memory.

Abstract: According to an embodiment, a control device includes a calculator and a setting unit. The calculator is configured to calculate a system processing time indicating a time required for processing executed after a system, the system including a plurality of elements, power to each element being individually controlled, resumes from a sleep state in which the number of elements supplied with power is limited to a predetermined number and an operation of the system is stopped. The setting unit is configured to set a mode indicating an operation state of the system according to the system processing time calculated by the calculator when a resume factor indicating a factor for resuming the system from the sleep state occurs.

Abstract: According to an embodiment, a memory device includes a nonvolatile memory and a controller. The controller receives, from a host device, a write request for writing data in the nonvolatile memory, and then performs data writing based on the write request. When a writing order confirmation request, which is issued for confirmation of fact that data writing is performed based on one or more of the write requests that are already sent, is received from the host device, the controller performs data writing based on the write requests received before receiving the writing order confirmation request and then sends to the host device a response with respect to the writing order confirmation request.

Abstract: According to an embodiment, an information processing device includes a memory device, one or more peripheral devices, a processor, and a state controller. The processor is able to change between a first state, in which a command is executed, and a second state, in which an interrupt is awaited. When the processor enters the second state and if an operation for data transfer is being performed between at least one of the peripheral devices and the memory device, the state controller switches the information processing device to a third state in which power consumption is lower as compared to the first state. If the operation for data transfer is not being performed between any of the peripheral devices and the memory device, the state controller switches the information processing device to a fourth state in which power consumption is lower as compared to the third state.

Abstract: According to an embodiment, a memory device includes a nonvolatile memory, a controller, and power storage. The controller is configured to receive, from a host device, a write request for writing data into the nonvolatile memory, and then, write the data based on the write request. The power storage is configured to store power supplied from a power supply. The controller writes, when abnormality in power supplied from the power supply to the memory device is detected, the data based on the write request that has already been received, using the power supplied from the power storage.

Abstract: According to an embodiment, an electronic circuit board includes a nonvolatile memory, a reading circuit to read data stored in the nonvolatile memory, a switch, and a communication circuit. When power is supplied from a first power source, the switch performs switching to a first state in which the nonvolatile memory and a host device configured to read and write data from and in the nonvolatile memory are connected. When power is supplied from a second power source, the switch performs switching to a second state in which the host device and the nonvolatile memory are not connected and the reading circuit and the nonvolatile memory are connected. The communication circuit transmits, to an external device, the data read by the reading circuit from the nonvolatile memory when power is being supplied from the second power source.

Abstract: According to one embodiment, a memory controller includes a nonvolatile cache memory and a controller. The nonvolatile cache memory is configured to store a piece of data stored in a nonvolatile main memory connected to the memory controller. The controller is configured to control writing of data to the nonvolatile cache memory. The memory controller is connected to a processor via an interconnect that ensures a protocol indicating a procedure for preventing data inconsistency in a plurality of cache memories. The controller causes, after detecting that the processor has updated data corresponding to any area of the nonvolatile main memory using the protocol, the updated data to be transmitted to the memory controller and writes the updated data to the nonvolatile cache memory.

Abstract: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.

Abstract: A recognition device includes a storage unit, an acquiring unit, a first calculator, a second calculator, a determining unit, and an output unit. The storage unit stores multiple training patterns each belonging to any one of multiple categories. The acquiring unit acquires a recognition target pattern to be recognized. The first calculator calculates, for each of the categories, a distance histogram representing distribution of the number of training patterns belonging to the category with respect to distances between the recognition target pattern and the training patterns belonging to the category. The second calculator analyzes the distance histogram of each of the categories to calculate confidence of the category. The determining unit determines a category of the recognition target pattern from the multiple categories by using the confidences. The output unit outputs the category of the recognition target pattern.

Abstract: According to an embodiment, a communication device includes a register and a controller. The register receives data from an external device via an input data line. In a first state in which the communication device is able to receive the data, when a condition in which the data is not sent to the input data line continues for a certain period of time, the controller controls to switch state of the communication device to a second state in which power consumption is less than in the first state.

Abstract: According to an embodiment, an information processing device includes a data obtaining unit and a data storage controller. The data obtaining unit is configured to obtain data measured by a sensor. The data storage controller is configured to store the data obtained by the data obtaining unit in a first memory of volatile nature when a sampling interval indicating an interval at which the data obtaining unit obtains the data is equal to or smaller than a threshold value. The data storage controller is configured to store the data obtained by the data obtaining unit and the data stored in the first memory in a second memory of nonvolatile nature when the sampling interval exceeds the threshold value.

Abstract: A data processing device according to embodiments comprises a non-volatile memory, and executing a process to data stored in the memory while switching a power to be supplied to the memory from a first power for executing the process to a second power being lower than the first power. When a time required for the process is shorter than a threshold, the device executes the process with the power supplied to the memory being the first power, and after the process is finished, the device switches the power supplied to the memory from the first power to the second power. When the time required for the process is equal or longer than the threshold, the device switches the power supplied to the memory from the first power to the second poser, returns the power supplied to the memory from the second power to the first power, and executes the process with the power supplied to the memory being the first power.

Abstract: A data processing device according to embodiments comprises a data converting unit, a selecting unit, a managing unit, a updating unit, and a controller. The data converting unit is configured to convert update-data for updating at least a part of an electronic paper into processed update-data to be displayed. The selecting unit is configured to select an update-control-information identifier to be used for updating the electronic paper with the processed update-data. The managing unit is configured to store the processed update-data and a selected update-control-information identifier on a first memory. The updating unit is configured to instruct a drawing step of the electronic paper using the processed update-data and the update-control-information identifier stored on the first memory.

Abstract: According to an embodiment, an information processing apparatus that includes a processor, has a first control unit, a power storage unit, and a second control unit. The first control unit is configured to control execution of a process by the processor. The power storage unit is configured to store therein power. The second control unit is configured to control reduction of power consumption of the information processing apparatus in a case where there is a process waiting to be executed and an amount of stored power of the power storage unit is equal to or less than a first threshold.

Abstract: According to an embodiment, an information processing apparatus includes: a first control unit to control a first device; and a second control unit to control a second device. The first control unit includes a first request processing unit, a notification unit, and a first execution unit. The second request processing unit receives a second request including an instruction to start a process of the second device. The notification unit notifies the second control unit that the first control unit receives a first request. The second execution unit executes a second request received by the second request processing unit when the first device is in the active state, and executes the second request stored in the storage unit when the notification is received by the notification receiving unit.

Abstract: A memory system includes an encoding processing circuit configured to perform redundant encoding process on target data for generating data and a memory for writing the generated data by the encoding processing circuit, where a number of bits having a predetermined value are half or less than a total number of bits of the generated data.

Abstract: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile memory 12 is provided with a plurality of dirty pages and a page table memory unit 51. The operating system 22 is provided with a virtual memory management unit 23 which includes a page transfer unit 25.

Abstract: A control device according to embodiments may control update of a target region in an electronic paper. The device may comprise a divider unit, a manager unit and an update instruction unit. The divider unit may be configured to divide the target region into a plurality of sub-regions. The manager unit may be configured to configure an update start timing of each sub-region so that flashings occurring at updating of the sub-regions appear at different timings. The update instruction unit may be configured to instruct to execute an update process of each sub-region according to the update start timings.

Abstract: According to an embodiment, a power control device includes a storage unit, a monitor, a determining unit, and a controller. The storage device stores a look-up table, which includes relationship between needed power consumptions and start-up conditions of an electronic device including a plurality of modules. The start-up condition of the electronic device is determined from the needed power consumption in the look-up table and specifies a power on/off status of the modules in the electronic device. The monitor monitors a voltage or available power supplied by a power source when the electronic device is activated. The determining unit determines a start-up condition corresponding to needed power consumption, which corresponds to the voltage or available power monitored by the monitor, with reference to the table. The controller sets a start-up condition of the electronic device to start up the electronic device in the start-up condition determined by the determining unit.