Patents by Inventor Masayoshi Kobayashi

Masayoshi Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020098656
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: March 27, 2002
    Publication date: July 25, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Publication number: 20020085488
    Abstract: A switching apparatus for relaying packet communication through a communication network between a plurality of servers and clients, at the time of relaying a packet to be transmitted from the server to the client, rewrites header information of the packet in question to have the contents to be set when the packet in question is transmitted from the switching apparatus and sends the rewritten packet to the client and from the time of relaying a data acquisition request from the client until the end of transmission of a packet of an acknowledgement to be transmitted from the server to the client, conducts one-way splicing in the direction from the server in question to the client in question, as well as successively conducting retransmission control and flow control with respect to communication from the client to the server.
    Type: Application
    Filed: December 26, 2001
    Publication date: July 4, 2002
    Applicant: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Patent number: 6410959
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: June 25, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Publication number: 20020065932
    Abstract: A path calculating section obtains a path suitable for carrying out an automatic cache updating operation, a link prefetching operation, and a cache server cooperating operation, based on QoS path information that includes network path information obtaining section. An automatic cache updating section, a link prefetching control section, and a cache server cooperating section carry out respective ones of the automatic cache updating operation, the link prefetching operation, and the cache server cooperating operation, by utilizing the path obtained. For example, the path calculating section obtains a maximum remaining bandwidth path as the path.
    Type: Application
    Filed: July 25, 2001
    Publication date: May 30, 2002
    Applicant: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Publication number: 20020065933
    Abstract: A content transfer method allowing the transfer of content requiring no urgency to reduce influence on other traffics is disclosed. A relay server is used to transfer the content from a content server to a cache server. The content is transferred while temporarily storing each relay server in each of sections obtained by the relay server dividing the path from the content server to the cache server. Further, since relay servers perform relay operation during time slots determined for respective ones of the relay servers, the influence on other traffics can be more reduced.
    Type: Application
    Filed: July 24, 2001
    Publication date: May 30, 2002
    Applicant: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Publication number: 20020009867
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: September 21, 2001
    Publication date: January 24, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Patent number: 6336266
    Abstract: An electronic parts insertion head including a supporting block, an insertion guide movable between first and second positions with respect to the supporting block and configured to guide a lead wire of an electronic part to an attaching hole of a printed wiring board in the first position, an insertion guide moving mechanism configured to move the insertion guide between the first and second positions, a cam capable of moving with respect to the supporting block, a cam follower arranged on the insertion guide and positioned to move along a cam face of the cam, and a cam position changing mechanism configured to change a position of the cam with respect to the support block, wherein the insertion guide changes a movement locus when the position of the cam is changed by the cam position changing mechanisms.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: January 8, 2002
    Assignee: TDK Corporation
    Inventors: Masayoshi Kobayashi, Atsushi Shindo
  • Publication number: 20010040759
    Abstract: A magnetic tape apparatus for reading data from and writing data to a magnetic tape has a magnetic head for reading or writing the data, and first and second tape guides. The first tape guide has a first guide surface to guide the magnetic tape, and the first guide surface has a width that is narrower than the width of the magnetic tape. The second tape guide has a second guide surface to guide the magnetic tape, and the second guide surface has a width that is wider than the width of the magnetic tape. If the tape moves laterally against a flange on the first tape guide, the flange initially yields to the pressure of the tape. Then the flange presses against the magnetic tape to return the tape to a laterally aligned position along a tape path.
    Type: Application
    Filed: February 1, 1999
    Publication date: November 15, 2001
    Applicant: FUJITSU LIMITED
    Inventors: MASAYOSHI KOBAYASHI, TSUNEYOSHI OOHARA
  • Patent number: 6310744
    Abstract: A magnetic tape apparatus for reading data from and writing data to a magnetic tape has a magnetic head for reading or writing the data, and first and second tape guides. The first tape guide has a first guide surface to guide the magnetic tape, and the first guide surface has a width that is narrower than the width of the magnetic tape. The second tape guide has a second guide surface to guide the magnetic tape, and the second guide surface has a width that is wider than the width of the magnetic tape. If the tape moves laterally against a flange on the first tape guide, the flange initially yields to the pressure of the tape. Then the flange presses against the magnetic tape to return the tape to a laterally aligned position along a tape path.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: October 30, 2001
    Assignee: Fujitsu Limited
    Inventors: Masayoshi Kobayashi, Tsuneyoshi Oohara
  • Patent number: 6307231
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: October 23, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Patent number: 6306190
    Abstract: An air cleaning system for an engine includes a main air cleaner for supplying cleaned air to an intake system of the engine and a sub-air cleaner for supplying cleaned air to an exhaust system of the engine. The main air cleaner includes a main air cleaner housing divided into a dirty air chamber and a clean air chamber by a first air cleaning element. The sub-air cleaner is disposed in the dirty air chamber, and has its own second air cleaning element, physically separated from the first air cleaning element.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: October 23, 2001
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yuichiro Tsuruta, Nobuhiro Kasai, Masayoshi Kobayashi
  • Publication number: 20010012169
    Abstract: Disclosed herein is a magnetic tape unit having a magnetic head for reading and writing data from and onto a magnetic tape. The magnetic tape is traveled in contact with the magnetic head during a read/write operation of the magnetic head. During a rest period where the read/write operation of the magnetic head is not performed, a reciprocating motion of the magnetic tape by a small distance is performed with a predetermined period. A temperature in the vicinity of the magnetic head is detected by a temperature sensor. The predetermined period is changed according to the temperature detected by the temperature sensor. Accordingly, the adhesion of the magnetic tape to the magnetic head can be well prevented irrespective of the temperature inside the tape unit.
    Type: Application
    Filed: August 25, 1997
    Publication date: August 9, 2001
    Applicant: FUJITSU LTD.
    Inventors: MASAYOSHI KOBAYASHI, KEISUKE HOSHINO, MASARU OHSHITA, AKIRA TAKANO, MAKOTO SASAKI, MAKOTO MATSUDA, TOSHIHIKO FUJII
  • Publication number: 20010010048
    Abstract: A data structure allowing the necessary amount of memory to be reduced while maintaining or improving search performance is disclosed. The data structure in which items of data are stored for search includes; a tree structure in which the items or data are stored except for a portion of the items of data corresponding to a cub-tree structure, which is a selected portion of an assumed tree structure formed by all the items of data; and an equivalent table storing the portion of the items of data in table form.
    Type: Application
    Filed: January 25, 2001
    Publication date: July 26, 2001
    Applicant: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Patent number: 6168996
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: January 2, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Patent number: 6151188
    Abstract: In a magnetic tape drive for a single-reel type magnetic tape cartridge having a leader block coupled to a leading end of a magnetic tape wound therein, a hub for winding the tape pulled out of the cartridge is disposed at rear side of a magnetic head unit for writing data on and reading data from the tape, and has a radial slot formed therein for receiving the leader block of the tape threaded through the unit. The rotational direction of the hub is determined such that the leader block is subjected to an radially-inward force in the slot of the hub at the beginning of a rotational movement of the hub, whereby slippage of the leader block from the slot of the hub can be prevented.
    Type: Grant
    Filed: October 7, 1998
    Date of Patent: November 21, 2000
    Assignee: Fujitsu Limited
    Inventors: Akira Takano, Masayoshi Kobayashi
  • Patent number: 6147830
    Abstract: A magnetic tape unit with a magnetic head for reading and writing data from and onto a magnetic tape. The magnetic tape is kept in constant contact with the magnetic head, and a reel motor travels the magnetic tape kept in contact with the magnetic head. Adhesion of the magnetic tape to the magnetic head is prevented by slowly driving the reel motor to travel the magnetic tape at a speed lower than a normal traveling speed for a read/write operation of the magnetic head, during a rest period when the read/write operation of the magnetic head is not performed.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: November 14, 2000
    Assignee: Fujitsu Limited
    Inventors: Masayoshi Kobayashi, Keisuke Hoshino, Masaru Ohshita, Akira Takano, Makoto Sasaki, Makoto Matsuda, Toshihiko Fujii
  • Patent number: 6144574
    Abstract: An associative memory with a shortest mask output function has data cells, mask cells, comparators for the data cells, comparators for the mask cells, a first bit lines for inputting compared bits to the data cell comparators, and a second bit lines for inputting compared bits to the mask cell comparator, a search data are input to the first bit line and bit data corresponding to the shortest mask lines are input to the second bit line.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: November 7, 2000
    Assignee: NEC Corporation
    Inventors: Masayoshi Kobayashi, Tutomu Murase, Atsushi Kuriyama, Naoyuki Ogura
  • Patent number: 5957361
    Abstract: A magnetic tape device including a tape guide to guide a magnetic tape as the magnetic tape travels past a magnetic head to provide good contact between the magnetic tape and the magnetic head. The tape guide includes a roller guides, or roller guides and guide posts. The roller guide includes upper and lower flange units in sliding contact with the edges of the magnetic tape, and a roller unit between the upper and lower flange unit having the magnetic tape wrapped on an outer circumferential surface. The upper and lower flange units include concave portions disposed in an upper surface of the lower flange unit, and in a lower surface of the upper flange unit, to avoid sliding contact with the edge of the magnetic tape.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: September 28, 1999
    Assignee: Fujitsu Limited
    Inventors: Masayoshi Kobayashi, Tsuneyoshi Oohara
  • Patent number: 5853079
    Abstract: A chip feed apparatus capable of permitting a chip feed casing to be used for storage and transportation of chips in a distribution channel as well and preventing a weight of chips from being applied to a chip storage space of a hopper, resulting in positive separation and feeding of chips by the hopper. The chip feed apparatus includes a chip feed casing formed on a side surface thereof with a chip outlet, a hopper formed on a side surface thereof with a chip inlet and connected to the chip feed casing while enabling vertical movement of the hopper, a chip separating and aligning pipe inserted into a hole communicating with the chip storage space, and a chip feed path of which one end communicates with the chip separating and aligning pipe and the other end is defined at a chip pick-up position. The chip outlet of the chip feed casing is open at a lowermost end of a chip receiving space or below the lowermost end.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: December 29, 1998
    Assignee: TDK Corporation
    Inventors: Tsuyoshi Ito, Tetsuro Ito, Masayoshi Kobayashi
  • Patent number: 5798892
    Abstract: A magnetic tape apparatus for reading/writing data from/to a magnetic tape by magnetic heads. The magnetic tape apparatus includes a roller guide for guiding the magnetic tape, a magnetic head assembly having several magnetic heads, and a structure for aligning the magnetic tape to the magnetic heads, wherein the vertical position of the magnetic tape is determined by a lower flange of the roller guide. One feature of the present invention relates to the structure of the roller guide wherein the lower flange is separable from other members of the roller guide such that the vertical position of the magnetic head is the lower flange. Another feature of the present invention is a method for aligning the magnetic heads to a track of the magnetic tape wherein the vertical position of a keen edge formed on the lower flange assembled in the roller guide is detected by microscope.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: August 25, 1998
    Assignee: Fujitsu Limited
    Inventor: Masayoshi Kobayashi