Abstract: An analog delay circuit which includes an analog memory circuit wherein a plurality of memory cells each including a memory capacitor and a selection switch for the memory capacitor are arranged in a matrix includes row switches provided for the individual columns for individually being driven by row selection signals. A same clock signal from a clock generation circuit is supplied commonly to an X direction scanning circuit and a Y direction scanning circuit. The number of stages of registers of the X direction scanning circuit and the number of stages of registers of the Y direction scanning circuit are set so that they have no common divisor other than 1. Consequently, when the memory cells are to be selectively scanned, a same selection condition can be provided to all of the memory cells without relying upon the positions of the memory cells, and the parasitic capacitance connected to a signal write/read terminal is reduced.

Abstract: In a variable gain amplifier apparatus, wide input dynamic range can be secured and low noise characteristic can be obtained by employing first and second variable gain amplifiers have different noise characteristics and different saturation input levels and receive a same input signal. Output signals of the first and second variable gain amplifiers are added to each other to provide an output signal of the variable gain amplifier apparatus. Desired noise characteristic and saturation input level characteristic of the variable gain amplifier apparatus can be obtained by selecting the noise characteristics and the saturation input levels of the first and second variable gain amplifiers appropriately. This allows the variable gain amplifier apparatus to have a wide input dynamic range and low noise characteristic.

Abstract: A current source circuit has first and second mirror circuits in order to pull currents of equal values into or out of first and second terminals. The potentials at the first and second terminals are maintained equal to each other through the use of the current source circuit. By using an emitter-coupled logic circuit with a simple configuration for detecting the difference between currents, it is possible to produce a small hysteresis voltage with high reliability.

Abstract: A emitter coupled logic circuit is reduced in circuit scale, while maintaining the speed of shift registers and compatibility with analog circuits. When data held in the first self-holding circuit section 41 or the second self-holding section 42 is deleted, the threshold voltage VTH applied to the base electrodes of the first and third transistors Q41 and Q43 is set outside the logical amplitude. When data is transferred, also, the threshold voltage VTH is set at a value intermediate to the logical amplitude. Because of this the data held in the first and second self-holding circuit sections can be reliably deleted without an increase in the number of elements.

Abstract: A peak value detecting circuit has a peak voltage holding circuit, a voltage comparing section, a holding voltage control circuit, and a signal output circuit. The peak voltage holding circuit holds a peak value of an input signal voltage. The voltage comparing section compares the peak voltage held by the peak voltage holding circuit with an externally input signal voltage. The holding voltage control circuit controls the level of the peak voltage in accordance with the output given by the voltage comparing section as a result of the compare operation in the latter. The signal output circuit acts as a buffer in sending to the outside the peak voltage held by the peak voltage holding circuit. The output voltage from the signal output circuit is fed back as a reference voltage to a compare input terminal of the voltage comparing section and prevents any offset that may develop in the signal output circuit from appearing in the output signal voltage of the peak value detecting circuit.

Abstract: A multisound signal demodulator IC has a demodulator for demodulating L+R and L-R signals from a composite input signal and for producing a third signal M when it is present in the composite signal, a matrix circuit for producing L and R signals from the L+R and L-R signals, a pair of changeover switches for supplying either the L and R signals or the M signal to first and second output terminals, and a third changeover switch for supplying either the L+R or M signals to a third output terminal. The generation of the changeover devices are controlled by signals supplied to external control terminals. The IC is adapted for use in both television receviers and VTR's and is adaptable to use with different methods of multisound transmissions.

Abstract: The invention relates to a voltage to current converter suited for integration. The voltage to current converter combines the outputs of two voltage to current converting circuits whose operating input levels are different from each other so as to prevent the generation of direct current offset voltage. The voltage to current converter is suitable for the construction of a filtering circuit.

Abstract: A digital-to-analog convertor divides an input digital signal into a least significant bit group and a most significant bit group. The most significant bit group is converted using pulse amplitude modulation and the least significant bit group is converted using pulse width modulation, in which the pulse widths are varied symmetrically about predetermined time points within a conversion period in order to improve the linearity of the pulse width modulation conversion.

Abstract: A variable emphasis circuit comprises an operational amplifier for receiving an input signal, a modified integrator for receiving a first signal provided from the operational amplifier, and a dividing circuit for dividing the first signal to k times and 1-k times according to a control voltage. The 1-k times the first signal and a second signal provided from the modified integrator are fed back to the operational amplifier, and an output signal is formed from the second signal and the k times the first signal.

Abstract: A noise reduction circuit has a main signal path and an auxiliary signal path having the characteristics of a high-pass filter with a controllable cut-off frequency, a control circuit varies the cut-off frequency of the high-pass filter as a function of the auxiliary signal path output. The auxiliary signal path current is derived as a current source output so that the summing of the main signal and auxiliary signal can be accomplished by a single operational amplifier, without requiring a buffer amplifier as in known noise reduction circuits. The auxiliary signal path includes a voltage-to-current converter having differential inputs and differential outputs, with a PN junction pair and at least first and second common emitter transistor pairs connected to the differential outputs.

Abstract: A gain control circuit, which has particular utility in a compressor or expander of a noise reduction circuit, is comprised of first and second detectors for detecting the output signal from a variable gain amplifier and providing respective detector outputs for charging first and second capacitors, respectively. Such first and second capacitors have discharge paths in which first and second resistors are respectively interposed, and the charge on the first capacitor is employed as a control signal for determining the gain of the variable gain amplifier. Further, the first resistor is connected between the first and second capacitors so that the discharge current through the first resistor is dependent on the difference between the charge voltages on the first and second capacitors, whereby a relatively long recovery time can be obtained without adversely affecting the attack time even when the input signal to the variable gain amplifier is of low level.

Abstract: A voltage controlled variable gain circuit suitable for construction as an integrated circuit includes a first current divider comprised of two NPN transistors; a second current divider comprised of two NPN transistors, a control voltage for setting the gain of the circuit being supplied to the bases of a transistor of each current divider; an operational amplifier for producing a first signal in response to an input current, and output currents from each current divider; first and second current sources, each producing a constant current; a first differential amplifier comprised of two NPN transistors having emitters supplied with the constant current from the first current source and the collector of one transistor supplying a drive current to the first current divider; and a second differential amplifier comprised of two NPN transistors having emitters supplied with the constant current from the second current source and the collector of one transistor supplying a drive current to the second current divide

Abstract: A current amplifier for use with an input voltage comprises a current to voltage converting circuit which converts the input voltage to output currents, and a current multiplier circuit which multiplies the output currents from the voltage to current converting circuit.

Abstract: In a noise reduction circuit comprising a combining circuit which generates a combined signal in response to signals supplied thereto, a main channel which supplies an information signal substantially unchanged to the combining circuit, and an auxiliary channel which receives the information signal and which supplies a modified information signal to the combining circuit for combining with the unchanged information signal, the auxiliary channel includes a high pass filter with a variable cut-off frequency which generates a filtered output signal in response to the information signal supplied thereto, a voltage-current converting circuit which converts the voltage level of the filtered output signal to a current and which supplies the current to the combining circuit, and an amplitude limiting circuit which limits the amplitude of the current supplied to the combining circuit.

Abstract: A level detecting circuit for use in a noise reduction circuit and which produces a level detected output signal in response to an input signal, includes an operational amplifier with at least one feedback diode for logarithmically converting the input signal to produce a logarithmically converted signal; a first PN junction element comprised of a first diode supplied with the logarithmically converted signal; a second PN junction element comprised of a second diode connected in series with the first diode at a connection point, the series-circuit of the first and second diodes having a first saturation current; a first integrating capacitor having a first capacitance and connected to the connection point for producing an integrated signal; a third PN junction element comprised of series-connected third and fourth diodes connected in parallel with the series connection of the first and second diodes and having a second saturation current greater than the first saturation current; a second integrating capacito

Abstract: A noise reduction circuit for use in an audio signal recording/reproducing apparatus is comprised of a first signal path including a voltage-controlled amplifier for amplifying a signal supplied thereto with controllable gain and a differentiating circuit for differentiating at least that portion of the signal passing through the voltage-controlled amplifier within the audio range; a level detecting circuit for controlling the gain of the voltage-controlled amplifier in response to the level of the signal passing through the voltage-controlled amplifier; a feedback resistor connected as a negative feedback path with the first signal path for providing an upper limit to the gain imparted to the signal supplied to the noise reduction circuit; a subtraction circuit for subtracting the negatively fed back signals from the signal supplied to the noise reduction circuit to produce an input signal for the first signal path; a second resistor or a low-pass filter connected as a positive feedforward path between the i

Abstract: A noise reduction circuit for use in an audio signal recording/reproducing apparatus is comprised of a first signal path including a voltage-controlled amplifier for amplifying a signal supplied thereto with controllable gain and integrating circuit for integrating at least that portion of the signal passing through the voltage-controlled amplifier within the audio range; a level detecting circuit for controlling the gain of the voltage-controlled amplifier in response to the level of the signal passing through the voltage-controlled amplifier; a feedforward resistor connected in parallel with the first signal path for providing a lower limit to the gain imparted to the signal supplied to the noise reduction circuit; an adder circuit for adding the output signals from the first signal path and the feedforward resistor; a second resistor or a low-pass filter connected as a negative feedback path between the output of the adder circuit and the input of the first signal path for providing an upper limit to the g

Abstract: A level detecting circuit for producing a level detected output signal in response to an input signal includes a logarithmic converting amplifier which logarithmically converts the input signal into a logarithmically converted signal; a differential error amplifier which produces a logarithmically amplified signal in response to the logarithmically converted signal and at least one feedback signal; an integrating capacitor supplied with the logarithmically amplified signal through a PN junction for producing an integrated signal; a voltage dividing circuit for voltage dividing the integrated signal and the logarithmically amplified signal in accordance with a selected ratio and supplying at least one resultant voltage divided signal as the at least one feedback signal to the differential error amplifier; and an output PN junction for producing the level detected output signal in response to the integrated signal.

Abstract: A noise reduction circuit for use in an audio signal recording/reproducing apparatus includes a first filter circuit for providing frequency emphasis to a signal supplied thereto; a first signal path connected in series with the first filter circuit, and including a voltage-controlled amplifier for amplifying a signal supplied thereto with controllable gain and a second filter circuit for providing frequency emphasis to the signal passing through the voltage-controlled amplifier; a level detecting circuit for controlling the gain of the voltage-controlled amplifier in response to the level of the signal passing through the voltage-controlled amplifier; a resistor connected to the first signal path for reducing the effect of the frequency emphasis by the second filter circuit when the level of the signal passing through the voltage-controlled amplifier is reduced; and a low pass filter circuit connected with the first signal path for reducing the effect of the frequency emphasis by the first and second filter

Abstract: A gain control circuit particularly suitable for compressing or expanding the dynamic range of an audio signal, and thereby reducing noise produced during recording and playback comprises an input circuit receiving an input signal, first and second differential amplifiers each supplied from the input circuit with a signal derived from the input signal, with the amplifying elements of each being complementary to the amplifying elements of the other, a first pair of transistors having their emitters coupled to the output of the first differential amplifier and a second pair of transistors having their emitters coupled to the output of the second differential amplifier. The transistors of each pair are of the same conductivity type as the amplifying elements of the associated differential amplifier. The collectors of the transistors of each pair are jointed respectively to the collectors of the corresponding transistors of the other pair.