Patents by Inventor Masayuki Kitamura

Masayuki Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220270940
    Abstract: An abnormality detection method includes: supplying a gas controlled to a selected rate to a gas supply pipe via the gas pipe connected to the gas supply pipe, thereby introducing the gas into a reaction region of a processing container provided in a processing apparatus from a gas hole of the gas supply pipe; measuring a pressure inside the gas pipe by a pressure gauge attached to the gas pipe; and detecting an abnormality of at least one of the gas supply pipe and the gas pipe based on the pressure measured at the measuring.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 25, 2022
    Inventors: Shingo HISHIYA, Nobutoshi TERASAWA, Fumiaki NAGAI, Kazuaki SASAKI, Hiroaki KIKUCHI, Masayuki KITAMURA, Kazuo YABE, Motoshi FUKUDOME, Tatsuya MIYAHARA, Eiji KIKAMA, Yuki TANABE, Tomoyuki NAGATA
  • Patent number: 11393675
    Abstract: A substrate processing apparatus includes a chamber to accommodate a substrate. The apparatus includes a stage to support the substrate in the chamber. The apparatus includes an electrode disposed above the stage and containing aluminum. The electrode generates plasma from gas supplied into the chamber to form a first film on the substrate by the plasma. The apparatus further includes a second film formed on a surface of the electrode and containing aluminum and fluorine or containing aluminum and oxygen.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 19, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Yuya Matsubara, Masayuki Kitamura, Atsuko Sakata
  • Publication number: 20220195594
    Abstract: A semiconductor manufacturing apparatus includes a reaction chamber configured to perform a process on a semiconductor substrate using a gas mixture comprising a first gas, and a first path configured to exhaust resultant gas that comprises the first gas from the reaction chamber. The semiconductor manufacturing apparatus further includes a first trap provided in the first path and configured to extract at least a portion of the first gas from the resultant gas, and a second path in which the trap is not provided and configured to exhaust the resultant gas from the reaction chamber.
    Type: Application
    Filed: March 9, 2022
    Publication date: June 23, 2022
    Applicant: KIOXIA CORPORATION
    Inventors: Masayuki KITAMURA, Atsuko SAKATA, Satoshi WAKATSUKI
  • Patent number: 11355512
    Abstract: A semiconductor device includes a substrate, a logic circuit provided on the substrate, a wiring layer including a plurality of wirings that are provided above the logic circuit, a first insulating film below the wiring layer, a plug, and a second insulating film. Each of the wirings contains copper and extends along a surface plane of the substrate in a first direction. The wirings are arranged along the surface plane of the substrate in a second direction different from the first direction. The plug extends through the first insulating film in a third direction crossing the first and second directions and is electrically connected to one of the wirings. The plug contains tungsten. The second insulating film is provided between the first insulating film and the plug.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: June 7, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Jun Iijima, Masayoshi Tagami, Masayuki Kitamura, Satoshi Wakatsuki
  • Publication number: 20220165554
    Abstract: A method of manufacturing a semiconductor device includes placing a substrate in a housing, supplying first gas containing molybdenum to the housing to form a film that contains molybdenum, on the substrate, removing the substrate with the formed film from the hosing, and then supplying second gas containing chlorine to the housing to remove molybdenum deposited on a surface of the housing.
    Type: Application
    Filed: February 11, 2022
    Publication date: May 26, 2022
    Inventors: Katsuaki NATORI, Hiroshi TOYODA, Masayuki KITAMURA, Takayuki BEPPU
  • Patent number: 11282681
    Abstract: A method of manufacturing a semiconductor device includes placing a substrate in a housing, supplying first gas containing molybdenum to the housing to form a film that contains molybdenum, on the substrate, removing the substrate with the formed film from the hosing, and then supplying second gas containing chlorine to the housing to remove molybdenum deposited on a surface of the housing.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: March 22, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Katsuaki Natori, Hiroshi Toyoda, Masayuki Kitamura, Takayuki Beppu
  • Publication number: 20220085066
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes: (a) supplying an adsorbing material over an insulating film, wherein the adsorbing material is selected from the group consisting of H2O, HF, NO, NO2, NF3, and combinations thereof; (b) supplying a Mo material over the insulating film; (c) supplying a reducing agent over the insulating film; and (d) repeating the steps (a) to (c).
    Type: Application
    Filed: August 27, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Katsuaki NATORI, Hiroshi TOYODA, Koji YAMAKAWA, Takayuki BEPPU, Masayuki KITAMURA
  • Publication number: 20220085053
    Abstract: According to one embodiment, a semiconductor device includes: a stacked body including an insulating layer, and a conductive layer containing molybdenum; an aluminum oxide layer provided between the insulating layer and the conductive layer; and a protective layer in contact with the aluminum oxide layer, containing one of carbon, nitrogen, or sulfur bonded to aluminum in the aluminum oxide layer, and also in contact with the conductive layer.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Masayuki KITAMURA, Takuya HIROHASHI, Shigeru KINOSHITA, Hiroshi TOYOTA
  • Publication number: 20220076965
    Abstract: A semiconductor device includes a stacked body including a plurality of conductive layers insulated from each other, a semiconductor layer extending into the stacked body, and a charge storage layer located between one of the conductive layers and the semiconductor layer. The conductive layer contains tungsten and an auxiliary material. An amount of the auxiliary material is smaller than an amount of tungsten, and an oxide free energy of the auxiliary material is smaller than an oxide free energy of tungsten.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 10, 2022
    Inventors: Hiroaki MATSUDA, Masayuki KITAMURA
  • Publication number: 20220044925
    Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 10, 2022
    Applicant: Toshiba Memory Corporation
    Inventors: Masayuki KITAMURA, Takayuki BEPPU, Tomotaka ARIGA
  • Patent number: 11189489
    Abstract: In a manufacturing method of a semiconductor device according to one embodiment, a first gas containing a first metal element is introduced into a chamber having a substrate housed therein. Next, the first gas is discharged from the chamber using a purge gas. Subsequently, a second gas reducing the first gas is introduced into the chamber. Next, the second gas is discharged from the chamber using the purge gas. Further, a third gas different from the first gas, the second gas, and the purge gas is introduced into the chamber at least either at a time of discharging the first gas or at a time of discharging the second gas.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: November 30, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Masayuki Kitamura, Takayuki Beppu, Tomotaka Ariga
  • Patent number: 11177135
    Abstract: A mask member contains tungsten (W), boron (B), and carbon (C). The mask member includes a first portion in contact with a process film, the first portion, in which the terms of the composition ratio, which correspond to boron and carbon, are larger than the term of the composition ratio, which corresponds to tungsten, and a second portion in which the term of the composition ratio, which corresponds to tungsten, is larger than the terms of the composition ratio, which correspond to carbon and boron.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: November 16, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yuya Matsubara, Masayuki Kitamura, Atsuko Sakata
  • Patent number: 11139246
    Abstract: According to one embodiment, a semiconductor device includes: a semiconductor substrate; a first via provided on the semiconductor substrate; a metal wiring provided on the first via; and a second via provided on the metal wiring. One of the side surfaces facing each other in the first direction of the metal wiring and one of the side surfaces facing each other in the first direction of the second via are aligned in the first direction.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: October 5, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masayuki Kitamura, Atsushi Kato
  • Patent number: 11139173
    Abstract: A production method of a semiconductor device includes introducing a reduction gas for reducing metal to a space containing a target to be used as the semiconductor device. The method also includes introducing a material gas and a first gas simultaneously to the space on a basis of a predetermined partial pressure ratio after introducing the reduction gas, to form a film that contains the metal, on the target. The material gas etches the metal when only the material gas is flowed. The first gas is different from the material gas. The predetermined partial pressure ratio is a ratio of the material gas and the first gas.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: October 5, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Katsuaki Natori, Satoshi Wakatsuki, Masayuki Kitamura
  • Publication number: 20210305275
    Abstract: A semiconductor device includes a conductive film containing molybdenum and a metal element. The metal element has a melting point lower than the melting point of molybdenum and forms a complete solid solution with molybdenum. The metal element as a material for composing the conductive film is at least one selected from the group consisting of, for example, titanium, vanadium, and niobium.
    Type: Application
    Filed: August 27, 2020
    Publication date: September 30, 2021
    Applicant: Kioxia Corporation
    Inventors: Katsuaki NATORI, Hiroshi TOYODA, Masayuki KITAMURA, Takayuki BEPPU, Koji YAMAKAWA, Kenichiro TORATANI
  • Publication number: 20210265266
    Abstract: A semiconductor device includes an interconnect including (i) a first layer, and (ii) a second layer provided on the first layer and including copper. The device also includes a plug provided on the interconnect and including (a) a third layer including titanium and nitrogen, and (b) a fourth layer provided on the third layer and including tungsten. A concentration of chlorine in the third layer is less than or equal to 5.0×1021 atoms/cm3, and a concentration of oxygen at the interface between the third layer and the fourth layer is less than or equal to 5.0×1021 atoms/cm3.
    Type: Application
    Filed: February 24, 2021
    Publication date: August 26, 2021
    Applicant: Kioxia Corporation
    Inventors: Masayuki KITAMURA, Atsushi KATO, Hiroaki MATSUDA
  • Publication number: 20210233872
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
    Type: Application
    Filed: April 15, 2021
    Publication date: July 29, 2021
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Satoshi WAKATSUKI, Masayuki KITAMURA, Atsuko SAKATA
  • Patent number: 11011369
    Abstract: There is provided a method of forming a carbon film on a workpiece, which includes: loading the workpiece into a process chamber; supplying a gas containing a boron-containing gas into the process chamber to form a seed layer composed of a boron-based thin film on a surface of the workpiece; and subsequently, supplying a hydrocarbon-based carbon source gas and a pyrolysis temperature lowering gas containing a halogen element and which lowers a pyrolysis temperature of the hydrocarbon-based carbon source gas into the process chamber, heating the hydrocarbon-based carbon source gas to a temperature lower than the pyrolysis temperature to pyrolyze the hydrocarbon-based carbon source gas, and forming the carbon film on the workpiece by a thermal CVD.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: May 18, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Akira Shimizu, Masayuki Kitamura, Yosuke Watanabe
  • Patent number: 11004804
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a plurality of insulating layers provided on the substrate. The device further includes a plurality of electrode layers provided on the substrate alternately with the plurality of insulating layers and including metal atoms and impurity atoms different from the metal atoms, lattice spacing between the metal atoms in the electrode layers being greater than lattice spacing between the metal atoms in an elemental substance of the metal atoms.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: May 11, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Satoshi Wakatsuki, Masayuki Kitamura, Atsuko Sakata
  • Publication number: 20210083057
    Abstract: A semiconductor device according to an embodiment includes an oxide film containing first element and a conductive film provided to be in contact with the oxide film, containing metal element and oxygen element, and having conductivity. A range of a volume density of the oxygen element in the conductive film is different between cases where the metal element are tungsten (W), molybdenum (Mo), titanium (Ti), chromium (Cr), vanadium (V), iron (Fe), copper (Cu), tantalum (Ta), or niobium (Nb).
    Type: Application
    Filed: March 13, 2020
    Publication date: March 18, 2021
    Applicant: Kioxia Corporation
    Inventor: Masayuki KITAMURA