Patents by Inventor Masayuki Kojima
Masayuki Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6436753Abstract: An operational margin of a memory of a semiconductor integrated circuit device including an SRAM is improved. In order to set the Vth of driving MISFETs Qd, transfer MISFETs Qt and MISFETs for load resistance QL forming memory cells of an SRAM, relatively and intentionally higher than the Vth of predetermined MISFETs of SRAM peripheral circuits and logic circuits, such as a microprocessor, an impurity introduction step is introduced to set the Vth of the driving MISFETs Qd, transfer MISFETs Qt and MISFETs for load resistance, separately from an impurity introduction step for setting the Vth of the predetermined MISFETs.Type: GrantFiled: August 11, 1999Date of Patent: August 20, 2002Assignee: Hitachi, Ltd.Inventors: Shuji Ikeda, Yasuko Yoshida, Masayuki Kojima, Kenji Shiozawa, Mitsuyuki Kimura, Norio Nakagawa, Koichiro Ishibashi, Yasuhisa Shimazaki, Kenichi Osada, Kunio Uchiyama
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Patent number: 6423242Abstract: When in a chamber, an upper electrode and a lower electrode (suscepter) are provided opposite to each other and with a to-be-treated substrate supported by the lower electrode, the high-frequency electric field is formed between the upper electrode and the lower electrode to generate plasma of the process gas while introducing the process gas into the chamber held to the reduced pressure, and an etching is provided to the to-be-treated substrate with this plasma, the high frequency in the range from 50 to 150 MHZ, for example, 60 MHz, is applied to the upper electrode, and the high frequency in the range from 1 to 4 MHz, for example, 2 MHz, is applied to the lower electrode.Type: GrantFiled: November 10, 1999Date of Patent: July 23, 2002Assignee: Tokyo Electron LimitedInventors: Masayuki Kojima, Yoshifumi Tahara, Masayuki Tomoyasu, Akira Koshiishi
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Patent number: 6403446Abstract: Manufacturing a semiconductor device avoiding an increase of transistor leak current or reduction of the withstanding voltage characteristics is by at least one of: The pad oxide film is removed along the substrate surface from the upper edge of the groove over a distance ranging from 5 to 40 nm: The exposed surface of the semiconductor substrate undergoes removal by isotropic etching within 20 nm; and oxidizing a groove portion formed in a semiconductor substrate in an oxidation environment with a gas ratio of hydrogen (H2) to oxygen (O2) being less than or equal to 0.5, an increase of the curvature radius beyond 3nm is achieved without associating the risk of creation of any level difference on the substrate surface at or near the upper groove edge portions in a groove separation structure.Type: GrantFiled: March 28, 2000Date of Patent: June 11, 2002Assignee: Hitachi, Ltd.Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Yasuko Yoshida, Norio Suzuki, Masayuki Kojima, Kota Funayama
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Publication number: 20020043340Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: ApplicationFiled: May 3, 2001Publication date: April 18, 2002Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Publication number: 20020043339Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: ApplicationFiled: August 31, 2001Publication date: April 18, 2002Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Publication number: 20020023720Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: ApplicationFiled: November 2, 2001Publication date: February 28, 2002Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Publication number: 20020013063Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: ApplicationFiled: July 31, 2001Publication date: January 31, 2002Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Publication number: 20020001963Abstract: A fabrication method of a semiconductor integrated circuit device comprises, in an SAC process or HARC process, subjecting a semiconductor substrate to plasma etching to make contact holes in an oxide film made of a silicon oxide film formed on the semiconductor substrate. For improving the ease-in-etching property of the silicon oxide film and selectivity to a nitride film, a residence time of an etching gas within a chamber is so set as to be in a range where selectivity to an insulating film made of silicon nitride is improved by using etching conditions of a low pressure and a large flow rate of the etching gas of C5H8/O2/Ar.Type: ApplicationFiled: June 29, 2001Publication date: January 3, 2002Inventors: Masahiro Tadokoro, Masahiro Shioya, Masayuki Kojima, Takenobu Ikeda
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Publication number: 20010042919Abstract: The invention relates to a method for forming connection holes reliably by making contact resistance low and uniform in semiconductor devices. Insulating layer 3, that includes SOG layer 7, is plasma etched using an etching gas with a small quantity of a gas with a low C/F ratio, such as CHF3, mixed with a gas with a high C/F ratio, such as C4F8/Ar/O2 at a ratio of 1:3.Type: ApplicationFiled: September 1, 1999Publication date: November 22, 2001Inventors: Manabu Tomita, Takashi Hayakawa, Masayuki Yasuda, Michio Nishimura, Minoru Ohtsuka, Masayuki Kojima, Kazuo Yamazaki
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Patent number: 6307217Abstract: A static random access memory comprising memory cells each composed of transfer MISFETs controlled by word lines and of a flip-flop circuit made of driver MISFETs and load MISFETs. The top of the load MISFETs is covered with supply voltage lines so that capacitor elements of a stacked structure are formed between the gate electrodes of the load MISFETs and the supply voltage lines.Type: GrantFiled: January 14, 1994Date of Patent: October 23, 2001Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.Inventors: Shuji Ikeda, Satoshi Meguro, Kyoichiro Asayama, Eri Fujita, Koichiro Ishibashi, Toshiro Aoto, Sadayuki Morita, Atsuyoshi Koike, Masayuki Kojima, Yasuo Kiguchi, Kazuyuki Suko, Fumiyuki Kanai, Naotaka Hashimoto, Toshiaki Yamanaka
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Publication number: 20010023965Abstract: A static random access memory comprising memory cells each composed of transfer MISFETs controlled by word lines and of a flip-flop circuit made of driver MISFETs and load MISFETs. The top of the load MISFETs is covered with supply voltage lines so that capacitor elements of a stacked structure are formed between the gate electrodes of the load MISFETs and the supply voltage lines.Type: ApplicationFiled: May 17, 2001Publication date: September 27, 2001Inventors: Shuji Ikeda, Satoshi Meguro, Kyoichiro Asayama, Eri Fujita, Koichiro Ishibashi, Toshiro Aoto, Sadayuki Morita, Atsuyoshi Koike, Masayuki Kojima, Yasuo Kiguchi, Kazuyuki Suko, Fumiyuki Kanai, Naotaka Hashimoto, Toshiaki Yamanaka
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Publication number: 20010009177Abstract: A system and method for two-sided etch of a semiconductor substrate. Reactive species are generated and flowed toward a substrate for processing. A diverter is positioned between the generation chamber and the substrate. A portion of the reactive species flows through the diverter for processing the front of the substrate. Another portion is diverted around the substrate to the backside for processing. A flow restricter is placed between the substrate and the exhaust system to increase the residence time of reactive species adjacent to the backside.Type: ApplicationFiled: July 12, 1999Publication date: July 26, 2001Inventors: LAIZHONG LUO, YING HOLDEN, RENE GEORGE, ROBERT GUERRA, ALLAN WEISNOSKI, NICOLE KUHL, CRAIG RANFT, SAI MANTRIPRAGADA, MASAYUKI KOJIMA, MAKI SHIMODA, TAKAHIRO CHIBA, HIDEYUKI SUGA, KAZUBIKO KAWAI
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Patent number: 6254721Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: GrantFiled: February 15, 2000Date of Patent: July 3, 2001Assignee: Hitachi, Ltd.Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara
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Patent number: 6251258Abstract: In an electrolytic bath, an extraction part extracts heavy metal in the internal organs of scallops into an acid solution. A direct current voltage is applied between electrodes, which are provided in the acid solution, to deposit the heavy metal in the acid solution on the electrodes. If the deposit efficiency deteriorates, the polarity applied between the electrodes is reversed from the polarity in the deposition of the heavy metal in a neutral or alkali electrolytic solution. Consequently, the heavy metal is removed from the electrodes. Since arsenic is dissolved in the acid solution, an alkali liquid and a flocculant are added to the acid solution to sediment arsenic.Type: GrantFiled: October 5, 1999Date of Patent: June 26, 2001Assignee: Hitachi Plant Engineering & Construction Co., Ltd.Inventors: Masayuki Kojima, Toshiyuki Hishinuma, Hiroyuki Ichikawa, Hiroshi Asakura, Masataka Kasai
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Patent number: 6191045Abstract: In order to provide a method of treating a multilayer including metal and polysilicon for use in a conductor or a gate electrode of a semiconductor device with high accuracy at a high selectivity, the temperature of a sample is maintained at 100° C. or higher at the time of etching a metal film to increase the etch rate of the metal film. In order to suppress the etch rate of a polysilicon film and prevent side etching, an oxygen gas is added to a gas containing a halogen element. In order to suppress the etch rate of a silicon oxide film at the time of etching the polysilicon film, the etching is performed with etch parameters which are divided into those for the metal film and those for the polysilicon film. In the etching performed to the multilayer containing metal and polysilicon, by etching the metal film at a high temperature of 100° C. or higher, the etch rate of the metal film becomes high. Consequently, there is no partial etch residue of the metal film and a barrier film.Type: GrantFiled: April 30, 1999Date of Patent: February 20, 2001Assignee: Hitachi, Ltd.Inventors: Motohiko Yoshigai, Hiroshi Hasegawa, Hiroshi Akiyama, Takafumi Tokunaga, Tadashi Umezawa, Masayuki Kojima, Kazuo Nojiri, Hiroshi Kawakami, Kunihiko Katou
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Patent number: 6156663Abstract: Provided is a method of processing a sample by generating plasma by an electromagnetic wave, wherein a material containing carbon, such as silicon carbide (Sic), is disposed in a vacuum container serving as a discharge region. The inside of an etching chamber is cleaned by O.sub.2 cleaning treatment by using a sheet type dry etching apparatus, and after an inner wall temperature of the etching chamber is set and controlled, a sample is conveyed into the etching chamber, and a TiN cap layer, an Al--Cu alloy layer and a TiN barrier layer are plasma-etched in order by using BCl.sub.3 /Cl.sub.2 /CH.sub.4 /Ar gases with the pattern of a resist film as a mask.Type: GrantFiled: September 27, 1996Date of Patent: December 5, 2000Assignee: Hitachi, Ltd.Inventors: Katsuya Watanabe, Saburo Kanai, Ryoji Hamasaki, Tsuyoshi Yoshida, Yutaka Omoto, Masayuki Kojima, Syunji Sasabe, Tadamitsu Kanekiyo, Takazumi Ishizu
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Patent number: 6132180Abstract: An automatic pumping apparatus utilizing wave motion comprises one or more than one sink-and-float members provided so as to move up and down in accordance with a wave motion, positioned below the respective sink-and-float members, connected to the respective sink-and-float members via a transmission mechanism and adapted to slidingly move in respective one-end-open fixed cylinders in accordance with the up and down movement of the sink-and-float members, the horizontal cross sectional area of each piston being made small relative to that of each sink-and-float member and inversely proportional to the pumping height, whereby water can be pumped to a reservoir tank through pumping pipes extending from the other ends of the cylinders to positions higher than the ranges of up and down movements of the sinkand-float members by the operations of pistons.Type: GrantFiled: October 14, 1997Date of Patent: October 17, 2000Inventor: Masayuki Kojima
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Patent number: 6100959Abstract: A conveyor for a photo-processing apparatus having an exposing section and a developing section is disclosed. The conveyor conveys the photo-sensitive material from the exposing section to the developing section. A power source for conveying a photo-sensitive material in a vertical direction and a guide mechanism for guiding the photo-sensitive material in a lateral direction are installed in the conveyor. The lateral guidance of the photo-sensitive material by the guide mechanism is interlocked with the vertical conveyance by the power source to reduce the number of motors.Type: GrantFiled: March 31, 1998Date of Patent: August 8, 2000Assignee: Noritsu Koki Co., Ltd.Inventors: Masayuki Kojima, Seiji Minamiyama
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Patent number: 6090684Abstract: A shallow groove isolation structure (SGI) electrically insulates adjoining transistors on a semiconductor substrate. A pad oxide film is formed on the semiconductor substrate and an oxidation inhibition film is formed on the pad oxide film. Parts of the oxide inhibition film and pad oxide film are removed to form the groove. In particular, the pad oxide film is removed from an upper edge of the groove within a range of 5 to 40 nm. A region of the groove is oxidized in an oxidation environment with a cast ratio of hydrogen (H.sub.2) to oxygen (O.sub.2) being less than or equal to 0.5. At this ratio, the oxidizing progresses under low stress at the upper groove edges of the substrate thereby enabling rounding of the upper groove edges without creating a level difference at or near the upper groove edge on the substrate surface.Type: GrantFiled: July 29, 1999Date of Patent: July 18, 2000Assignee: Hitachi, Ltd.Inventors: Norio Ishitsuka, Hideo Miura, Shuji Ikeda, Yasuko Yoshida, Norio Suzuki, Masayuki Kojima, Kota Funayama
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Patent number: 6036816Abstract: Disclosed is apparatus for treating samples, and a method of using the apparatus. The apparatus includes processing apparatus (a) for treating the samples (e.g., plasma etching apparatus), (b) for removing residual corrosive compounds formed by the sample treatment, (c) for wet-processing of the samples and (d) for dry-processing the samples. A plurality of wet-processing treatments of a sample can be performed. The wet-processing apparatus can include a plurality of wet-processing stations. The samples can either be passed in series through the plurality of wet-processing stations, or can be passed in parallel through the wet-processing stations.Type: GrantFiled: June 6, 1995Date of Patent: March 14, 2000Assignee: Hitachi, Ltd.Inventors: Masayuki Kojima, Yoshimi Torii, Michimasa Hunabashi, Kazuyuki Suko, Takashi Yamada, Keizo Kuroiwa, Kazuo Nojiri, Yoshinao Kawasaki, Yoshiaki Sato, Ryooji Fukuyama, Hironobu Kawahara