Patents by Inventor Masayuki Tanaka

Masayuki Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9294654
    Abstract: The present invention provides a high-resolution image generation method which is capable of generating a high-resolution image from multiple low-resolution images having displacements without using an iterative computation. A high-resolution image generation method for generating a high-resolution image from multiple low-resolution images having displacements, comprises a first step of performing a registration processing of multiple low-resolution images; a second step of generating an average image having the undefined pixels and a weighted image based on the displacement information obtained by the registration processing and multiple low-resolution images; and a third step of generating the high-resolution image by estimating pixel values of the undefined pixels included in the average image.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: March 22, 2016
    Assignee: TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Masayuki Tanaka, Masatoshi Okutomi
  • Publication number: 20160071948
    Abstract: According to a nonvolatile memory device including a semiconductor layer, a control electrode, a memory layer provided between the semiconductor layer and the control electrode, a first insulating film provided between the semiconductor layer and the memory layer, and a second insulating film provided between the control electrode and the memory layer. The second insulating film includes a metal oxide having a monoclinic structure.
    Type: Application
    Filed: March 3, 2015
    Publication date: March 10, 2016
    Inventors: Kenichiro TORATANI, Masayuki TANAKA, Takashi FURUHASHI
  • Publication number: 20160064406
    Abstract: According to one embodiment, a semiconductor memory device includes a stacked body; a semiconductor body; and charge storage film. The stacked body includes the plurality of electrode layers separately stacked each other. The semiconductor body is provided in the stacked body and extends in a stack direction of the stacked body and includes an oxide semiconductor. The charge storage film is provided between the semiconductor body and the plurality of electrode layers.
    Type: Application
    Filed: February 4, 2015
    Publication date: March 3, 2016
    Inventors: Katsuaki NATORI, Masayuki Tanaka, Keiichi Sawa, Tetsuya Kai, Shinji Mori
  • Publication number: 20160048422
    Abstract: An error detection device includes: a writing portion configured to write, in an address of the storage, first data including a first error determination code in which a different error detection rule is applied in association with the address; a reading portion configured to read the first data from the storage as second data; and a detector configures to detect an error, using a second error determination code of the second data.
    Type: Application
    Filed: June 1, 2015
    Publication date: February 18, 2016
    Inventor: Masayuki Tanaka
  • Publication number: 20160035740
    Abstract: According to an embodiment, a non-volatile memory device includes electrodes, an inter-layer insulating film between the electrodes and at least one semiconductor layer extending through the electrodes and the inter-layer insulating film. The device includes a charge storage layer between the semiconductor layer and each electrode, a first insulating film between the charge storage layer and the semiconductor layer, and a second insulating film. The second insulating film includes a first portion between the charge storage layer and each electrode, a second portion between each electrode and the inter-layer insulating film, and a third portion that links the first portion and the second portion. In a cross-section of the third portion parallel to the first direction and a second direction toward each electrode from the charge storage layer, a curved surface on the charge storage layer side has a curvature radius larger than a surface on the electrodes side.
    Type: Application
    Filed: January 15, 2015
    Publication date: February 4, 2016
    Inventors: Keiichi SAWA, Masayuki TANAKA, Katsuaki NATORI
  • Patent number: 9250121
    Abstract: An imaging apparatus has a color filter array, an image sensor, and a differential information acquisition unit. In the color filter array, including five or more types of color filters are arranged in a two dimensional form. The image sensor has a plurality of pixels covered by the color filters, and the plurality of pixels generate pixel signals. The acquisition unit designates one of the pixels covered by the color filters of interest as a pixel of interest one pixel at a time in order. The acquisition unit calculates first differential information based on pixel signals generated by two of the pixels arranged on both sides of the pixel of interest along the first direction. The acquisition unit calculates second differential information based on pixel signals generated by two of the pixels arranged on both sides of the pixel of interest along the second direction.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: February 2, 2016
    Assignee: OLYMPUS CORPORATION
    Inventors: Masayuki Tanaka, Yusuke Monno, Masatoshi Okutomi, Sunao Kikuchi, Yasuhiro Komiya
  • Patent number: 9224874
    Abstract: A semiconductor storage device according to the present embodiment includes a semiconductor substrate. A tunnel insulating film is provided on the semiconductor substrate. A charge accumulation layer is provided on the tunnel insulating film. An intermediate dielectric film is provided on the charge accumulation layer. A control gate electrode is formed on the intermediate dielectric film. The intermediate dielectric film includes a laminated film of silicon oxide films of multiple layers and silicon nitride films of at least one layer, and a silicon oxynitride film provided between adjacent ones of the silicon oxide films and the silicon nitride films.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: December 29, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhiro Matsuo, Masayuki Tanaka, Masao Shingu, Kensei Takahashi, Fumiki Aiso
  • Patent number: 9219379
    Abstract: Disclosed herein is an electronic apparatus, including an electric power receiving portion receiving an electric power from a power feeding apparatus by using a magnetic field, and a detecting portion detecting presence or absence of a foreign object between said power feeding apparatus and said detecting portion.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: December 22, 2015
    Assignee: SONY CORPORATION
    Inventors: Yoichi Uramoto, Masayuki Tanaka
  • Publication number: 20150362706
    Abstract: A wide-angle imaging device configured to photograph a first range, having an imaging element that photographs an image at a second range, wherein the first range has an angle of view wider than the second range, a visual field switching optical system comprising at least one optical element, and an optical system driving mechanism that moves the optical element of the visual field switching optical system. The optical element has a refractive type prism that refracts light incident from a visual field in a direction inclined with respect to an optical axis direction to collect the light to the imaging element.
    Type: Application
    Filed: January 14, 2014
    Publication date: December 17, 2015
    Applicant: OMRON Corporation
    Inventors: Hideki CHUJO, Jun NAKAICHI, Seriya IGUCHI, Hayami HOSOKAWA, Masayuki TANAKA
  • Patent number: 9209315
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor substrate; an element isolation insulating film buried in the semiconductor substrate so as to isolate adjacent element; a memory cell having a first insulating film and a charge accumulation film; a second insulating film formed on the charge accumulation films of the memory cells and the element isolation insulating film; and a control electrode film formed on the second insulating film. An upper surface of the element isolation insulating film is lower than an upper surface of the charge accumulation film, the second insulating film is provided with a cell upper portion on the charge accumulation film and an inter-cell portion on the element isolation insulating film, and a dielectric constant of the cell upper portion is lower than a dielectric constant of the inter-cell portion.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayuki Tanaka
  • Patent number: 9188480
    Abstract: The color filter array 21a comprises seven or more types of color filters including a first color filter. The seven or more types color filters have different spectral sensitivity characteristics. The seven or more types of color filters are arranged in a two-dimensional form. Among the seven or more types of color filters, at least two types of color filters are designated as a color filter of interest. Two color filters arranged at a first interval on both sides of the color filter of interest along a first direction are of the same type. Two color filters arranged at a second interval on both sides of the color filter of interest along a second direction that is different from the first direction are of the same type. Among the color filters, at least one type of color filter have a density higher than that of the other types of color filters, thereby realizing acquisition of highly accurate gradient information from a multiband color filter array.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: November 17, 2015
    Assignees: OLYMPUS CORPORATION, TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Masayuki Tanaka, Yusuke Monno, Masatoshi Okutomi, Sunao Kikuchi, Yasuhiro Komiya
  • Publication number: 20150275369
    Abstract: According to one embodiment, a gas supply pipe has a first gas pipe configured to blow a gas which has flowed from an inflow opening via first gas blow holes arranged along a longitudinal direction, and a second gas pipe provided in parallel with the first gas pipe. The second gas pipe has second gas blow holes arranged along the longitudinal direction, and allows the gas to flow in a direction opposite to the first gas pipe.
    Type: Application
    Filed: March 10, 2015
    Publication date: October 1, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takahiro TERADA, Takuya MATSUDA, Kaori DEURA, Masayuki TANAKA, Aya WATASE
  • Patent number: 9142685
    Abstract: A nonvolatile semiconductor memory device includes a semiconductor portion, a first oxygen-containing portion located on the semiconductor portion, a silicon-containing portion located on the first oxygen-containing portion, a first film located on the silicon-containing portion and including a lamination of a first portion containing silicon and oxygen and a second portion containing silicon and nitrogen, a first high dielectric insulating portion located on the first film and having an oxide-containing yttrium, hafnium or aluminum, a second oxygen-containing portion located on the first high dielectric insulating portion, a second high dielectric insulating portion located on the second oxygen-containing insulating portion and having an oxide-containing yttrium, hafnium or aluminum, a third oxygen-containing portion located on the second high dielectric insulating portion, and a second film located on the third oxygen-containing portion.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: September 22, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhiro Matsuo, Masayuki Tanaka, Takeo Furuhata, Koji Nakahara
  • Publication number: 20150263531
    Abstract: Provided is a non-contact electric power feeding system including an electric power feeding device, and an electric power receiving device configured to receive electric power fed from the electric power feeding device. The electric power feeding device includes a primary-side coil, a driver, a primary-side control unit, and a primary-side communication unit. The electric power receiving device includes a secondary-side coil, a rectifier unit, a regulator, a secondary-side communication unit, and a secondary-side control unit.
    Type: Application
    Filed: July 2, 2013
    Publication date: September 17, 2015
    Applicant: Sony Corporation
    Inventors: Osamu Kozakai, Hiroaki Nakano, Shinichi Fukuda, Masayuki Tanaka
  • Publication number: 20150263013
    Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a first electric charge storage layer on the tunnel insulating film, a first insulating layer on the first electric charge storage layer, a second electric charge storage layer on the first insulating layer and including a metal containing layer, a first metal diffusion suppressing layer on the second electric charge storage layer to suppress diffusion of metal contained in the second electric charge storage layer, a second insulating layer on the first metal diffusion suppressing layer, and a control electrode on the second insulating layer.
    Type: Application
    Filed: February 9, 2015
    Publication date: September 17, 2015
    Inventors: Takashi FURUHASHI, Atsushi MURAKOSHI, Kenichiro TORATANI, Masayuki TANAKA, Yoshio OZAWA
  • Publication number: 20150255482
    Abstract: A semiconductor storage device according to an embodiment includes a semiconductor layer. A tunnel dielectric film is formed on the semiconductor layer. A charge accumulation layer is formed on the tunnel dielectric film. A block film is formed on the charge accumulation layer. A control gate is formed on the block film. The block film includes a metal oxide film containing nitrogen in a concentration range equal to or lower than 5×1021 atoms/cm3 and consisting mainly of aluminum.
    Type: Application
    Filed: June 20, 2014
    Publication date: September 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kensei TAKAHASHI, Kazuhiro Matsuo, Fumiki Aiso, Masao Shingu, Masayuki Tanaka
  • Patent number: 9117665
    Abstract: In accordance with an embodiment, a nonvolatile semiconductor memory device includes a substrate including a semiconductor layer including an active region, a first insulating film on the active region, a charge storage layer on the first insulating film, an element isolation insulating film defining the active region, a second insulating film, and a control electrode on the second insulating film. The top surface of the element isolation insulating film is placed at a height between the top surface and the bottom surface of the charge storage layer, thereby forming a step constituted of the charge storage layer and the element isolation insulating film. The second insulating film covers the step and the charge storage layer. The second insulating film includes a first silicon oxide film and a first silicon nitride film on the first silicon oxide film. Nitrogen concentration in the first silicon nitride film is non-uniform.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: August 25, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Masayuki Tanaka
  • Publication number: 20150228662
    Abstract: A nonvolatile semiconductor memory device includes a semiconductor portion, a first oxygen-containing portion provided on the semiconductor portion, a silicon-containing portion provided on the first oxygen-containing portion, a first film provided on the silicon-containing portion and including a lamination of a first portion containing silicon and oxygen and a second portion containing silicon and nitrogen, a first high dielectric insulating portion provided on the first film and having an oxide-containing yttrium, hafnium or aluminum, a second oxygen-containing portion provided on the first high dielectric insulating portion, a second high dielectric insulating portion provided on the second oxygen-containing insulating portion and having an oxide-containing yttrium, hafnium or aluminum, a third oxygen-containing portion provided on the second high dielectric insulating portion, and a second film provided on the third oxygen-containing portion.
    Type: Application
    Filed: April 27, 2015
    Publication date: August 13, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro MATSUO, Masayuki TANAKA, Takeo FURUHATA, Koji NAKAHARA
  • Patent number: 9087910
    Abstract: According to one embodiment, a nonvolatile semiconductor storage device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge accumulation film formed on the first insulating film, a second insulating film formed on the charge accumulation film, and a control electrode formed on a second insulating film, and one of the first and the second insulating film includes a layer containing nitrogen, a layer that is formed on the layer containing nitrogen and that includes a first oxygen containing aluminum atoms and oxygen atoms, and a layer that is formed on the layer including the first oxygen and that includes a second oxygen containing silicon atoms and oxygen atoms; and a concentration of the aluminum atoms is from 1E12 atoms/cm2 to 1E16 atoms/cm2.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: July 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichiro Toratani, Masayuki Tanaka
  • Publication number: 20150200307
    Abstract: A semiconductor storage device according to the present embodiment includes a semiconductor substrate. A tunnel insulating film is provided on the semiconductor substrate. A charge accumulation layer is provided on the tunnel insulating film. An intermediate dielectric film is provided on the charge accumulation layer. A control gate electrode is formed on the intermediate dielectric film. The intermediate dielectric film includes a laminated film of silicon oxide films of multiple layers and silicon nitride films of at least one layer, and a silicon oxynitride film provided between adjacent ones of the silicon oxide films and the silicon nitride films.
    Type: Application
    Filed: March 7, 2014
    Publication date: July 16, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: KAZUHIRO MATSUO, MASAYUKI TANAKA, MASAO SHINGU, KENSEI TAKAHASHI, FUMIKI AISO