Abstract: An integrated circuit including an operating circuit portion which requires a predetermined voltage in order to function properly, a charge pump circuit for providing a high voltage output equal to the predetermined voltage from a lower voltage input, a terminal for receiving voltage from a source of external voltage, and a circuit for selectively providing voltage to the operating circuit portion of the integrated circuit from the terminal if the level of voltage detected at the terminal from the external voltage source is above the predetermined voltage and for providing voltage to the operating circuit portion from the output of the charge pump if the voltage detected at the terminal is less than the predetermined level.

Abstract: An integrated circuit arrangement for providing erase voltages to a flash EEPROM memory array including one charge pump for generating a first high voltage with substantial current which may be used for application to the source terminals of flash EEPROM memory cells during erase and to the gate terminals of flash EEPROM memory cells during programming, and another charge pump for generating a second lower voltage which may be used for application to the drain terminals of flash EEPROM memory cells during programming.