Patents by Inventor Mathew Accapadi
Mathew Accapadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20130290666Abstract: Management of a UNIX-style storage pools is enhanced by specially managing one or more memory management inodes associated with pinned and allocated pages of data storage by providing indirect access to the pinned and allocated pages by one or more user processes via a handle, while preventing direct access of the pinned and allocated pages by the user processes without use of the handles; scanning periodically hardware status bits in the inodes to determine which of the pinned and allocated pages have been recently accessed within a pre-determined period of time; requesting via a callback communication to each user process to determine which of the least-recently accessed pinned and allocated pages can be either deallocated or defragmented and compacted; and responsive to receiving one or more page indicators of pages unpinned by the user processes, compacting or deallocating one or more pages corresponding to the page indicators.Type: ApplicationFiled: June 26, 2013Publication date: October 31, 2013Applicant: IBM CORPORATIONInventors: Mathew Accapadi, Grover C. Davidson, II, Dirk Michel, Bret R. Olszewski
-
Publication number: 20130227549Abstract: Systems, methods and computer program products may provide managing utilization of one or more physical processors in a shared processor pool. A method of managing utilization of one or more physical processors in a shared processor pool may include determining a current amount of utilization of the one or more physical processors and generating an instruction message. The instruction message may be at least partially determined by the current amount of utilization. The method may further include sending the instruction message to a guest operating system, the guest operating system having a number of enabled virtual processors.Type: ApplicationFiled: February 23, 2012Publication date: August 29, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mathew Accapadi, Grover C. Davidson, II, Dirk Michel, Bret R. Olszewski
-
Patent number: 8499138Abstract: Management of a UNIX-style storage pools is enhanced by specially managing one or more memory management inodes associated with pinned and allocated pages of data storage by providing indirect access to the pinned and allocated pages by one or more user processes via a handle. Direct access of the pinned and allocated pages by the user processes without use of the handles is prevented. Hardware status bits in the inodes are scanned to determine which pinned and allocated pages have been recently accessed and callback communication to each user process is used to determine which of the least-recently accessed pages can be deallocated, defragmented and compacted.Type: GrantFiled: June 30, 2010Date of Patent: July 30, 2013Assignee: International Business Machines CorporationInventors: Mathew Accapadi, Grover C Davidson, II, Dirk Michel, Bret R Olszewski
-
Patent number: 8489824Abstract: A method, system, and computer usable program product for selective memory compression for multi-threaded applications are provided in the illustrative embodiments. An identification of a memory region that is shared by a plurality of threads in an application is received at a first entity in a data processing system. A request for a second entity in the data processing system to keep the memory region uncompressed when compressing at least one of a plurality of memory regions that comprise the memory region is provided from the first entity to the second entity.Type: GrantFiled: September 20, 2010Date of Patent: July 16, 2013Assignee: International Business Machines CorporationInventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
-
Publication number: 20130179616Abstract: Interrupt-intensive and interrupt-driven processes are managed among a plurality of virtual processors, wherein each virtual processor is associated with a physical processor, wherein each physical processor may be associated with a plurality of virtual processors, and wherein each virtual processor is tasked to execute one or more of the processes, by determining which of a plurality of the processes executing among a plurality of virtual processors are being or have been driven by at least a minimum count of interrupts over a period of operational time; selecting a subset of the plurality of virtual processors to form a sequestration pool; migrating the interrupt-intensive processes on to the sequestration pool of virtual processors; and commanding by a computer a bias in delivery or routing of the interrupts to the sequestration pool of virtual processors.Type: ApplicationFiled: January 5, 2012Publication date: July 11, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
-
Patent number: 8359449Abstract: A method manages memory paging operations. Responsive to a request to page out a memory page from a shared memory pool, the method identifies whether a physical space within one of a number of paging space devices has been allocated for the memory page. If physical space within the paging space device has not been allocated for the memory page, a page priority indicator for the memory page is identified. The memory page is then allocated to one of a number of memory pools within one of the number of paging space devices. The memory page is allocated one of the memory pools according to the page priority indicator of the memory page. The memory page is then written to the allocated memory pools.Type: GrantFiled: December 17, 2009Date of Patent: January 22, 2013Assignee: International Business Machines CorporationInventors: Mathew Accapadi, Dirk Michel, Bret Ronald Olszewski
-
Patent number: 8327176Abstract: Distributing a thread for running on a physical processor and enabling the physical processor to be switched into a low power snooze state when said running thread is IDLE. However, this switching into said low power state is enabled to be delayed by a delay time from an IDLE dispatch from said running thread; such delay is determined by tracking the rate of the number of said IDLE dispatches per processor clock interval and dynamically varying said delay time wherein the delay time is decreased when said rate of IDLE dispatches increases and the delay time is increased when said rate of IDLE dispatches decreases.Type: GrantFiled: March 31, 2010Date of Patent: December 4, 2012Assignee: International Business Machines CorporationInventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
-
Patent number: 8307188Abstract: An information handling system (IHS) loads an application that may include startup code and steady state operation code. The IHS allocates one region of system memory to the startup code and another region of system memory to the steady state operation code. A programmer inserts a memory release call command at a location that marks the end of execution of the startup code. After executing the startup code, the operation system receives the memory release call command. In response to the memory release call command, the operating system releases or de-allocates the region of memory to which the IHS previously assigned to the startup code. This enables the released memory for use by code other than the startup code, such as other code pages, library pages and other code.Type: GrantFiled: November 10, 2009Date of Patent: November 6, 2012Assignee: International Business Machines CorporationInventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
-
Publication number: 20120260257Abstract: A computer program product for scheduling threads in a multiprocessor computer comprises computer program instructions configured to select a thread in a ready queue to be dispatched to a processor and determine whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, the computer program instructions are configured to select a processor, set a current processor priority register of the selected processor to least favored, and dispatch the thread from the ready queue to the selected processor.Type: ApplicationFiled: June 20, 2012Publication date: October 11, 2012Applicant: International Business Machines CorporationInventors: Jos Manuel Accapadi, Mathew Accapadi, Andrew Dunshea, Mark Elliott Hack, Agustin Mena, III, Mysore Sathyanarayana Srinivas
-
Publication number: 20120221812Abstract: A method for preserving memory affinity in a computer system is disclosed. The method reduces and sometimes eliminates memory affinity loss due to process migration by restoring the proper memory affinity through dynamic page migration. The memory affinity access patterns of individual pages are tracked continuously. If a particular page is found almost always to be accessed from a particular remote access affinity domain for a certain number of times, and without any intervening requests from other access affinity domain, the page will migrate to that particular remote affinity domain so that the subsequent memory access becomes local memory access. As a result, the proper pages are migrated to increase memory affinity.Type: ApplicationFiled: April 25, 2012Publication date: August 30, 2012Applicant: IBM CORPORATIONInventors: MATHEW ACCAPADI, ROBERT H. BELL, JR., MEN-CHOW CHIANG, HONG L. HUA
-
Publication number: 20120198187Abstract: Techniques for preserving memory affinity in a computer system is disclosed. In response to a request for memory access to a page within a memory affinity domain, a determination is made if the request is initiated by a processor associated with the memory affinity domain. If the request is not initiated by a processor associated with the memory affinity domain, a determination is made if there is a page ID match with an entry within a page migration tracking module associated with the memory affinity domain. If there is no page ID match, an entry is selected within the page migration tracking module to be updated with a new page ID and a new memory affinity ID. If there is a page ID match, then another determination is made whether or not there is a memory affinity ID match with the entry with the page ID field match. If there is no memory affinity ID match, the entry is updated with a new memory affinity ID; and if there is a memory affinity ID match, an access counter of the entry is incremented.Type: ApplicationFiled: January 28, 2011Publication date: August 2, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mathew Accapadi, Robert H. Bell, JR., Men-Chow Chiang, Hong L. Hua
-
Publication number: 20120072676Abstract: A method, system, and computer usable program product for selective memory compression for multi-threaded applications are provided in the illustrative embodiments. An identification of a memory region that is shared by a plurality of threads in an application is received at a first entity in a data processing system. A request for a second entity in the data processing system to keep the memory region uncompressed when compressing at least one of a plurality of memory regions that comprise the memory region is provided from the first entity to the second entity.Type: ApplicationFiled: September 20, 2010Publication date: March 22, 2012Applicant: International Business Machines CorporationInventors: MATHEW ACCAPADI, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
-
Publication number: 20120005448Abstract: Management of a UNIX-style storage pools is enhanced by specially managing one or more memory management inodes associated with pinned and allocated pages of data storage by providing indirect access to the pinned and allocated pages by one or more user processes via a handle, while preventing direct access of the pinned and allocated pages by the user processes without use of the handles; scanning periodically hardware status bits in the inodes to determine which of the pinned and allocated pages have been recently accessed within a pre-determined period of time; requesting via a callback communication to each user process to determine which of the least-recently accessed pinned and allocated pages can be either deallocated or defragmented and compacted; and responsive to receiving one or more page indicators of pages unpinned by the user processes, compacting or deallocating one or more pages corresponding to the page indicators.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: IBM CORPORATIONInventors: Mathew Accapadi, Grover C. Davidson, II, Dirk Michel, Bret R. Olszewski
-
Patent number: 8037203Abstract: Methods, systems, and products are disclosed for user defined preferred DNS routing that include mapping for a user in a data communications application a domain name of a network host to a network address for a preferred DNS server, wherein the preferred DNS server has a network address for the domain name; receiving from the user a request for access to a resource accessible through the network host; and routing to the preferred DNS server a DNS request for the network address of the network host, the DNS request including the domain name of the network host. In typical embodiments, mapping a domain name to a network address for a preferred DNS server is carried out by storing, through the data communication application, the domain name in association with the network address for a preferred DNS server in a data structure in computer memory.Type: GrantFiled: February 19, 2004Date of Patent: October 11, 2011Assignee: International Business Machines CorporationInventors: Jos Manuel Accapadi, Mathew Accapadi, William Lee Britton, Andrew Dunshea, Dirk Michel
-
Publication number: 20110153975Abstract: A method manages memory paging operations. Responsive to a request to page out a memory page from a shared memory pool, the method identifies whether a physical space within one of a number of paging space devices has been allocated for the memory page. If physical space within the paging space device has not been allocated for the memory page, a page priority indicator for the memory page is identified. The memory page is then allocated to one of a number of memory pools within one of the number of paging space devices. The memory page is allocated one of the memory pools according to the page priority indicator of the memory page. The memory page is then written to the allocated memory pools.Type: ApplicationFiled: December 17, 2009Publication date: June 23, 2011Applicant: International Business Machines CorporationInventors: Mathew Accapadi, Dirk Michel, Bret R. Olszewski
-
Patent number: 7962913Abstract: Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.Type: GrantFiled: December 23, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Jos Manuel Accapadi, Mathew Accapadi, Andrew Dunshea, Mark Elliott Hack, Agustin Mena, III, Mysore Sathyanarayana Srinivas
-
Publication number: 20110113214Abstract: An information handling system (IHS) loads an application that may include startup code and steady state operation code. The IHS allocates one region of system memory to the startup code and another region of system memory to the steady state operation code. A programmer inserts a memory release call command at a location that marks the end of execution of the startup code. After executing the startup code, the operation system receives the memory release call command. In response to the memory release call command, the operating system releases or de-allocates the region of memory to which the IHS previously assigned to the startup code. This enables the released memory for use by code other than the startup code, such as other code pages, library pages and other code.Type: ApplicationFiled: November 10, 2009Publication date: May 12, 2011Applicant: International Business Machines CorporationInventors: Mathew Accapadi, Grover Cleveland Davidson, II, Dirk Michel, Bret Ronald Olszewski
-
Patent number: 7861051Abstract: A system and method for implementing a fast file synchronization in a data processing system. A memory management unit divides a file stored in system memory into a collection of data block groups. In response to a master (e.g., processing unit, peripheral, etc.) modifying a first data block group among the collection of data block groups, the memory management unit writes a first block group number associated with the first data block group to system memory. In response to a master modifying a second data block group, the memory management unit writes the first data block group to a hard disk drive and writes a second data block group number associated with the second data block group to system memory. In response to a request to update modified data block groups of the file stored in the system memory to the hard disk drive, the memory management unit writes the second data block to the hard disk drive.Type: GrantFiled: June 20, 2008Date of Patent: December 28, 2010Assignee: International Business Machines CorporationInventors: Jos M. Accapadi, Mathew Accapadi, Andrew Dunshea, Dirk Michel
-
Patent number: 7543124Abstract: A computer-implemented system, method, and program product is disclosed for managing memory pages in a memory that includes a page replacement function. The method includes detecting that a sequence of pages is read by an application into the memory. The method continues by initiating a read-ahead to access a plurality of pages including the sequence of pages and a next page that has not yet been read, and storing the plurality in a page frame table of the memory. During the read-ahead, the method sets a soft-pin bit in the page frame table corresponding to each of the pages of the plurality of pages in the read-ahead. Each the soft-pin bit temporarily reserves its respective page from replacement by the page replacement function.Type: GrantFiled: July 9, 2008Date of Patent: June 2, 2009Assignee: International Business Machines CorporationInventors: Mathew Accapadi, Dirk Michel, Andrew Dunshea, Jos M. Accapadi
-
Patent number: 7487503Abstract: Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.Type: GrantFiled: August 12, 2004Date of Patent: February 3, 2009Assignee: International Business Machines CorporationInventors: Jos Manuel Accapadi, Mathew Accapadi, Andrew Dunshea, Mark Elliott Hack, Agustin Mena, III, Mysore Sathyanarayana Srinivas