Abstract: A larger active camming device including a plurality of opposed camming lobes, a cam head, a retraction system, and a connection system. The cam head includes a stem end and two parallel axles coupled to the stem end. The retraction system is a unique system comprised of a trigger, flexible trigger wires, control horns, and torsion springs. The control horns couple the trigger to the camming lobes and are configured to reduce buckling and allow greater camming range. The retraction system can also include a retraction locking mechanism. The locking mechanism is used to store the cam in a retracted and locked position until it is needed by the climber. When needed, the climber can easily unlock and extend the camming lobes with one hand.

Abstract: Systems and methods for storing data in a multi-level cell (MLC) flash memory are disclosed. One such data storage system has a data path with cascaded data access performance, including multiple storage portions having different data access speeds. A cascaded data path enables flash memory data access that has a more graceful degradation instead of an abrupt decrease in performance during operation.

Abstract: The disclosure relates in some aspects to managing multi-tier memory, such as multi-tier NVM. Data that is originally written to a first tier (e.g., a fast tier) may be subsequently copied to a second tier (e.g., a slow tier). The data is temporarily left in the first tier until the space is needed for a subsequent write operation. Thus, for a period of time, a read operation is able to read the data from the first tier (e.g., the fast tier) instead of the second tier (e.g., the slow tier), thereby improving read performance. The disclosure relates in some aspects to a memory mapping scheme that enables a read operation to readily determine that data remains in the first tier and locate the data in that tier. Moreover, the scheme enables efficient reconfiguration of the mapping when the data in the first tier is erased.

Abstract: Systems and methods for storing data in a multi-level cell (MLC) flash memory are disclosed. One such data storage system has a data path with cascaded data access performance, including multiple storage portions having different data access speeds. A cascaded data path enables flash memory data access that has a more graceful degradation instead of an abrupt decrease in performance during operation.

Abstract: Systems, methods, and apparatus are provided that can reduce power consumption of memory controllers in response to memory command backlog in various situations. A data storage device includes a plurality of sets of non-volatile memory (NVM) devices, a central controller, and a plurality of channel controllers. Each channel controller is coupled to a distinct set of the plurality of sets of NVM devices. Each channel controller includes a command queue configured to store pending memory commands and provide backlog information. The central controller is configured to receive the backlog information of the command queues of the plurality of channel controllers, and adjust a clock frequency of the central controller and one or more clock frequencies of the plurality of channel controllers based on the backlog information such that the pending memory commands in each of the command queues are below a predetermined threshold level.

Abstract: The present disclosure provides methods for purifying a solution comprising cantharidin and cantharidin-associated impurities. A method to purify the solution can comprise recrystallization or sublimation, for example. The purified cantharidin can be analyzed using a detection method comprising a stationary phase and one or more mobile phases.

Abstract: The present disclosure provides methods for synthesizing cantharidin and cantharidin derivatives.

Abstract: A larger active camming device including a plurality of opposed camming lobes, a cam head, a retraction system, and a connection system. The cam head includes a stem end and two parallel axles coupled to the stem end. The retraction system is a unique system comprised of a trigger, flexible trigger wires, control horns, and torsion springs. The control horns couple the trigger to the camming lobes and are configured to reduce buckling and allow greater camming range. The retraction system can also include a retraction locking mechanism. The locking mechanism is used to store the cam in a retracted and locked position until it is needed by the climber. When needed, the climber can easily unlock and extend the camming lobes with one hand.

Abstract: A storage module may include a controller that has hardware path that includes a plurality of hardware modules configured to perform a plurality of processes associated with execution of a host request. The storage module may also include a firmware module having a processor that executes firmware to perform at least some of the plurality of processes performed by the hardware modules. The firmware module performs the processes when the hardware modules are not able to successfully perform them.

Abstract: Provided herein are devices, systems, kits and methods for treating skin conditions, ailments or diseases, such as skin warts. In some examples, a device for treating warts comprises a reservoir that includes a cantharidin formulation, and an applicator device in fluid communication with the reservoir that delivers the cantharidin formulation to a subject.

Abstract: A storage module may include a controller that has hardware path that includes a plurality of hardware modules configured to perform a plurality of processes associated with execution of a host request. The storage module may also include a firmware module having a processor that executes firmware to perform at least some of the plurality of processes performed by the hardware modules. The firmware module performs the processes when the hardware modules are not able to successfully perform them.

Abstract: A non-volatile memory system includes a memory controller that receives commands from a host and identifies commands that can be executed in parallel. The order in which commands are received is recorded so that responses may be provided to the host in the same order in which the commands were received.

Abstract: Disclosed are apparatus and techniques for managing power in a memory system having a controller and nonvolatile memory array. In one embodiment, prior to execution of each command with respect to the memory array, a request for execution of such command is received with respect to the memory array. In response to receipt of each request for each command, execution of such command is allowed or withheld with respect to the memory array based on whether such command, together with execution of other commands, is estimated to exceed a predetermined power usage specification for the memory system.

Abstract: Disclosed are apparatus and techniques for managing power in a memory system having a controller and nonvolatile memory array. In one embodiment, prior to execution of each command with respect to the memory array, a request for execution of such command is received with respect to the memory array. In response to receipt of each request for each command, execution of such command is allowed or withheld with respect to the memory array based on whether such command, together with execution of other commands, is estimated to exceed a predetermined power usage specification for the memory system.

Abstract: A non-volatile memory system includes a memory controller that receives commands from a host and identifies commands that can be executed in parallel. The order in which commands are received is recorded so that responses may be provided to the host in the same order in which the commands were received.

Abstract: The throughput of the memory system is improved where error correction of data in a data stream is cryptographically processed with minimal involvement of any controller. To perform error correction when data from the memory cells are read, the bit errors in the data in the data stream passing between the cells and the cryptographic circuit are corrected prior to any cryptographic process performed by the circuit. Preferably the error correction occurs in one or more buffers employed to buffer the data between the cryptographic circuit and the memory where latency is reduced by using multiple buffers.

Abstract: Disclosed are apparatus and techniques for managing power in a memory system having a controller and nonvolatile memory array. In one embodiment, prior to execution of each command with respect to the memory array, a request for execution of such command is received with respect to the memory array. In response to receipt of each request for each command, execution of such command is allowed or withheld with respect to the memory array based on whether such command, together with execution of other commands, is estimated to exceed a predetermined power usage specification for the memory system.

Abstract: The present invention relates to an apparatus and method for the generation of directed vapor from a liquid source. Vaporization takes place within a device capable of confining boiling to a geometrically small volume, and expelling it as heated vapor via capillary vaporization. The foregoing is accomplished through the use of a lightweight, compact and portable personal vaporization device that generates heated vapor by the flash boiling of small volumes of aqueous liquid in a safe and energy-efficient manner. Further, the production of vapor absent microbes in aqueous systems is accomplished through the combination of microporous componentry and flash vaporization. The apparatus and methods are directed toward personal humidification for comfort and therapeutic purposes in the case of aqueous liquids, but may also be used with other, non-aqueous liquids.

Abstract: The present invention concerns capillary force vaporizers for use in vaporizing liquids and emitting pressurized vapors. In one embodiment, the inventive capillary force vaporizer includes a porous member, a heater component to convey heat to the porous member, and a vapor containment region. The porous member further includes a capillary network, a surface for receiving liquid and a vaporization area in which vapor is produced from the liquid. The vapor is collected and pressurized within the vapor containment region, which includes one or more openings for the release of vapor at a velocity greater than zero. Several different embodiments for capillary force vaporizers and systems comprising capillary force vaporizers are disclosed along with methods for their use.

Abstract: An interface for use of device whose core circuitry operates in one voltage domain, but exchanges signal with another device (or “host”) according a different voltage domain, and the use of such an interface for supplying data using a double data rate (DDR) transfer, is presented. One concrete example of this situation is a memory card, where the internal circuitry uses one voltage range for its core operating voltages, but exchanges signals with a host using different, input/output voltage range. According to a general set of aspects, the interface receives data signals from the device at the device's core operating voltage domain, individually level shifts these to the input/output voltage domain, and then combines them into a DDR signal for transfer to the host device, where a (non-level shifted) clock signal from the host device is used as the select signal to form the DDR data signal.