Patents by Inventor Mazhareddin Taghivand

Mazhareddin Taghivand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10855225
    Abstract: Aspects of the present disclosure provide a low power differential frequency multiplier. An example frequency multiplier circuit generally includes a first set of transistors, a second set of transistors, and a resonant circuit. The first set of transistors comprises a first transistor and a second transistor, wherein each of the transistors in the first set is a first type of transistor. The second set of transistors comprises a third transistor and a fourth transistor, wherein each of the transistors in the second set is a second type of transistor. The resonant circuit has a first terminal coupled to the first set of transistors and a second terminal coupled to the second set of transistors, wherein the resonant circuit comprises an inductive element and a capacitive element coupled in parallel with the inductive element.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: December 1, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Soheil Golara
  • Publication number: 20200252036
    Abstract: In certain aspects, a multi-mode power amplifier includes first primary inductors, second primary inductors, and switches configured to selectively couple each of the second primary inductors with a respective one of the first primary inductors. The multi-mode power amplifier also includes power amplifiers coupled to the first primary inductors, and a secondary inductor magnetically coupled to the first primary inductors.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Inventors: Tso-Wei LI, Seyed Hossein MIRI LAVASANI, Mazhareddin TAGHIVAND
  • Patent number: 10608583
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for reducing phase noise in voltage-controlled oscillators (VCOs). One example VCO generally includes a first resonant circuit comprising an inductor and a first variable capacitive element coupled in parallel with the inductor; and a second variable capacitive element coupled to a center tap of the inductor and further coupled to a reference voltage, wherein the center tap of the inductor is further coupled to a voltage source.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: March 31, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Alireza Khalili, Mohammad Emadi, Yashar Rajavi
  • Patent number: 10508305
    Abstract: An integrated system for sequencing a string of oligo-nucleotides is disclosed, the system includes a sequencer for sequencing a plurality of fragments of the string of oligo-nucleotides via identifying oligo-nucleotides of the fragments one by one and a processor for processing the identified oligo-nucleotides to determine the sequence of the string of oligo-nucleotides and to stop the sequencer from sequencing redundant fragments, where the sequencer and the processor operate in a cycle for each oligo-nucleotide of the fragments.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: December 17, 2019
    Inventors: Damoun Nashtaali, Seyed Abolfazl Motahari, Mehrdad Mehrbod, Babak Hossein Khalaj, Mazhareddin Taghivand
  • Patent number: 10128823
    Abstract: Certain aspects of the present disclosure generally relate to generating a large electrical resistance. One example circuit generally includes a first transistor having a gate, a source connected with a first node of the circuit, and a drain connected with a second node of the circuit. The circuit may also include a voltage-limiting device connected between the gate and the source of the first transistor, wherein the device, if forward biased, is configured to limit a gate-to-source voltage of the first transistor such that the first transistor operates in a sub-threshold region. The circuit may further include a second transistor configured to bias the voltage-limiting device with a current, wherein a drain of the second transistor is connected with the gate of the first transistor, a gate of the second transistor is connected with the first node, and a source of the second transistor is connected with an electric potential.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: November 13, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Yashar Rajavi, Alireza Khalili
  • Patent number: 9991751
    Abstract: An apparatus can have a power supply circuit configured to receive, from an antenna, a first signal at a frequency exceeding a GHz, and including a rectifier circuit that is impedance matched to the antenna at the first frequency and that is configured to generate a supply voltage by rectifying the first signal at the first frequency. A signal generation circuit can be configured to use the supply voltage to generate a second signal at as higher frequency and to operate in two different power modes in response to a data signal. A transmitter circuit can be configured to use the supply voltage to create pulse at the higher frequency of the signal and in response to the data signal, and that includes an amplifier circuit configured to receive the data signal and provide an amplification of the data signal to the antenna.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: June 5, 2018
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Mazhareddin Taghivand, Yashar Rajavi, Kamal Aggarwal, Ada Shuk Yan Poon
  • Publication number: 20180131397
    Abstract: A method of and system for processing a received signal is disclosed. The method includes generating a corrected radio frequency (RF) signal based on an RF feedback signal and an incoming RF signal, the incoming RF signal includes a wanted signal and an interfering signal. The method also includes down-converting the corrected RF signal to a corrected in-phase baseband signal and a corrected quadrature-phase baseband signal; extracting, based on a baseband signal of an aggressor signal, an in-phase baseband signal of the interfering signal from the corrected in-phase baseband signal; extracting, based on the baseband signal of the aggressor, a quadrature-phase baseband signal of the interfering signal from the corrected quadrature-phase baseband signal; up-converting the extracted interfering signals to produce the RF feedback signal; and generating a second corrected RF signal based on the second RF feedback signal and the incoming RF signal.
    Type: Application
    Filed: November 4, 2016
    Publication date: May 10, 2018
    Inventors: Mohammad Emadi, Mazhareddin Taghivand, Alireza Khalili
  • Publication number: 20180115953
    Abstract: Methods, systems, and devices for wireless communication are described. Generally, the described techniques provide for an access point (AP) that may identify a pending communication for a wireless device and transmit a wakeup message comprising a device specific identifier to a wakeup radio of the wireless device. The wakeup message may include a preamble, a signal field, and a data field. In some cases, the wireless device may demodulate the wakeup message using a phase modulated on-off keying (PM-OOK) modulation. After awakening, the wireless device and the AP may exchange data using the primary radio, which may be a wireless local area network (WLAN) transceiver or a wireless wide area network (WWAN) transceiver. The wireless device may receive the wakeup message using the wakeup radio, decode the message to obtain a device specific identifier, and activate a primary radio to communicate with the AP.
    Type: Application
    Filed: October 19, 2017
    Publication date: April 26, 2018
    Inventors: Stephen Jay Shellhammer, Bin Tian, Mazhareddin Taghivand
  • Publication number: 20180083661
    Abstract: Various aspects of this disclosure describe the calibration of residual sideband energy in a receiver, for example estimating gain mismatch and phase mismatch in in-phase (I) and quadrature-phase channels (Q) of a receiver. An input to the receiver is supplied with an input signal generated to comprise a bandwidth including a plurality of frequencies, such as a linear frequency modulation signal. An output signal of the receiver is filtered by a filter programmed to be matched to the input signal, and estimates of gain error and phase error in I and Q channels of the receiver are determined from the filtered outputs.
    Type: Application
    Filed: September 22, 2016
    Publication date: March 22, 2018
    Inventors: Mohammad Emadi, Mazhareddin Taghivand, Alireza Khalili
  • Publication number: 20180076765
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for reducing phase noise in voltage-controlled oscillators (VCOs). One example VCO generally includes a first resonant circuit comprising an inductor and a first variable capacitive element coupled in parallel with the inductor; and a second variable capacitive element coupled to a center tap of the inductor and further coupled to a reference voltage, wherein the center tap of the inductor is further coupled to a voltage source.
    Type: Application
    Filed: June 29, 2017
    Publication date: March 15, 2018
    Inventors: Mazhareddin TAGHIVAND, Alireza KHALILI, Mohammad EMADI, Yashar RAJAVI
  • Patent number: 9887678
    Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: February 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Amir Hossein Masnadi Shirazi Nejad, Mazhareddin Taghivand, Seyed Hossein Miri Lavasani, Mohammad Emadi
  • Patent number: 9831960
    Abstract: A method for inductively coupled communication is described. The method includes generating a first signal. The first signal frequency is a first integer multiple of a carrier frequency for inductively coupled communication. The method also includes selecting between a standalone mode and a coexistence mode. The method further includes dividing the first signal to obtain a second signal when in standalone mode. The second signal frequency is a second integer multiple of the carrier frequency. The method additionally includes dividing the first signal to obtain a third signal when in coexistence mode. The third signal frequency is a third integer multiple of the carrier frequency. The method also includes generating an inductively coupled communication signal using at least one of the second signal and the third signal.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: November 28, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mohammad Mahdi Ghahramani, Mazhareddin Taghivand, Rainer Gaethke, Niranjan Anand Talwalkar, Roger Brockenbrough
  • Publication number: 20170325169
    Abstract: Power conservation in a radio frequency front end of a user equipment (UE) during wireless local area network (WLAN) communication is achieved by adjusting a power mode of the radio frequency front end. In one instance, the UE determines a signal strength of a received frame of a packet during a short training field of a preamble of the received frame. The determining occurs when a WLAN receiver is operating in a low power mode. The UE then switches the WLAN receiver to a high power mode during the short training field of the preamble or during a first segment of a long training field of the preamble when the signal strength is above a predetermined signal strength.
    Type: Application
    Filed: March 2, 2017
    Publication date: November 9, 2017
    Inventors: Mohammad EMADI, Alireza KHALILI, Mazhareddin TAGHIVAND, Youhan KIM, Kai DIETZE, Michael KOHLMANN, James GARDNER, Tevfik YUCEK, Beomsup KIM
  • Patent number: 9806724
    Abstract: Various aspects of this disclosure describe switched-capacitor circuits in a PLL. Examples include routing current from a first current source through a capacitor to ground during a first clock phase, routing current from a second current source through the capacitor to ground during a second clock phase, and transferring charge on the capacitor to a loop filter capacitor during a third clock phase. The first current source may generate current responsive to UP error samples from a phase/frequency detector (PFD), and the second current source generates current responsive to DN error samples from the PFD.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: October 31, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mojtaba Sharifzadeh, Alireza Khalili, Mazhareddin Taghivand, Mohammad Emadi
  • Publication number: 20170279445
    Abstract: A differential switched capacitor device, including: first and second terminals; first and second branches coupled between the first and second terminals, each branch of the first and the second branches comprising at least one capacitor; and first and second switches, each switch of the first and second switches disposed in each branch of the first and second branches.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 28, 2017
    Inventors: Mazhareddin Taghivand, Alireza Khalili
  • Publication number: 20170237469
    Abstract: An apparatus can have a power supply circuit configured to receive, from an antenna, a first signal at a frequency exceeding a GHz, and including a rectifier circuit that is impedance matched to the antenna at the first frequency and that is configured to generate a supply voltage by rectifying the first signal at the first frequency. A signal generation circuit can be configured to use the supply voltage to generate a second signal at as higher frequency and to operate in two different power modes in response to a data signal. A transmitter circuit can be configured to use the supply voltage to create pulse at the higher frequency of the signal and in response to the data signal, and that includes an amplifier circuit configured to receive the data signal and provide an amplification of the data signal to the antenna.
    Type: Application
    Filed: May 8, 2015
    Publication date: August 17, 2017
    Inventors: Mazhareddin Taghivand, Yashar Rajavi, Kamal Aggarwal, Ada Shuk Yan Poon
  • Patent number: 9729179
    Abstract: Systems and methods for interference cancellation in a receiver of wireless signals include receiving a signal comprising an aggressor and a desired signal. The received signal is amplified in a low noise amplifier (LNA) to generate an amplified received signal. The aggressor is extracted from the received signal in a feed-forward path between an input of the LNA and an output of the LNA, to generate an extracted aggressor and the extracted aggressor is subtracted from the amplified received signal to provide the desired signal. An amplify and rotate block in the feed-forward path is used to align a phase of the aggressor to a phase of the amplified received signal in order to enable the subtraction.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: August 8, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mohammad Emadi, Mazhareddin Taghivand, Yann Ly-Gagnon
  • Patent number: 9698727
    Abstract: A two-walled coupled inductor includes an outer wall and an inner wall separated by a slit. The outer wall has a first width and the inner wall has a second width. The inner wall and the outer wall may be configured to be coupled to oscillator circuitry. The two-walled coupled inductor may include an electrically conductive stub coupled to the outer wall to be coupled to a power supply. A common mode current flows through the outer wall, and the stub if one is present, and a differential mode current flows through both the outer wall and the inner wall, but not the stub. The first and second widths, and dimensions of the stub, may be sized to increase an inductance of the common mode compared to an inductance of the differential mode, thereby reducing phase noise of the inductor-based resonator.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: July 4, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Alireza Khalili, Mazhareddin Taghivand, Amirpouya Kavousian
  • Publication number: 20170179896
    Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
    Type: Application
    Filed: June 6, 2016
    Publication date: June 22, 2017
    Inventors: Amir Hossein Masnadi Shirazi Nejad, Mazhareddin Taghivand, Seyed Hossein Miri Lavasani, Mohammad Emadi
  • Patent number: 9685931
    Abstract: Certain aspects of the present disclosure provide circuits for generating high accuracy millimeter wave or radio frequency (RF) wideband in-phase (I) and quadrature (Q) oscillating signals having acceptable amplitude and phase mismatch over process, voltage, and temperature (PVT) variations with reduced cost, area, and power consumption. In one example apparatus, a polyphase filter having a first stage and a second stage is provided. Each stage comprises resistive elements and capacitive elements. Certain aspects of the present disclosure provide for intentional resistive and/or capacitive value mismatch between the resistive or capacitive values of one or multiple stages such that the phase mismatch between the resulting I and Q signals may be reduced without degrading the amplitude mismatch. Certain aspects of the present disclosure provide for replacing the resistive elements in at least one stage with transistors operating in the triode region, where the on-resistance is controlled by a feedback network.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: June 20, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Tong Zhang, Mohammad Mahdi Ghahramani