Patents by Inventor Mazhareddin Taghivand

Mazhareddin Taghivand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150214891
    Abstract: A transformer is described. The transformer includes a primary coil and a first secondary coil. A first coupling occurs between the first secondary coil and the primary coil. The transformer also includes a second secondary coil. A second coupling occurs between the second secondary coil and the primary coil. The first secondary coil is separated from the second secondary coil to prevent coupling between the first secondary coil and the second secondary coil. A first width of the first secondary coil is configured independently of a second width of the second secondary coil.
    Type: Application
    Filed: January 30, 2014
    Publication date: July 30, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jianlei SHI, Yongwang DING, Jeongsik YANG, Mazhareddin TAGHIVAND, Sang-Oh LEE, Young Gon KIM
  • Publication number: 20150207531
    Abstract: An apparatus includes a main amplifier configured to receive an input signal. The main amplifier is also configured to generate an output signal. The apparatus also includes an auxiliary path configured to phase-shift the input signal to generate a cancellation signal to reduce or cancel a blocker component of the output signal.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 23, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Mohammad Bagher Vahid Far, Abbas Komijani, Amirpouya Kavousian, Mazhareddin Taghivand, Alireza Khalili
  • Patent number: 9026060
    Abstract: A bidirectional matching network is disclosed. In an exemplary embodiment, an apparatus includes a first matching circuit connected in a first signal path between a node and a first amplifier, the first matching circuit configured to translate an off-state impedance of the first amplifier to a first translated off-state impedance. The apparatus also includes a second matching circuit connected in a second signal path between the node and a second amplifier. The second matching circuit configured to translate an off-state impedance of the second amplifier to a second translated off-state impedance. The second translated off-state impedance is configured to reduce power loss associated with a first signal flowing in the first signal path and the first translated off-state impedance is configured to reduce power loss associated with a second signal flowing in the second signal path.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 5, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Danial Ehyaie, Mazhareddin Taghivand
  • Publication number: 20140300424
    Abstract: Techniques for providing transformer-based CMOS oscillators capable of operation with low voltage power supplies. In an exemplary embodiment, an LC tank is provided at the drains of a transistor pair, and the inductance of the LC tank is mutually magnetically coupled to an inductance between the gates of the transistor pair. A separate complementary transistor pair is also coupled to the LC tank. A further exemplary embodiment provides an LC tank at the gates of a transistor pair, as well as for three-way coupling amongst a tank inductance, an inductance between the gates of the transistor pair, and an inductance between the gates of a complementary transistor pair.
    Type: Application
    Filed: April 11, 2014
    Publication date: October 9, 2014
    Applicant: QUALCOMM Incorporated
    Inventor: Mazhareddin Taghivand
  • Publication number: 20140256376
    Abstract: A wireless device with built-in self test (BIST) capability for testing/calibrating transmit and receive circuits is disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a first circuit and a second circuit. The first circuit (e.g., a transmitter or a mixer) provides a test signal to at least one transmit path. The test signal is electro-magnetically coupled from the output of the at least one transmit path to a test signal line. For example, the test signal may be provided from the at least one transmit path via at least one antenna feed line to at least one antenna element and may be electro-magnetically coupled from the at least one antenna feed line to the test signal line. The second circuit (e.g., a buffer, a receiver, or a mixer) processes a received test signal from the test signal line.
    Type: Application
    Filed: May 1, 2013
    Publication date: September 11, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Haim Mendel Weissman, Avigdor Brillant, Lior Raviv, Mohammad Ali Tassoudji, Yu-Chin Ou, Mazhareddin Taghivand
  • Patent number: 8829954
    Abstract: A frequency divider circuit is described. The frequency divider circuit includes a first cross-coupling. The first cross-coupling includes a first cross-coupled transistor with a first gate. The first gate is separately biased. The first cross-coupling also includes a second cross-coupled transistor with a second gate. The second gate is separately biased. The first gate is coupled to the second cross-coupled transistor and the second gate is coupled to the first cross-coupled transistor.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: September 9, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Jafar Savoj, Mingdeng Chen
  • Patent number: 8791763
    Abstract: Tunable injection locked (IL) dividers having enhanced locking range, good phase noise performance, and low power consumption are disclosed. In an exemplary design, an apparatus (e.g., a wireless device) includes an oscillator and at least one IL divider. The oscillator provides an oscillator signal at a first frequency. The at least one IL divider receives the oscillator signal and provides an output signal at a second frequency, which is related to the first frequency by an overall divider ratio for the IL divider(s). Each IL divider may be calibrated based on a target frequency of that IL divider. Each IL divider may be calibrated (e.g., by tuning at least one adjustable capacitor) to obtain an oscillation frequency within a predetermined tolerance of the target frequency of that IL divider. The oscillator may be calibrated based on a target oscillation frequency of the oscillator.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: July 29, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Mazhareddin Taghivand
  • Publication number: 20140152385
    Abstract: A bidirectional matching network is disclosed. In an exemplary embodiment, an apparatus includes a first matching circuit connected in a first signal path between a node and a first amplifier, the first matching circuit configured to translate an off-state impedance of the first amplifier to a first translated off-state impedance. The apparatus also includes a second matching circuit connected in a second signal path between the node and a second amplifier. The second matching circuit configured to translate an off-state impedance of the second amplifier to a second translated off-state impedance. The second translated off-state impedance is configured to reduce power loss associated with a first signal flowing in the first signal path and the first translated off-state impedance is configured to reduce power loss associated with a second signal flowing in the second signal path.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Danial Ehyaie, Mazhareddin Taghivand
  • Patent number: 8742862
    Abstract: A current reuse voltage controlled oscillator with improved differential output is disclosed. In an exemplary embodiment, an apparatus includes a PMOS transistor and an NMOS transistor coupled together for current reuse and configured to provide differential oscillator outputs. The apparatus also includes a common mode rejection (CMR) circuit coupled between the PMOS and the NMOS transistors, the CMR circuit includes an inductor having a least one tap that can be selectively coupled to a ground to reduce common mode signals at the differential oscillator outputs.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: June 3, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Mazhareddin Taghivand
  • Patent number: 8736392
    Abstract: Techniques for providing transformer-based CMOS oscillators capable of operation with low voltage power supplies. In an exemplary embodiment, an LC tank is provided at the drains of a transistor pair, and the inductance of the LC tank is mutually magnetically coupled to an inductance between the gates of the transistor pair. A separate complementary transistor pair is also coupled to the LC tank. A further exemplary embodiment provides an LC tank at the gates of a transistor pair, as well as for three-way coupling amongst a tank inductance, an inductance between the gates of the transistor pair, and an inductance between the gates of a complementary transistor pair.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: May 27, 2014
    Assignee: QUALCOMM Incorporated
    Inventor: Mazhareddin Taghivand
  • Publication number: 20140132359
    Abstract: A current reuse voltage controlled oscillator with improved differential output is disclosed. In an exemplary embodiment, an apparatus includes a PMOS transistor and an NMOS transistor coupled together for current reuse and configured to provide differential oscillator outputs. The apparatus also includes a common mode rejection (CMR) circuit coupled between the PMOS and the NMOS transistors, the CMR circuit includes an inductor having a least one tap that can be selectively coupled to a ground to reduce common mode signals at the differential oscillator outputs.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: QUALCOMM INCORPORATED
    Inventor: Mazhareddin Taghivand
  • Publication number: 20140120851
    Abstract: A DC offset filter for wide band beamforming receivers is disclosed. In an exemplary embodiment, an apparatus includes a first mixer configured to down-convert an RF wideband beamformed signal to generate a first baseband wideband beamformed signal, the RF wideband beamformed signal having a beam pattern selected from a plurality of beam patterns, and a notch filter configured to remove DC offset from the first baseband wideband beamformed signal independent of the beam pattern.
    Type: Application
    Filed: October 31, 2012
    Publication date: May 1, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Gregory Steele, Yossi Tsfati, Haim M Weissman, Mazhareddin Taghivand
  • Patent number: 8704603
    Abstract: A tunable Injection-Locked Oscillator (ILO) having a wide locking range is used in a Local Oscillator (LO) of a wideband wireless transceiver to generate differential signals. The ILO includes a resonator with an adjustable natural oscillating frequency. In one example, the ILO is part of a quadrature divider that can lock onto a Phase-Locked Loop (PLL) output signal in a wide frequency band while achieving lower power consumption and lower phase noise than a differential latch type divider. The ILO is tuned by disabling a Voltage-Controlled Oscillator (VCO) from driving the ILO, adjusting the natural oscillating frequency, making a measurement indicative of the natural oscillating frequency, and determining whether the measurement is within a predetermined range. If the measurement is below the predetermined range, capacitances of resonators within the ILO are decreased, whereas if the measurement is above the predetermined range, capacitances of the resonators are increased.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: April 22, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Jeongsik Yang
  • Publication number: 20140065985
    Abstract: Transceivers implemented with a combination of super-heterodyne and zero intermediate frequency (ZIF) topologies are disclosed. In an exemplary design, an apparatus includes a frequency conversion circuit and a local oscillator (LO) generator. The LO generator generates a first LO signal and a second LO signal. The frequency conversion circuit performs frequency conversion (i) between intermediate frequency (IF) and baseband, based on the first LO signal, for an IF signal and (ii) between radio frequency (RF) and baseband, based on the second LO signal, for an RF signal. The frequency conversion circuit may perform frequency downconversion (i) from IF to baseband for a super-heterodyne receiver and (ii) from RF to baseband for a ZIF receiver. Alternatively or additionally, the frequency conversion circuit may perform frequency upconversion (i) from baseband to IF for a super-heterodyne transmitter and (ii) from baseband to RF for a ZIF transmitter.
    Type: Application
    Filed: August 8, 2013
    Publication date: March 6, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Haim M. Weissman, Yossef Tsfaty, Mazhareddin Taghivand, Avigdor Brillant, Tao Li, Raviv Lior
  • Publication number: 20140043103
    Abstract: Tunable injection locked (IL) dividers having enhanced locking range, good phase noise performance, and low power consumption are disclosed. In an exemplary design, an apparatus (e.g., a wireless device) includes an oscillator and at least one IL divider. The oscillator provides an oscillator signal at a first frequency. The at least one IL divider receives the oscillator signal and provides an output signal at a second frequency, which is related to the first frequency by an overall divider ratio for the IL divider(s). Each IL divider may be calibrated based on a target frequency of that IL divider. Each IL divider may be calibrated (e.g., by tuning at least one adjustable capacitor) to obtain an oscillation frequency within a predetermined tolerance of the target frequency of that IL divider. The oscillator may be calibrated based on a target oscillation frequency of the oscillator.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Inventor: Mazhareddin Taghivand
  • Publication number: 20130243113
    Abstract: A particular apparatus for generating a local oscillator (LO) signal includes a phase-locked loop (PLL) configured to output a signal having a frequency that is a sub-harmonic of a LO frequency. The apparatus also includes a mixer block having a frequency upconverter configured to upconvert the signal to generate a LO signal having the LO frequency. For example, the PLL may be integrated into a multiple-input multiple-output (MIMO) device and may generate the sub-harmonic signal. The sub-harmonic signal may be routed to each of a plurality of mixer blocks of the MIMO device. Each of the mixer blocks may upconvert the sub-harmonic signal to generate the LO signal.
    Type: Application
    Filed: February 7, 2013
    Publication date: September 19, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventor: Mazhareddin Taghivand
  • Publication number: 20120262239
    Abstract: A tunable Injection-Locked Oscillator (ILO) having a wide locking range is used in a Local Oscillator (LO) of a wideband wireless transceiver to generate differential signals. The ILO includes a resonator with an adjustable natural oscillating frequency. In one example, the ILO is part of a quadrature divider that can lock onto a Phase-Locked Loop (PLL) output signal in a wide frequency band while achieving lower power consumption and lower phase noise than a differential latch type divider. The ILO is tuned by disabling a Voltage-Controlled Oscillator (VCO) from driving the ILO, adjusting the natural oscillating frequency, making a measurement indicative of the natural oscillating frequency, and determining whether the measurement is within a predetermined range. If the measurement is below the predetermined range, capacitances of resonators within the ILO are decreased, whereas if the measurement is above the predetermined range, capacitances of the resonators are increased.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 18, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Mazhareddin Taghivand, Jeongsik Yang
  • Publication number: 20120242378
    Abstract: A frequency divider circuit is described. The frequency divider circuit includes a first cross-coupling. The first cross-coupling includes a first cross-coupled transistor with a first gate. The first gate is separately biased. The first cross-coupling also includes a second cross-coupled transistor with a second gate. The second gate is separately biased. The first gate is coupled to the second cross-coupled transistor and the second gate is coupled to the first cross-coupled transistor.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 27, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Jafar Savoj, Mingdeng Chen
  • Patent number: 8022780
    Abstract: Techniques for compensating for the effects of temperature change on voltage controlled oscillator (VCO) frequency are disclosed. In an embodiment, an auxiliary varactor is coupled to an LC tank of the VCO. The auxiliary varactor has a capacitance controlled by a temperature-dependant control voltage to minimize the overall change in VCO frequency with temperature. Techniques for generating the control voltage using digital and analog means are further disclosed.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: September 20, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Conor Donovan, Jeongsik Yang, Sang-Oh Lee
  • Patent number: 7855610
    Abstract: Techniques are disclosed for trimming a capacitance associated with a capacitor bank for use in a voltage-controlled oscillator (VCO). In an embodiment, each capacitance is sub-divided into a plurality of constituent capacitances. The constituent capacitances may be selectively enabled or disabled to trim the step sizes of the capacitor bank. Further techniques are disclosed for calibrating the trimmable capacitance to minimize step size error for the capacitor bank.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: December 21, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Mazhareddin Taghivand, Jeongsik Yang, Sang-Oh Lee