Patents by Inventor Md Altaf HOSSAIN

Md Altaf HOSSAIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160181145
    Abstract: A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB.
    Type: Application
    Filed: February 29, 2016
    Publication date: June 23, 2016
    Inventors: MD Altaf Hossain, Scott A. GILBERT
  • Publication number: 20160128207
    Abstract: A BGA structure having larger solder balls in high stress regions of the array is disclosed. The larger solder balls have higher solder joint reliability (SJR) and as such may be designated critical to function (CTF), whereby the larger solder balls in high stress regions carry input/output signals between a circuit board and a package mounted thereon. The larger solder balls are accommodated by recessing each ball in the package substrate, the circuit board, or both the package substrate and the circuit board. Additionally, a ball attach method for mounting a plurality of solder balls having different average diameters is disclosed.
    Type: Application
    Filed: January 11, 2016
    Publication date: May 5, 2016
    Inventors: MD Altaf Hossain, Scott A. Gilbert
  • Patent number: 9293426
    Abstract: A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: March 22, 2016
    Assignee: Intel Corporation
    Inventors: MD Altaf Hossain, Scott A. Gilbert
  • Patent number: 9268724
    Abstract: Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with the plurality of data terminals, and digital logic circuitry. The digital logic circuitry may be coupled to the data terminals and configured to use the no more than two pairs of differential data strobe terminals concurrently with the plurality of data terminals to transfer data. Other embodiments may be disclosed.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: February 23, 2016
    Assignee: INTEL CORPORATION
    Inventors: Md Altaf Hossain, Kevin J. Doran, Nagi Aboulenein
  • Patent number: 9237659
    Abstract: A BGA structure having larger solder balls in high stress regions of the array is disclosed. The larger solder balls have higher solder joint reliability (SJR) and as such may be designated critical to function (CTF), whereby the larger solder balls in high stress regions carry input/output signals between a circuit board and a package mounted thereon. The larger solder balls are accommodated by recessing each ball in the package substrate, the circuit board, or both the package substrate and the circuit board. Additionally, a ball attach method for mounting a plurality of solder balls having different average diameters is disclosed.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: January 12, 2016
    Assignee: Intel Corporation
    Inventors: MD Altaf Hossain, Scott A. Gilbert
  • Publication number: 20150230338
    Abstract: Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: April 20, 2015
    Publication date: August 13, 2015
    Inventors: Md Altaf Hossain, Jin Zhao, John T. Vu
  • Publication number: 20140317343
    Abstract: Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with the plurality of data terminals, and digital logic circuitry. The digital logic circuitry may be coupled to the data terminals and configured to use the no more than two pairs of differential data strobe terminals concurrently with the plurality of data terminals to transfer data. Other embodiments may be disclosed.
    Type: Application
    Filed: February 17, 2014
    Publication date: October 23, 2014
    Inventors: Md Altaf Hossain, Kevin J. Doran, Nagi Aboulenein
  • Publication number: 20140133075
    Abstract: The present disclosure relates to microelectronic substrates, such as interposers, motherboards, test platforms, and the like, that are fabricated to have overlapping connection zones, such that different microelectronic devices, such as microprocessors, chipsets, graphics processing devices, wireless devices, memory devices, application specific integrated circuits, and the like, may be alternately attached to the microelectronic substrates to form functional microelectronic packages.
    Type: Application
    Filed: January 23, 2014
    Publication date: May 15, 2014
    Inventors: Md Altaf Hossain, Cliff C. Lee, David W. Browning, Itai M. Pines, Brian P. Kelly
  • Publication number: 20140116765
    Abstract: Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: October 30, 2012
    Publication date: May 1, 2014
    Inventors: MD Altaf Hossain, Jin Zhao, John T. Vu
  • Publication number: 20140092572
    Abstract: A BGA structure having larger solder balls in high stress regions of the array is disclosed. The larger solder balls have higher solder joint reliability (SJR) and as such may be designated critical to function (CTF), whereby the larger solder balls in high stress regions carry input/output signals between a circuit board and a package mounted thereon. The larger solder balls are accommodated by recessing each ball in the package substrate, the circuit board, or both the package substrate and the circuit board. Additionally, a ball attach method for mounting a plurality of solder balls having different average diameters is disclosed.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: MD Altaf Hossain, Scott A. Gilbert
  • Publication number: 20140091428
    Abstract: A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: MD Altaf Hossain, Scott A. Gilbert
  • Patent number: 8683096
    Abstract: Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with the plurality of data terminals, and digital logic circuitry. The digital logic circuitry may be coupled to the data terminals and configured to use the no more than two pairs of differential data strobe terminals concurrently with the plurality of data terminals to transfer data. Other embodiments may be disclosed.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: March 25, 2014
    Assignee: Intel Corporation
    Inventors: Md Altaf Hossain, Kevin J. Doran, Nagi Aboulenein
  • Patent number: 8674235
    Abstract: The present disclosure relates to microelectronic substrates, such as interposers, motherboards, test platforms, and the like, that are fabricated to have overlapping connection zones, such that different microelectronic devices, such as microprocessors, chipsets, graphics processing devices, wireless devices, memory devices, application specific integrated circuits, and the like, may be alternately attached to the microelectronic substrates to form functional microelectronic packages.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: March 18, 2014
    Assignee: Intel Corporation
    Inventors: Md Altaf Hossain, Cliff C. Lee, David W. Browning, Itai M. Pines, Brian P. Kelly
  • Publication number: 20140003169
    Abstract: Disclosed embodiments may include a circuit having a plurality of data terminals, no more than two pairs of differential data strobe terminals associated with the plurality of data terminals, and digital logic circuitry. The digital logic circuitry may be coupled to the data terminals and configured to use the no more than two pairs of differential data strobe terminals concurrently with the plurality of data terminals to transfer data. Other embodiments may be disclosed.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 2, 2014
    Inventors: Md Altaf Hossain, Kevin J. Doran, Nagi Aboulenein
  • Publication number: 20120305303
    Abstract: The present disclosure relates to microelectronic substrates, such as interposers, motherboards, test platforms, and the like, that are fabricated to have overlapping connection zones, such that different microelectronic devices, such as microprocessors, chipsets, graphics processing devices, wireless devices, memory devices, application specific integrated circuits, and the like, may be alternately attached to the microelectronic substrates to form functional microelectronic packages.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Inventors: Md Altaf Hossain, Cliff C. Lee, David W. Browning, Itai M. Pines, Brian P. Kelly
  • Publication number: 20120161312
    Abstract: Electronic assemblies and their manufacture are described. One assembly includes a substrate and a die on a first side of the substrate. A plurality of non-solder metal bumps are positioned on a second side of the substrate. The assembly also includes a board to which the non-solder metal bumps are coupled. The assembly also includes solder positioned between the board and the substrate, wherein the board is electrically coupled to the substrate through the solder and the bumps. Other embodiments are described and claimed.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 28, 2012
    Inventors: Md Altaf HOSSAIN, Scott A. GILBERT