Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Abstract: A semiconductor memory device according to an embodiment includes a memory cell array configured to have a memory string obtained by connecting first selection transistors, memory transistors, and second selection transistors in series. When three directions crossing each other are set to first, second, and third directions, respectively, the memory cell array has first conductive layers to be control gates of the first selection transistors, second conductive layers to be control gates of the memory transistors, and third conductive layers to be control gates of the second selection transistors, which are laminated in the third direction. Ends of the first conductive layers and ends of the third conductive layers are formed in shapes of steps extending in the first direction and ends of the second conductive layers are formed in shapes of steps extending in both directions of the first direction and the second direction.

Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Abstract: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a stacked body alternately stacked with a plurality of members and a plurality of intermediate bodies having materials different from materials of the plurality of members, processing an end portion of at least two layers of the plurality of members sequentially in a stacking direction of the stacked body, and forming a step-wise step stacked with the plurality of members and the plurality of intermediate bodies, forming a plurality of side wall films contacting the step and making the end portion of the plurality of members in a step-wise. The making the end portion of the plurality of members in a step-wise includes retreating a portion of the plurality of members, the portion separated from the plurality of side wall films and exposed from the stacked body.

Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a stacked body alternately stacked with a plurality of members and a plurality of intermediate bodies having materials different from materials of the plurality of members, processing an end portion of at least two layers of the plurality of members sequentially in a stacking direction of the stacked body, and forming a step-wise step stacked with the plurality of members and the plurality of intermediate bodies, forming a plurality of side wall films contacting the step and making the end portion of the plurality of members in a step-wise. The making the end portion of the plurality of members in a step-wise includes retreating a portion of the plurality of members, the portion separated from the plurality of side wall films and exposed from the stacked body.

Abstract: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.

Abstract: According to one embodiment, a semiconductor memory device includes a first conductive layer, a first semiconductor body, a second semiconductor body, a first memory layer, and a second memory layer. The first conductive layer includes first to fourth extension regions, and a first connection region. The first extension region extends in a first direction. The second extension region extends in the first direction and is arranged with the first extension region in the first direction. The third extension region extends in the first direction and is arranged with the first extension region in a second direction crossing the first direction. The fourth extension region extends in the first direction, is arranged with the third extension region in the first direction, and is arranged with the second extension region in the second direction.

Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Abstract: A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a stacked body alternately stacked with a plurality of members and a plurality of intermediate bodies having materials different from materials of the plurality of members, processing an end portion of at least two layers of the plurality of members sequentially in a stacking direction of the stacked body, and forming a step-wise step stacked with the plurality of members and the plurality of intermediate bodies, forming a plurality of side wall films contacting the step and making the end portion of the plurality of members in a step-wise. The making the end portion of the plurality of members in a step-wise includes retreating a portion of the plurality of members, the portion separated from the plurality of side wall films and exposed from the stacked body.

Abstract: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

Abstract: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.

Abstract: A nonvolatile semiconductor memory device comprises: a memory cell region having a memory cell disposed therein; a peripheral region including a first stepped structure in which an end of a lower first layer is further from the memory cell region than is an end of an upper first layer; and a second stepped structure disposed on the first stepped structure, in which an end of a lower third layer is disposed further from the memory cell region than is an end of an upper third layer, a length in a second direction being shorter than a length in the second direction of the first layer or the second layer contacted by the second stepped structure, and a length in a third direction of the second stepped structure being shorter than a length in the third direction of the first layer or the second layer contacted by the second stepped structure.

Abstract: A nonvolatile semiconductor memory device comprises: a memory cell region having a memory cell disposed therein; a peripheral region including a first stepped structure in which an end of a lower first layer is further from the memory cell region than is an end of an upper first layer; and a second stepped structure disposed on the first stepped structure, in which an end of a lower third layer is disposed further from the memory cell region than is an end of an upper third layer, a length in a second direction being shorter than a length in the second direction of the first layer or the second layer contacted by the second stepped structure, and a length in a third direction of the second stepped structure being shorter than a length in the third direction of the first layer or the second layer contacted by the second stepped structure.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode layers separately stacked each other; a plurality of columnar sections provided in the stacked body and extending in a stacking direction of the stacked body; and a first insulating section separating the stacked body. The respective columnar sections include a semiconductor body extending in the stacking direction; and a charge storage film provided between the semiconductor body and the plurality of electrode layers. The first insulating section includes a first air gap.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and a drive circuit. The stacked body is provided on the substrate. The stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films. A through-hole is made in the stacked body to align in a stacking direction. The semiconductor pillar is buried in an interior of the through-hole. The charge storage film is provided between the electrode film and the semiconductor pillar. The drive circuit supplies a potential to the electrode film. The diameter of the through-hole differs by a position in the stacking direction. The drive circuit supplies a potential to reduce a potential difference with the semiconductor pillar as a diameter of the through-hole piercing the electrode film decreases.