Patents by Inventor Meihua Shen

Meihua Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180102236
    Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and Bl3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.
    Type: Application
    Filed: November 28, 2017
    Publication date: April 12, 2018
    Applicant: Lam Research Corporation
    Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
  • Patent number: 9899234
    Abstract: Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: February 20, 2018
    Assignee: Lam Research Corporation
    Inventors: Hui-Jung Wu, Thomas Joseph Knisley, Nagraj Shankar, Meihua Shen, John Hoang, Prithu Sharma
  • Patent number: 9870899
    Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 16, 2018
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
  • Patent number: 9818633
    Abstract: An EFEM useful for transferring wafers to and from wafer processing modules comprises an enclosure having a controlled environment therein bounded by a front wall, a back wall, first and second side walls, a top wall, and a bottom wall. The first side wall and the second side wall include two or more wafer load ports wherein each wafer load port is adapted to receive a FOUP. The front wall includes wafer ports configured to attach to respective load locks operable to allow a wafer to be transferred to a front wall cluster processing tool. The back wall includes a wafer port adapted to be in operational relationship with a back wall cluster processing tool. A robot in the EFEM enclosure is operable to transfer wafers through the wafer load ports, the first front wall wafer port, the second front wall wafer port, and the back wall wafer port.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: November 14, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Thorsten Lill, Vahid Vahedi, Candi Kristoffersen, Andrew D. Bailey, III, Meihua Shen, Rangesh Raghavan, Gary Bultman
  • Publication number: 20170229317
    Abstract: Apparatuses suitable for etching substrates at various pressure regimes are described herein. Apparatuses include a process chamber including a movable pedestal capable of being positioned at a raised position or a lowered position, showerhead, and optional plasma generator. Apparatuses may be suitable for etching non-volatile metals using a treatment while the movable pedestal is in the lowered position and a high pressure exposure to organic vapor while the movable pedestal is in the raised position.
    Type: Application
    Filed: February 5, 2016
    Publication date: August 10, 2017
    Inventors: Meihua Shen, Shuogang Huang, Thorsten Lill, Theo Panagopoulos
  • Patent number: 9595452
    Abstract: A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: March 14, 2017
    Assignee: Lam Research Corporation
    Inventors: Chih-Hsun Hsu, Meihua Shen, Thorsten Lill
  • Publication number: 20170069462
    Abstract: Methods of etching and smoothening films by exposing to a halogen-containing plasma and an inert plasma within a bias window in cycles are provided. Methods are suitable for etching and smoothening films of various materials in the semiconductor industry and are also applicable to applications in optics and other industries.
    Type: Application
    Filed: August 31, 2016
    Publication date: March 9, 2017
    Inventors: Keren Jacobs Kanarik, Samantha Tan, Thorsten Lill, Meihua Shen, Yang Pan, Jeffrey Marks, Richard Wise
  • Patent number: 9589853
    Abstract: A method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber comprises supporting the substrate on a support surface of a substrate support assembly that includes an array of independently controlled thermal control elements therein which are operable to control the spatial and temporal temperature of the support surface of the substrate support assembly to form independently controllable heater zones which are formed to correspond to a desired temperature profile across the upper surface of the semiconductor substrate. The etch rate across the upper surface of the semiconductor substrate during plasma etching depends on a localized temperature thereof wherein the desired temperature profile is determined such that the upper surface of the semiconductor substrate is planarized within a predetermined time. The substrate is plasma etched for the predetermined time thereby planarizing the upper surface of the substrate.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: March 7, 2017
    Assignee: LAM RESEARCH CORPORATION
    Inventors: Monica Titus, Gowri Kamarthy, Harmeet Singh, Yoshie Kimura, Meihua Shen, Baosuo Zhou, Yifeng Zhou, John Hoang
  • Publication number: 20170053810
    Abstract: Provided herein are methods of atomic layer etching (ALE) of metals including tungsten (W) and cobalt (Co). The methods disclosed herein provide precise etch control down to the atomic level, with etching a low as 1 ? to 10 ? per cycle in some embodiments. In some embodiments, directional control is provided without damage to the surface of interest. The methods may include cycles of a modification operation to form a reactive layer, followed by a removal operation to etch only this modified layer. The modification is performed without spontaneously etching the surface of the metal.
    Type: Application
    Filed: August 17, 2016
    Publication date: February 23, 2017
    Inventors: Wenbing Yang, Samantha Tan, Keren Jacobs Kanarik, Jeffrey Marks, Taeseung Kim, Meihua Shen, Thorsten Lill
  • Patent number: 9570320
    Abstract: A method of opening a barrier film below copper structures in a stack is provided. A pulsed gas is provided into a plasma processing chamber, wherein the providing the pulsed gas comprises providing a pulsed H2 containing gas and providing a pulsed halogen containing gas, wherein the pulsed H2 containing gas and the pulsed halogen containing gas are pulsed out of phase, and wherein the pulsed H2 containing gas has an H2 high flow period and the pulsed halogen containing gas has a halogen containing gas high flow period, wherein the H2 high flow period is greater than the halogen containing gas high flow period. The pulsed gas is formed into a plasma. The copper structures and the barrier film are exposed to the plasma, which etches the barrier film. In another embodiment, a wet and dry cyclical process may be used.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: February 14, 2017
    Assignee: Lam Research Corporation
    Inventors: Meihua Shen, Ji Zhu, Shuogang Huang, Baosuo Zhou, John Hoang, Prithu Sharma, Thorsten Lill
  • Publication number: 20170011891
    Abstract: A method and apparatus are provided for plasma etching a substrate in a processing chamber. A focus ring assembly circumscribes a substrate support, providing uniform processing conditions near the edge of the substrate. The focus ring assembly comprises two rings, a first ring and a second ring, the first ring comprising quartz, and the second ring comprising monocrystalline silicon, silicon carbide, silicon nitride, silicon oxycarbide, silicon oxynitride, or combinations thereof. The second ring is disposed above the first ring near the edge of the substrate, and creates a uniform electric field and gas composition above the edge of the substrate that results in uniform etching across the substrate surface.
    Type: Application
    Filed: September 26, 2016
    Publication date: January 12, 2017
    Inventors: Edward P. HAMMOND, IV, Jing ZOU, Rodolfo P. BELEN, Meihua SHEN, Nicolas GANI, Andrew NGUYEN, David PALAGASHVILI, Michael D. WILLWERTH
  • Patent number: 9533332
    Abstract: Embodiments of the invention include methods for in-situ chamber dry cleaning a plasma processing chamber utilized for gate structure fabrication process in semiconductor devices. In one embodiment, a method for in-situ chamber dry clean includes supplying a first cleaning gas including at least a boron containing gas into a processing chamber in absence of a substrate disposed therein, supplying a second cleaning gas including at least a halogen containing gas into the processing chamber in absence of the substrate, and supplying a third cleaning gas including at least an oxygen containing gas into the processing chamber in absence of the substrate.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: January 3, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Noel Sun, Meihua Shen, Nicolas Gani, Chung Nang Liu, Radhika C. Mani
  • Publication number: 20160351418
    Abstract: A method for selectively etching silicon oxide is provided. A surface reaction phase is provided comprising flowing a surface reaction gas comprising hydrogen, nitrogen and fluorine containing components to form silicon oxide into a compound comprising silicon, hydrogen, nitrogen, and fluorine, forming the surface reaction gas into a plasma, and stopping the flow of the surface reaction gas. The surface is wet treated to remove the compound.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 1, 2016
    Inventors: Chih-Hsun HSU, Meihua SHEN, Thorsten LILL
  • Publication number: 20160314985
    Abstract: Methods of etching cobalt on substrates are provided. Some methods involve exposing the substrate to a boron-containing halide gas and an additive, and exposing the substrate to an activation gas and a plasma. Additives improve selectively depositing a thicker layer of a boron-containing halide material on a surface of a mask than on a surface of a metal. Additives include H2, CH4, CF4, NF3, and Cl2. Boron-containing halide gases include BCl3, BBr3, BF3, and BI3. Exposures may be performed in two or more cycles, with variations in durations and/or bias power for each exposure in the two or more cycles.
    Type: Application
    Filed: June 24, 2015
    Publication date: October 27, 2016
    Inventors: Jialing Yang, Baosuo Zhou, Meihua Shen, Thorsten Lill, John Hoang
  • Patent number: 9431268
    Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of a reaction of anhydrous HF with an activated surface of an oxide, with an emphasis on removal of water generated in the reaction. In certain embodiments the oxide surface is first modified by adsorbing an OH-containing species (e.g., an alcohol) or by forming OH bonds using a hydrogen-containing plasma. The activated oxide is then etched by a separately introduced anhydrous HF, while the water generated in the reaction is removed from the surface of the substrate as the reaction proceeds, or at any time during or after the reaction. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: August 30, 2016
    Assignee: Lam Research Corporation
    Inventors: Thorsten Lill, Ivan L. Berry, III, Meihua Shen, Alan M. Schoepp, David J. Hemker
  • Patent number: 9391267
    Abstract: A method for etching a stack with at least one metal layer in one or more cycles is provided. An initiation step is preformed, transforming part of the at least one metal layer into metal oxide, metal halide, or lattice damaged metallic sites. A reactive step is performed providing one or more cycles, where each cycle comprises providing an organic solvent vapor to form a solvated metal, metal halide, or metal oxide state and providing an organic ligand solvent to form volatile organometallic compounds.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: July 12, 2016
    Assignee: Lam Research Corporation
    Inventors: Meihua Shen, Harmeet Singh, Samantha S. H. Tan, Jeffrey Marks, Thorsten Lill, Richard P. Janek, Wenbing Yang, Prithu Sharma
  • Publication number: 20160196984
    Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of a reaction of anhydrous HF with an activated surface of an oxide, with an emphasis on removal of water generated in the reaction. In certain embodiments the oxide surface is first modified by adsorbing an OH-containing species (e.g., an alcohol) or by forming OH bonds using a hydrogen-containing plasma. The activated oxide is then etched by a separately introduced anhydrous HF, while the water generated in the reaction is removed from the surface of the substrate as the reaction proceeds, or at any time during or after the reaction. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.
    Type: Application
    Filed: January 5, 2015
    Publication date: July 7, 2016
    Inventors: Thorsten Lill, Ivan L. Berry, III, Meihua Shen, Alan M. Schoepp, David J. Hemker
  • Publication number: 20160111309
    Abstract: An EFEM useful for transferring wafers to and from wafer processing modules comprises an enclosure having a controlled environment therein bounded by a front wall, a back wall, first and second side walls, a top wall, and a bottom wall. The first side wall and the second side wall include two or more wafer load ports wherein each wafer load port is adapted to receive a FOUP. The front wall includes wafer ports configured to attach to respective load locks operable to allow a wafer to be transferred to a front wall cluster processing tool. The back wall includes a wafer port adapted to be in operational relationship with a back wall cluster processing tool. A robot in the EFEM enclosure is operable to transfer wafers through the wafer load ports, the first front wall wafer port, the second front wall wafer port, and the back wall wafer port.
    Type: Application
    Filed: October 17, 2014
    Publication date: April 21, 2016
    Inventors: Thorsten Lill, Vahid Vahedi, Candi Kristoffersen, Andrew D. Bailey, III, Meihua Shen, Rangesh Raghavan, Gary Bultman
  • Publication number: 20160104630
    Abstract: A method of opening a barrier film below copper structures in a stack is provided. A pulsed gas is provided into a plasma processing chamber, wherein the providing the pulsed gas comprises providing a pulsed H2 containing gas and providing a pulsed halogen containing gas, wherein the pulsed H2 containing gas and the pulsed halogen containing gas are pulsed out of phase, and wherein the pulsed H2 containing gas has an H2 high flow period and the pulsed halogen containing gas has a halogen containing gas high flow period, wherein the H2 high flow period is greater than the halogen containing gas high flow period. The pulsed gas is formed into a plasma. The copper structures and the barrier film are exposed to the plasma, which etches the barrier film. In another embodiment, a wet and dry cyclical process may be used.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 14, 2016
    Inventors: Meihua SHEN, Ji ZHU, Shuogang HUANG, Baosuo ZHOU, John HOANG, Prithu SHARMA, Thorsten LILL
  • Patent number: 9257638
    Abstract: A method for etching a stack with an Ru containing layer disposed below a hardmask and above a magnetic tunnel junction (MTJ) stack with pinned layer is provided. The hardmask is etched with a dry etch. The Ru containing layer is etched, where the etching uses hypochlorite and/or O3 based chemistries. The MTJ stack is etched. The MTJ stack is capped with dielectric materials. The pinned layer is etched following the MTJ capping.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: February 9, 2016
    Assignee: Lam Research Corporation
    Inventors: Samantha S.H. Tan, Wenbing Yang, Meihua Shen, Richard P. Janek, Jeffrey Marks, Harmeet Singh, Thorsten Lill