Patents by Inventor Meng FANG

Meng FANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154113
    Abstract: A sodium-ion pouch cell belongs to the technical field of new energy materials and devices. The pouch cell and comprises a cathode piece, a diaphragm, a presodiated anode piece, an electrolyte, a tab and an aluminum plastic film package, and is obtained by sequentially laminating 1 to 30 cathode pieces and 2 to 31 presodiated anode pieces in a Z-shaped manner, adding the electrolyte and packaging, the sodium-ion pouch cell is characterized in that: the cathode piece contains an O3 layered oxide cathode material, a chemical formula is NaaNibZncFedMneTi(1-b-c-d-e)O2, 0.8?a?1, 0.2<b?0.5, 0<c?0.1, 0<d?0.2, 0.2<e?0.5, the presodiated anode piece contains a hard carbon anode material, and a double-sided density of the cathode piece is 28 mg/cm2 to 33 mg/cm2; and a double-sided density of the anode piece is 14 mg/cm2 to 16 mg/cm2, and a battery capacity is 0.1 Ah to 10 Ah.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 9, 2024
    Inventors: Fujun LI, Tong ZHANG, Suning GAO, Hengyi FANG, Meng REN, Jun CHEN
  • Patent number: 11950016
    Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: April 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chih-Hung Pan, Chia-Chi Liu, Shun-Fang Liu, Meng-Kun Li, Chao-An Chen
  • Patent number: 11948939
    Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd
    Inventors: Kai-Chi Wu, Ching-Hung Kao, Meng-I Kang, Kuo-Fang Ting
  • Publication number: 20240105630
    Abstract: A semiconductor device has a first RDL substrate with first conductive pillars formed over a first surface of the first RDL substrate. A first electrical component is disposed over the first surface of the first RDL substrate. A hybrid substrate is bonded to the first RDL substrate. An encapsulant is deposited around the hybrid substrate and first RDL substrate with the first conductive pillars and first electrical component embedded within the encapsulant. A second RDL substrate with second conductive pillars formed over the second RDL substrate and second electrical component disposed over the second RDL substrate can be bonded to the hybrid substrate. A second RDL can be formed over a second surface of the first RDL substrate. A third electrical component is disposed over a second surface of the first RDL substrate. A shielding frame is disposed over the third electrical component.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Applicant: STATS ChipPAC Pte. Ltd.
    Inventors: Yaojian Lin, Linda Pei Ee Chua, Ching Meng Fang, Hin Hwa Goh
  • Publication number: 20240098183
    Abstract: A marking method on image combined with sound signal, a terminal apparatus, and a server are provided. In the method, a first image is displayed. A selection command is detected. A target sound signal is embedded into a speech signal so as to generate a combined sound signal. The combined sound signal is transmitted. The selection command corresponds to a target region in the first image, and the selection command is generated selecting the target region through an input operation. The target sound signal corresponds to the target region of the selection command, and the speech signal is obtained by receiving sound. Accordingly, all attendants in the video conference are able to make makings on a shared screen.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 21, 2024
    Applicant: Acer Incorporated
    Inventors: Po-Jen Tu, Ming-Chun Fang, Jia-Ren Chang, Kai-Meng Tzeng, Chao-Kuang Yang
  • Publication number: 20240069041
    Abstract: The present disclosure provides methods and materials for screening a compound or monitoring a subjects response to a compound or dosing regimen for treating frontotemporal dementia (FTD). Methods and materials for identifying and treating a subject having FTD are also provided.
    Type: Application
    Filed: October 13, 2021
    Publication date: February 29, 2024
    Applicant: Denali Therapeutics Inc.
    Inventors: Giuseppe Astarita, Sarah L. Devos, Gilbert Di Paolo, Meng Fang, Fen Huang, Todd P. Logan, Matthew J. Simon
  • Publication number: 20240070167
    Abstract: An example operation may include one or more of receiving a message from an agent installed at a data replication server, the message comprising a status identifier of a checksum validation of a data replication operation, identifying a latency value associated with the data replication server, determining whether a data loss has occurred based on the status identifier of the checksum validation and the latency value, and in response to a determination that the data loss has occurred, transmitting a notification of the data loss to a computing system associated with the data replication server.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: He Fang Zhang, Yan Liu, Meng Zhao, Hai Long Shi
  • Patent number: 11915755
    Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
  • Patent number: 11869800
    Abstract: A method for fabricating a semiconductor device includes receiving a silicon substrate having an isolation feature disposed on the substrate and a well adjacent the isolation feature, wherein the well includes a first dopant. The method also includes etching a recess to remove a portion of the well and epitaxially growing a silicon layer (EPI layer) in the recess to form a channel, wherein the channel includes a second dopant. The method also includes forming a barrier layer between the well and the EPI layer, the barrier layer including at least one of either silicon carbon or silicon oxide. The barrier layer can be formed either before or after the channel. The method further includes forming a gate electrode disposed over the channel and forming a source and drain in the well.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: January 9, 2024
    Inventors: Harry-Hak-Lay Chuang, Bao-Ru Young, Wei Cheng Wu, Meng-Fang Hsu, Kong-Pin Chang, Chia Ming Liang
  • Publication number: 20230395292
    Abstract: The present application provides an iron-based amorphous alloy powder, a preparation method therefor and an application thereof. The iron-based amorphous alloy powder comprises a Cu element, and the particle shape of the iron-based amorphous alloy powder is spherical. The preparation method comprises the following steps: (1) smelting a master alloy to obtain iron-based amorphous alloy molten iron, the master alloy comprising a Cu element; and (2) treating the iron-based amorphous alloy molten iron obtained in step (1) by means of water-gas combined atomization to obtain the iron-based amorphous alloy powder.
    Type: Application
    Filed: October 20, 2021
    Publication date: December 7, 2023
    Applicant: HENGDIAN GROUP DMEGC MAGNETICS CO., LTD
    Inventors: Meng Fang, Yangzhong Du, Junwei Lu, Haifei Lou, Linke Wang, Yuchao Du
  • Publication number: 20230377942
    Abstract: A method for fabricating a semiconductor device includes receiving a silicon substrate having an isolation feature disposed on the substrate and a well adjacent the isolation feature, wherein the well includes a first dopant. The method also includes etching a recess to remove a portion of the well and epitaxially growing a silicon layer (EPI layer) in the recess to form a channel, wherein the channel includes a second dopant. The method also includes forming a barrier layer between the well and the EPI layer, the barrier layer including at least one of either silicon carbon or silicon oxide. The barrier layer can be formed either before or after the channel. The method further includes forming a gate electrode disposed over the channel and forming a source and drain in the well.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 23, 2023
    Inventors: Harry-Hak-Lay Chuang, Bao-Ru Young, Wei Cheng Wu, Meng-Fang Hsu, Kong-Pin Chang, Chia Ming Liang
  • Patent number: 11774692
    Abstract: An optical module includes a housing, and a main circuit board, an optical transmitting assembly, an optical receiving assembly, and an electrical connector that are disposed inside the housing. The optical transmitting assembly includes at least two sets of lasers, a transmitting-end optical assembly, and a transmitting-end optical fiber receptacle. The optical receiving assembly includes at least two sets of photoelectric detectors, a receiving-end optical assembly, and a receiving-end optical fiber receptacle. The electrical connector electrically connects the optical transmitting assembly and the optical receiving assembly to the main circuit board.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: October 3, 2023
    Assignee: InnoLight Technology (Suzhou) Ltd.
    Inventors: Long Chen, Yuzhou Sun, Xiongfei Zhai, Donghan Wang, Zhenzhong Wang, Meng Fang, Chao Zhang, Xigui Fang, Xiangzhong Wang
  • Patent number: 11658586
    Abstract: The present disclosure relates to a wearable water triboelectric generator, wherein the water triboelectric generator comprises a first substrate having a first surface and a second surface, wherein the first surface and the second surface are opposing to each other; and wherein the first surface comprises a modified hydrophobic surface comprising a coating of hydrophobic cellulose oleoyl ester nanoparticles. There is also provided a wearable dual mode water and contact triboelectric generator comprising said water triboelectric generator and a contact triboelectric generator, wherein the water triboelectric generator and the contact triboelectric generator are arranged such that the first substrate of the water triboelectric generator completely surrounds or encapsulates the contact triboelectric generator.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: May 23, 2023
    Assignee: Nanyang Technological University
    Inventors: Jiaqing Xiong, Pooi See Lee, Meng-Fang Lin
  • Publication number: 20220093479
    Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 24, 2022
    Applicant: JCET Semiconductor (Shaoxing) Co., Ltd.
    Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
  • Publication number: 20220043224
    Abstract: An optical module includes a housing, and a main circuit board, an optical transmitting assembly, an optical receiving assembly, and an electrical connector that are disposed inside the housing. The optical transmitting assembly includes at least two sets of lasers, a transmitting-end optical assembly, and a transmitting-end optical fiber receptacle. The optical receiving assembly includes at least two sets of photoelectric detectors, a receiving-end optical assembly, and a receiving-end optical fiber receptacle. The electrical connector electrically connects the optical transmitting assembly and the optical receiving assembly to the main circuit board.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 10, 2022
    Inventors: Long CHEN, Yuzhou SUN, Xiongfei ZHAI, Donghan WANG, Zhenzhong WANG, Meng FANG, Chao ZHANG, Xigui FANG, Xiangzhong WANG
  • Patent number: 11227809
    Abstract: A semiconductor device has a plurality of semiconductor die. A first prefabricated insulating film is disposed over the semiconductor die. A conductive layer is formed over the first prefabricated insulating film. An interconnect structure is formed over the semiconductor die and first prefabricated insulating film. The first prefabricated insulating film is laminated over the semiconductor die. The first prefabricated insulating film includes glass cloth, glass fiber, or glass fillers. The semiconductor die is embedded within the first prefabricated insulating film with the first prefabricated insulating film covering first and side surfaces of the semiconductor die. The interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A portion of the first prefabricated insulating film is removed after disposing the first prefabricated insulating film over the semiconductor die.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: January 18, 2022
    Inventors: See Chian Lim, Teck Tiong Tan, Yung Kuan Hsiao, Ching Meng Fang, Yoke Hor Phua, Bartholomew Liao
  • Patent number: 11181705
    Abstract: An optical module includes a housing, and a main circuit board, an optical transmitting assembly, an optical receiving assembly, and an electrical connector that are disposed inside the housing. The optical transmitting assembly includes at least two sets of lasers, a transmitting-end optical assembly, and a transmitting-end optical fiber receptacle. The optical receiving assembly includes at least two sets of photoelectric detectors, a receiving-end optical assembly, and a receiving-end optical fiber receptacle. The electrical connector electrically connects the optical transmitting assembly and the optical receiving assembly to the main circuit board.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: November 23, 2021
    Assignee: InnoLight Technology (Suzhou) Ltd.
    Inventors: Long Chen, Yuzhou Sun, Xiongfei Zhai, Donghan Wang, Zhenzhong Wang, Meng Fang, Chao Zhang, Xigui Fang, Xiangzhong Wang
  • Patent number: 10849352
    Abstract: A coffee bean roasting-degree distribution measuring device includes a housing, a micro-processing unit, an image-capturing unit, a light-emitting unit, and a displaying unit. The housing has a first end and a second end opposite the first end with an accommodating space existing between the first end and the second end. The second end is disposed to surround a group of coffee beans under measurement. The micro-processing unit and the image-capturing unit are disposed inside the accommodating space and electrically connected to each other. The light-emitting unit is disposed inside the accommodating space and includes at least one light emitter and a circuit board electrically connected to the light emitter. The circuit board is further electrically connected to the micro-processing unit and each of the light emitter has a light emitting port facing toward the second end.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: December 1, 2020
    Assignee: Lighttells Corp., Ltd.
    Inventors: Chia-Chung Chen, Meng-Fang Yu
  • Patent number: 10833566
    Abstract: An inverter integrated motor having a frame, a motor body, a cap, a fan, an inverter, and a heat transfer module is provided. The motor body is received in the frame, and a heat dissipation passage is formed between them, the motor body is covered and closed by the cap, and the cap and the motor body are presented in a continuous form. The inverter is attached on an outer side surface of the frame. The heat transfer module is located between the cap and the fan and thermally connected to the inverter. Airflow is generated by the fan to flow through the heat transfer module and exchange heat therewith, and the airflow then flows into the heat dissipation passage along the cap. Accordingly, an attached additional fan for the inverter is not necessary.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: November 10, 2020
    Assignee: CHICONY POWER TECHNOLOGY CO., LTD.
    Inventors: Meng-Fang Chang, Yu-Chia Ting
  • Publication number: 20200321238
    Abstract: A method for fabricating a semiconductor device includes receiving a silicon substrate having an isolation feature disposed on the substrate and a well adjacent the isolation feature, wherein the well includes a first dopant. The method also includes etching a recess to remove a portion of the well and epitaxially growing a silicon layer (EPI layer) in the recess to form a channel, wherein the channel includes a second dopant. The method also includes forming a barrier layer between the well and the EPI layer, the barrier layer including at least one of either silicon carbon or silicon oxide. The barrier layer can be formed either before or after the channel. The method further includes forming a gate electrode disposed over the channel and forming a source and drain in the well.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Harry-Hak-Lay Chuang, Bao-Ru Young, Wei Cheng Wu, Meng-Fang Hsu, Kong-Pin Chang, Chia Ming Liang