Abstract: A system-in-package structure includes a carrier substrate having a molding area and a periphery area, at least a chip disposed in the molding area, an encapsulation covering the chip and the molding area, a plurality of solder pads disposed in the periphery area, and a solder mask disposed in the periphery area and partially exposing the surface of the solder pads. The solder mask includes at least a void therein.

Abstract: Provided is a singulation method of a semiconductor device that can perform a sawing process while protecting a pad. In the singulation method for forming a semiconductor device including a scribe lane region and a chip region, pads are formed in the chip region. Photoresist patterns exposing the scribe lane region and covering the pads are formed, and a substrate in the scribe lane region is cut and a washing solution is sprayed on the scribe lane region. According to the method, wafers can be stably separated from each other while pads of a semiconductor device are protected, so that stabilization in the fabrication process can be realized and pad corrosion caused by DI water is prevented during a sawing process. Accordingly, a defective device is minimized and reliability of a device can improve.

Abstract: A semiconductor fabrication method may include depositing hexamethyldisilazane (HMDS) on a wafer surface, cooling the wafer and coating the wafer surface with a first photoresist, heating the wafer on which the first photoresist has been coated to induce a silylation reaction, cooling the wafer, and developing and removing the first photoresist. Adhesion between the wafer's surface and a subsequently applied photoresist may thus be enhanced. Accordingly, manufacturing time can be saved and productivity can be improved by simplifying the fabrication process and preventing waste of materials.

Abstract: A method for fabricating a semiconductor device including forming a depression in a front surface of a semiconductor substrate, forming an electrode pad within the depression, forming structures including circuit devices and metal wires on the front surface of the semiconductor substrate, and exposing the electrode pad by removing a rear surface of the semiconductor substrate.

Abstract: The present invention relates to a substrate structure having a solder mask and a process for making the same. The process comprises: (a) providing a substrate having a top surface, the top surface having a die pad and a plurality of solder pads; (b) forming a first solder mask on the top surface, the first solder mask having a plurality of openings, each opening corresponding to each solder pad so as to expose at least part of the solder pad; and (c) forming a second solder mask on the first solder mask. Whereby, the substrate structure of the invention can be used for packaging a thicker die so as to prevent the die crack and the overflow of molding compound will be avoided.

Abstract: Back grinding methods for fabricating an image sensor are disclosed. An example method of back grinding an image sensor comprises: forming a profile anti-deformation film on a micro lens of the image sensor; grinding a backside of a semiconductor substrate of the image sensor; and removing the profile anti-deformation film.

Abstract: A system-in-package structure includes a carrier substrate having a molding area and a periphery area, at least a chip disposed in the molding area, an encapsulation covering the chip and the molding area, a plurality of solder pads disposed in the periphery area, and a solder mask disposed in the periphery area and partially exposing the surface of the solder pads. The solder mask includes at least a void therein.

Abstract: A method of manufacturing a CMOS image sensor. The present invention enables forming micro-lenses having a uniform shape throughout a semiconductor substrate. The method of manufacturing a CMOS image sensor includes: coating a color filter layer and a semiconductor substrate with a first photoresist; selectively exposing the first photoresist to light to define a planarization layer; coating the first photoresist with a second photoresist; selectively exposing the second photoresist to define a plurality of micro-lens bodies; and baking the plurality of micro-lens bodies to form a plurality of micro-lenses.

Abstract: A CMOS image sensor that includes a semiconductor substrate with a plurality of photodiodes arranged at fixed intervals on the semiconductor substrate. A light-shielding layer partially overlaping the plurality of photodiodes and an insulating interlayer are formed on an entire surface of the semiconductor substrate including the plurality of photodiodes. A color filter layer having a plurality of color filters separated by a predetermined gap is formed on the insulating interlayer and a planarization layer is formed over the entire surface of the semiconductor substrate including the color filter layer. A plurality of microlenses are formed on the planarization layer in correspondence with the color filters of the color filter layer, wherein an additional structural layer, disposed between the color filter layer and the insulating interlayer, is provided to close a predetermined gap between the color filters of the color filter layer.

Abstract: A CMOS image sensor and a method for fabricating the same are disclosed, in which an incidence of void formation is reduced or prevented, to improve characteristics of the image sensor. The CMOS image sensor includes a plurality of photodiode areas in a semiconductor substrate at constant intervals, a dielectric layer on or over the semiconductor substrate and the photodiode areas, a color filter layer on or over the dielectric layer at constant intervals, a void prevention layer between adjacent color filters in the color filter layer, a planarization layer on or over the semiconductor substrate and the void prevention layer, and a plurality of microlenses on the planarization layer.

Abstract: A method for fabricating a semiconductor device including forming a depression in a front surface of a semiconductor substrate, forming an electrode pad within the depression, forming structures including circuit devices and metal wires on the front surface of the semiconductor substrate, and exposing the electrode pad by removing a rear surface of the semiconductor substrate.

Abstract: A method of bonding a metal pad of the semiconductor device including a step of forming a metal pad in a pad forming area of a chip and another pad forming area of another chip. The another chip is adjacent to the chip, and both the chip and the another chip are on a wafer. The method further includes forming a protective layer at least on the metal pad and separating the metal pad to provide separated metal pads. One of the separated metal pads is attached to the chip and another of the separated metal pads is attached to the another chip. Then, at least some of the protective layer and at least some of the one of the separated metal pads is removed to provide an exposed metal pad. A package lead line is attached to the exposed metal pad.

Abstract: Back grinding methods for fabricating an image sensor are disclosed. An example method of back grinding an image sensor comprises: forming a profile anti-deformation film on a micro lens of the image sensor; grinding a backside of a semiconductor substrate of the image sensor; and removing the profile anti-deformation film.

Abstract: A method of manufacturing a CMOS image sensor. The present invention enables forming micro-lenses having a uniform shape throughout a semiconductor substrate. The method of manufacturing a CMOS image sensor includes: coating a color filter layer and a semiconductor substrate with a first photoresist; selectively exposing the first photoresist to light to define a planarization layer; coating the first photoresist with a second photoresist; selectively exposing the second photoresist to define a plurality of micro-lens bodies; and baking the plurality of micro-lens bodies to form a plurality of micro-lenses.