Patents by Inventor Meng Zhao

Meng Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190189648
    Abstract: A method for fabricating an array substrate includes: forming a first metal layer on a base substrate; forming an insulating layer of a silicon-containing organic material on the first metal layer; forming a second metal layer on the insulating layer; patterning the second metal layer by adopting an oxygen ion etching process to partially cover the insulating layer; and forming a silicon oxide layer, by the oxygen ion etching process, on a surface of the insulating layer not covered by the second metal layer.
    Type: Application
    Filed: August 21, 2018
    Publication date: June 20, 2019
    Inventor: Meng ZHAO
  • Publication number: 20190180073
    Abstract: A fingerprint identification display panel includes: a substrate; a plurality of sub-pixel regions including a plurality of first, second sub-pixel regions. A first driving circuit and a first light-emitting unit electrically connected thereto are sequentially disposed on the substrate and located in the plurality of first sub-pixel regions. A light shielding layer having through holes are disposed on the substrate. A plurality of light detection units are disposed at a side of the light shielding layer adjacent to the substrate, and corresponds to through holes one by one. At least one through hole is disposed in the second sub-pixel region, and a ratio of an area of an orthographic projection of the through hole on the substrate to an area of an orthographic projection of the second sub-pixel region on the substrate is greater than or equal to 30%.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 13, 2019
    Inventors: Hao ZHANG, Shiming SHI, Meng ZHAO
  • Publication number: 20190181258
    Abstract: The present disclosure teaches semiconductor devices and methods for manufacturing the same. Implementations of the semiconductor device may include: a semiconductor substrate; a semiconductor fin positioned on the semiconductor substrate; and a gate structure positioned on the semiconductor fin, where the gate structure includes a gate dielectric layer on a part of a surface of the semiconductor fin and a gate on the gate dielectric layer; where the gate includes a metal gate layer on the gate dielectric layer and a semiconductor layer on a side surface of at least one side of the metal gate layer; and where the semiconductor layer includes a dopant, where a conductivity type of the dopant is the opposite of a conductivity type of the semiconductor fin. The present disclosure can improve a work function of the device, thereby improving a current characteristic of the device during a working process, reducing the short channel effect (SCE), and lowering a leakage current.
    Type: Application
    Filed: August 21, 2018
    Publication date: June 13, 2019
    Applicants: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Meng Zhao
  • Publication number: 20190181266
    Abstract: The present disclosure provides semiconductor devices and methods for manufacturing same and relates to the field of semiconductor technologies. Some implementations of a method may include: providing a semiconductor structure, where the semiconductor structure includes a substrate, a semiconductor fin having a first conductivity type and disposed on the substrate, and a gate structure covering a part of the semiconductor fin, where the semiconductor fin includes a first part and a second part respectively located on two sides of the gate structure; executing first doping on the first part and the second part of the semiconductor fin, where a dopant from the first doping has a second conductivity type that is opposite to the first conductivity type; and after the first doping is executed, forming a source on the first part of the semiconductor fin and forming a drain on the second part of the semiconductor fin.
    Type: Application
    Filed: August 21, 2018
    Publication date: June 13, 2019
    Applicants: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: Meng Zhao
  • Publication number: 20190172886
    Abstract: The present disclosure relates to an OLED display panel, a method for manufacturing the same and a display device. The OLED display panel includes: a substrate; a thin film transistor and a photosensitive device for fingerprint recognition on the substrate; a transparent dielectric layer on the substrate and the thin film transistor; a light-shielding-planarization single layer on the transparent dielectric layer, wherein the light-shielding-planarization single layer has a first hole exposing the transparent dielectric layer, and a projection of the first hole on the substrate overlays with a projection of the photosensitive device on the substrate; and an organic light emitting device on the light-shielding-planarization single layer, wherein the organic light emitting device is connected to a source/drain electrode of the thin film transistor through a second hole penetrating the light-shielding-planarization single layer.
    Type: Application
    Filed: August 21, 2018
    Publication date: June 6, 2019
    Inventors: Weixin MA, Meng ZHAO
  • Publication number: 20190165287
    Abstract: A flexible display substrate, a method for manufacturing the same, a flexible display panel, and a flexible display device. The flexible display substrate includes: a flexible base substrate including a bendable region and an unbendable region, the bendable region including a bendable edge and an unbendable edge, the unbendable edge extending in a first direction; and at least one transistor in the bendable region of the flexible base substrate, including a gate electrode, a source region, a drain region, and an active layer, wherein the active layer extends in a direction substantially parallel to the first direction.
    Type: Application
    Filed: July 11, 2018
    Publication date: May 30, 2019
    Inventors: Hongwei Tian, Yanan Niu, Meng Zhao, Zheng Liu
  • Publication number: 20190153105
    Abstract: The present invention is directed toward a monoclonal antibody to fibroblast growth factor receptor 2, a pharmaceutical composition comprising same, and methods of treatment comprising administering such a pharmaceutical composition to a patient.
    Type: Application
    Filed: October 18, 2018
    Publication date: May 23, 2019
    Inventors: Kyung Jin Kim, Wei-meng Zhao, Hangil Park, Maximiliano Vasquez
  • Publication number: 20190140055
    Abstract: A semiconductor device may include a semiconductor substrate. The semiconductor device may further include a gate electrode that overlaps the semiconductor substrate. The semiconductor device may further include a channel region that overlaps at least one of the gate electrode and the semiconductor substrate. The semiconductor device may further include a stress adjustment element that contacts the channel region and is positioned between the channel region and a surface of the semiconductor substrate in a direction perpendicular to the surface of the semiconductor substrate. A maximum width of the channel region in a direction parallel to the surface of the semiconductor substrate is greater than a maximum width of the stress adjustment element in the direction parallel to the surface of the semiconductor substrate in a cross-sectional view of the semiconductor device.
    Type: Application
    Filed: January 8, 2019
    Publication date: May 9, 2019
    Inventor: Meng ZHAO
  • Publication number: 20190115450
    Abstract: Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate; forming a dummy gate structure over the base substrate; forming source/drain regions having source/drain doping ions in the base substrate at both sides of the dummy gate structure; forming a dielectric layer on the source/drain regions and covering the side surfaces of the dummy gate structure; removing the dummy gate structure to form an opening in the dielectric layer; performing one or more of a first ion implantation process, for implanting first barrier ions in the base substrate toward the source region to form a first barrier layer under the opening, and a second ion implantation process, for implanting second barrier ions in the base substrate toward the source region to form a second barrier layer under the opening; and forming a gate structure in the opening.
    Type: Application
    Filed: December 13, 2018
    Publication date: April 18, 2019
    Inventor: Meng ZHAO
  • Patent number: 10230265
    Abstract: The present invention relates to a method and apparatus for controlling power distribution by a control system that only requires a broadcast medium between a controller (30) and appliances or loads (20-1 to 20-n) and information about the current total power consumption of the system to precisely reach a target consumption level in a stepwise, fast converging way without “seesaw” effects and with “fair distribution” of any power reduction.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: March 12, 2019
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Ludovicus Marinus Gerardus Maria Tolhuizen, Sri Andari Husen, Oliver Schreyer, Meng Zhao, Emmanuel David Lucas Michael Frimout
  • Patent number: 10211289
    Abstract: A semiconductor device may include a semiconductor substrate. The semiconductor device may further include a gate electrode that overlaps the semiconductor substrate. The semiconductor device may further include a channel region that overlaps at least one of the gate electrode and the semiconductor substrate. The semiconductor device may further include a stress adjustment element that contacts the channel region and is positioned between the channel region and a surface of the semiconductor substrate in a direction perpendicular to the surface of the semiconductor substrate. A maximum width of the channel region in a direction parallel to the surface of the semiconductor substrate is greater than a maximum width of the stress adjustment element in the direction parallel to the surface of the semiconductor substrate in a cross-sectional view of the semiconductor device.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: February 19, 2019
    Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventor: Meng Zhao
  • Patent number: 10192933
    Abstract: The present disclosure discloses a manufacturing method of organic light emitting device, and the steps of the manufacturing method comprises: manufacturing a bottom electrode on a base substrate; manufacturing an organic electro-emitting assembly on the bottom electrode by evaporation techniques and lithography techniques; and manufacturing a top electrode on the organic electro-emitting assembly. An organic light emitting device manufactured by the aforementioned method is further disclosed in the present invention. Hole transport layers corresponded to every emitting layers is manufactured by lithography technologies in the present disclosure; therefore, no fine metal mask is needed in use to reduce production cost and time; furthermore, properties of the organic light emitting device is increased simultaneously.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: January 29, 2019
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Hsiang Lun Hsu, Meng Zhao
  • Patent number: 10186598
    Abstract: Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a base substrate; forming a dummy gate structure over the base substrate; forming source/drain regions having source/drain doping ions in the base substrate at both sides of the dummy gate structure; forming a dielectric layer on the source/drain regions and covering the side surfaces of the dummy gate structure; removing the dummy gate structure to form an opening in the dielectric layer; performing one or more of a first ion implantation process, for implanting first barrier ions in the base substrate toward the source region to form a first barrier layer under the opening, and a second ion implantation process, for implanting second barrier ions in the base substrate toward the source region to form a second barrier layer under the opening; and forming a gate structure in the opening.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: January 22, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Meng Zhao
  • Publication number: 20180339059
    Abstract: The present application provides an anti-OX40 human antibody. In particular, a human antibody specifically binding to OX40 is obtained with yeast display screening, and the affinity of the antibody is improved with affinity maturation. The present application also provides a use of the antibody for the prevention or treatment of tumors.
    Type: Application
    Filed: October 15, 2015
    Publication date: November 29, 2018
    Inventors: Ting XU, Yan LUAN, Xiaoxiao WANG, Jianjian PENG, Shull MA, Hui MA, Xiaolong PAN, Shilong FU, Shanshan NING, Yeqiong FEI, Meng ZHAO
  • Patent number: 10138301
    Abstract: The present invention is directed toward a monoclonal antibody to fibroblast growth factor receptor 2, a pharmaceutical composition comprising same, and methods of treatment comprising administering such a pharmaceutical composition to a patient.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: November 27, 2018
    Assignee: GALAXY BIOTECH, LLC
    Inventors: Kyung Jin Kim, Wei-meng Zhao, Hangil Park, Maximiliano Vasquez
  • Publication number: 20180337280
    Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor structure having a semiconductor substrate and a gate structure on the semiconductor substrate. The gate structure includes a gate dielectric layer on the semiconductor substrate, a gate on the gate dielectric layer, and a spacer layer on opposite sides of the gate. The method also includes etching the semiconductor substrate to form first and second recesses, etching a portion of the spacer layer to expose a surface portion of the semiconductor substrate, and forming a source filling the first recess and a drain filling the second recess. The source (drain) includes a first source (drain) portion in the first (second) recess and a second source (drain) portion on the first source (drain) portion. The second source portion or the second drain portion covers the exposed surface portion of the semiconductor substrate.
    Type: Application
    Filed: March 26, 2018
    Publication date: November 22, 2018
    Inventor: MENG ZHAO
  • Publication number: 20180337234
    Abstract: The present disclosure relates to the technical field of semiconductors, and discloses a semiconductor device and a manufacturing method therefor. The semiconductor device includes: a semiconductor substrate; a semiconductor fin on the semiconductor substrate; a gate structure on the semiconductor fin; a first recess and a second recess in the semiconductor fin and respectively at two sides of the gate structure; a diffusion barrier layer located at a bottom portion and a side wall of at least one recess of the first recess and the second recess; and an electrode on the diffusion barrier layer.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 22, 2018
    Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Meng Zhao
  • Patent number: 10098101
    Abstract: A method, a base station (BS), and a user terminal are provided for implementing uplink resource indication. The method includes carrying an uplink resource index in an uplink resource grant (UL Grant), in which an uplink resource index corresponds to at least one uplink resource in terms of indication; and sending the UL Grant. The BS includes an index carrying module and an instruction sending module. The user terminal includes an instruction receiving module, an instruction resolving module, and an execution module.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: October 9, 2018
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Meng Zhao, Yongxia Lv, Xiaobo Chen
  • Publication number: 20180282422
    Abstract: Disclosed are a fully human monoclonal antibody specifically binding to a CD137 or an antigen binding portion thereof. On one hand, provided are a CDR/variable region sequence of the antibody and an encoding nucleic acid sequence thereof; on the other hand, provided is a method for treating diseases using the antibody or the antigen binding portion thereof. a fully human monoclonal antibody specifically binding to a CD137 or an antigen binding portion thereof. On one hand, provided are a CDR/variable region sequence of the antibody and an encoding nucleic acid sequence thereof; on the other hand, provided is a method for treating diseases using the antibody or the antigen binding portion thereof.
    Type: Application
    Filed: September 22, 2015
    Publication date: October 4, 2018
    Inventors: Ting XU, Yan LUAN, Xiaoxiao WANG, Jianjian PENG, Shuli MA, Hui MA, Xiaolong PAN, Shilong FU, Shanshan NING, Yeqiong FEI, Meng ZHAO
  • Publication number: 20180226456
    Abstract: The present disclosure discloses a manufacturing method of organic light emitting device, and the steps of the manufacturing method comprises: manufacturing a bottom electrode on a base substrate; manufacturing an organic electro-emitting assembly on the bottom electrode by evaporation techniques and lithography techniques; and manufacturing a top electrode on the organic electro-emitting assembly. An organic light emitting device manufactured by the aforementioned method is further disclosed in the present invention. Hole transport layers corresponded to every emitting layers is manufactured by lithography technologies in the present disclosure; therefore, no fine metal mask is needed in use to reduce production cost and time; furthermore, properties of the organic light emitting device is increased simultaneously.
    Type: Application
    Filed: December 26, 2016
    Publication date: August 9, 2018
    Applicant: Wuhan China Star Optoelectronics Technology Co., Ltd.
    Inventors: Hsiang Lun HSU, Meng ZHAO