Abstract: A wireless power receiver circuit includes an active rectifier circuit with a plurality of power transistors, wherein the active rectifier circuit is configured to rectify an induced AC receiver current. The wireless power receiver circuit includes also includes a gate drive controller circuit configured to sense the induced AC receiver current and to provide gate drive signals for the plurality of power transistors synchronized with the induced AC receiver current. The gate drive controller circuit includes a current sense circuit configured to provide two voltage signals having a difference proportional to the induced AC receiver current.

Abstract: A drive circuit for a half bridge transistor circuit formed of enhancement mode GaN transistors. A shunt diode is connected to the bootstrap capacitor at a node between the bootstrap capacitor and ground, the shunt diode being decoupled from the midpoint node of the half bridge by a shunt resistor. The shunt diode advantageously provides a low voltage drop path to charge the bootstrap capacitor during the dead-time charging period when both the high side and low side transistors of the half bridge are off.

Abstract: A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.

Abstract: A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.

Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.

Abstract: A power converter in which two power FETs are provided in a full bridge arrangement with two diodes for supplying a rectified voltage to a load. The gates of the power FETs receive alternating and opposite voltage waveforms such that the power FETs conduct oppositely to each other. A turn-off FET is connected to the gate of each power FET to prevent spurious turn on of the power FET during periods in which the opposite power FET is turned on. A voltage sense FET is also connected to the gate of each power FET to limit the gate voltage of the power FET. The voltage sense FETs are each synchronously modulated with the corresponding power FET to limit the gate to source voltage of the voltage sense FET when the corresponding turn-off FET is on and the corresponding power FET is off.

Abstract: A large area wireless power system having a synchronization transmitter and a plurality of synchronization receivers for receiving a plurality of differential signals from the synchronization transmitter and outputting a plurality of second single-ended signals. The synchronization transmitter generates a first single-ended signal and converts the first single-ended signal into the plurality of differential signals to be transmitted to the synchronization receivers over a plurality of differential line pairs that also provide power to the synchronization receivers. The large area wireless power system also includes a plurality of high power amplifiers for receiving the plurality of second single-ended signals from the respective synchronization receivers and generating power, and a plurality of wireless power coils for receiving the power generated by the plurality of high power amplifiers and wirelessly providing power.

Abstract: A circuit for an RF switch using FET transistors that largely cancels the non-linearity of the Coss of the FETs over a majority of the signal range, and reduces distortion. The RF switch includes two substantially identical FETs. The source of one FET is connected to the drain of the other FET and the node formed comprises one terminal of the switch. Two substantially identical capacitors are connected in series with each other and in parallel with the FETs, and the node thus formed comprises the second terminal of the switch. The capacitors are selected such that they have negligible impedance at AC frequencies for which the switch is expected be used, and in particular a much lower impedance than Coss of each FET. A voltage source with a series impedance is also connected in parallel with the capacitors and the two FETs.

Abstract: A cascaded synchronous bootstrap supply circuit with reduced voltage drop between the cascaded bootstrap capacitors by replacing bootstrap diodes with gallium nitride (GaN) transistors. GaN transistors have a much lower forward voltage drop than diodes, thus providing a cascaded gate driver bootstrap supply circuit with a reduced drop in bootstrap capacitor voltage, which is particularly important as the number of levels increases.

Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.

Abstract: A scalable highly resonant wireless power coil structure that is suitable for use across a large surface area. The structure includes a plurality of single turn loops with adjacent loops that are decoupled from each other, yet form part of a single member.

Abstract: A circuit for an RF switch using FET transistors that largely cancels the non-linearity of the Coss of the FETs over a majority of the signal range, and reduces distortion. The RF switch includes two substantially identical FETs. The source of one FET is connected to the drain of the other FET and the node formed comprises one terminal of the switch. Two substantially identical capacitors are connected in series with each other and in parallel with the FETs, and the node thus formed comprises the second terminal of the switch. The capacitors are selected such that they have negligible impedance at AC frequencies for which the switch is expected be used, and in particular a much lower impedance than Coss of each FET. A voltage source with a series impedance is also connected in parallel with the capacitors and the two FETs.

Abstract: A drive circuit for a half bridge transistor circuit formed of enhancement mode GaN transistors. A shunt diode is connected to the bootstrap capacitor at a node between the bootstrap capacitor and ground, the shunt diode being decoupled from the midpoint node of the half bridge by a shunt resistor. The shunt diode advantageously provides a low voltage drop path to charge the bootstrap capacitor during the dead-time charging period when both the high side and low side transistors of the half bridge are off.

Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.

Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.

Abstract: A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.

Abstract: A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.

Abstract: A GaN transistor with polysilicon layers for creating additional components for an integrated circuit and a method for manufacturing the same. The GaN device includes an EPI structure and an insulating material disposed over EPI structure. Furthermore, one or more polysilicon layers are disposed in the insulating material with the polysilicon layers having one or more n-type regions and p-type regions. The device further includes metal interconnects disposed on the insulating material and vias disposed in the insulating material layer that connect source and drain metals to the n-type and p-type regions of the polysilicon layer.

Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.

Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.