Patents by Inventor Michael A Siegel

Michael A Siegel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070081456
    Abstract: A method and system for transmitting packets in a packet switching network. Packets received by a packet processor may be prioritized based on the urgency to process them. Packets that are urgent to be processed may be referred to as real-time packets. Packets that are not urgent to be processed may be referred to as non-real-time packets. Real-time packets have a higher priority to be processed than non-real-time packets. A real-time packet may either be discarded or transmitted into a real-time queue based upon its value priority, the minimum and maximum rates for that value priority and the current real-time queue congestion conditions. A non-real-time packet may either be discarded or transmitted into a non-real-time queue based upon its value priority, the minimum and maximum rates for that value priority and the current real-time and non-real-time queue congestion conditions.
    Type: Application
    Filed: December 8, 2006
    Publication date: April 12, 2007
    Inventors: Brahmanand Gorti, Marco Heddes, Clark Jeffries, Andreas Kind, Michael Siegel
  • Patent number: 7202110
    Abstract: A flat filter layer is received between upper and lower mold portions of a mold for packaging an integrated circuit sensor device, held by the mold over and in contact with the integrated circuit's sensing surface, in light compression between the sensing surface and a mold surface. The filter layer includes slots allowing passage of injected encapsulating material to cover the integrated circuit die, with overlap portions embedded in the encapsulating material, while preventing such encapsulating material from flowing onto the sensing surface. The filter layer may be, for example, a liquid and/or light filter, and may include a protective or supportive backing. The filter is thus affixed to the packaged integrated circuit sensor device, while mold residue is reduced and mold life extended.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: April 10, 2007
    Assignee: STMicroelectronics, Inc.
    Inventors: Anthony M. Chiu, Harry Michael Siegel
  • Publication number: 20070076602
    Abstract: The decision within a packet processing device to transmit a newly arriving packet into a queue to await processing or to discard the same packet is made by a flow control method and system. The flow control is updated with a constant period determined by storage and flow rate limits. The update includes comparing current queue occupancy to thresholds and also comparing present queue occupancy to previous queue occupancy. The outcome of the update is a new transmit probability value. The value is stored for the subsequent period of flow control and packets arriving during that period are subject to a transmit or discard decision that uses that value.
    Type: Application
    Filed: November 15, 2006
    Publication date: April 5, 2007
    Inventors: Clark Jeffries, Jitesh Nair, Michael Siegel, Rama Yedavalli
  • Publication number: 20070033303
    Abstract: A method and system for messaging between processors and co-processors connected through a bus. The method permits a multi-thread system processor to request the services of a processor or co-processor located on the bus. Message control blocks are stored in a memory which identify the physical address of the target processor, as well as a memory location in the memory dedicated to the thread requesting the service. When the system processor requests service of a processor or co-processor, a DCR command is created pointing to the message control block. A message is built from information contained in the message control block or transferred to the processor or co-processor. The return address for the processor or co-processor message is concatenated with the thread number, so that the processor or co-processor can create a return message specifically identifying memory space dedicated to the requesting thread for storage of the response message.
    Type: Application
    Filed: August 5, 2005
    Publication date: February 8, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeffrey Bridges, Gordon Davis, Thomas Sartorius, Michael Siegel
  • Publication number: 20070002888
    Abstract: A Resource Reservation System includes a Token Generation Unit (TGU) which generates and circulates among nodes of a communications system a Slotted Token (SLT) message having sub-fields to carry identification number for each input port in a node and the resource available for each input port. On receiving the message the Resource Control Unit (RCU) in each node can write port identification number, available resource in appropriate sub-fields of the SLT message, and reserve resources in other nodes by adjusting information in the sub-field associated with the other nodes.
    Type: Application
    Filed: August 16, 2006
    Publication date: January 4, 2007
    Applicant: International Business Machines Corporation
    Inventors: Mohammad Peyravian, Mark Rinaldi, Ravinder Sabhikhi, Michael Siegel
  • Publication number: 20060265363
    Abstract: A method and system for identifying a data structure associated with a packet of data. A processor internal to a packet processor may extract one or more fields in a packet header field of a received packet of data to generate a search key. The internal processor may then be configured to select which table, e.g., routing table, quality of service table, filter table, needs to be accessed using the search key in order to process the received packet of data. A determination may then be made by the internal processor as to whether a CAM or a hash table and a Patricia Tree are used to identify the data structure associated with the received packet of data. Based on table definitions in a register, the internal processor may make such a determination.
    Type: Application
    Filed: July 17, 2006
    Publication date: November 23, 2006
    Inventors: Jean Calvignac, Gordon Davis, Marco Heddes, Michael Siegel
  • Patent number: 7109574
    Abstract: An integrated circuit (IC) device comprising: 1) an integrated circuit (IC) die having a first surface, a second surface opposite the first surface, and sidewalls extending between the first surface and the second surface; 2) an integrated circuit (IC) package for supporting the IC die, wherein the IC package is attached to at least one of the sidewalls of the IC die such that at least a portion of the IC die first surface and at least a portion of the IC die second surface are exposed; and 3) at least one auxiliary component attached to at least one of the exposed portion of the IC die first surface and the exposed portion of the IC die second surface.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: September 19, 2006
    Assignee: STMicroelectronics, Inc.
    Inventors: Anthony M. Chiu, Harry Michael Siegel
  • Patent number: 7096581
    Abstract: An integrated circuit includes a portion having at least one active circuit area. The integrated circuit also includes a redistribution metal layer fabricated at least partially during fabrication of the portion of the integrated circuit. A method for fabricating an integrated circuit includes fabricating a portion of the integrated circuit, where the portion includes at least one active circuit area. The method also includes fabricating a redistribution metal layer at least partially during fabrication of the portion of the integrated circuit.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: August 29, 2006
    Assignee: STMicroelectronics, Inc.
    Inventors: Danielle A. Thomas, Harry Michael Siegel, Antonio A. Do Bento Vieira, Anthony M. Chiu
  • Patent number: 7098065
    Abstract: An integrated lid for microelectromechanical system (MEMS) devices is formed from a nitride layer deposited over a cavity containing movable parts for the device. Pillars are formed through openings within large area movable parts to support the lid over those parts. Slides are formed and moved under large etchant openings through the lid to allow the openings to be sealed by sputtering.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: August 29, 2006
    Assignee: STMicroelectronics, Inc.
    Inventors: Anthony M. Chiu, Harry Michael Siegel
  • Publication number: 20050243850
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Application
    Filed: June 14, 2005
    Publication date: November 3, 2005
    Applicant: International Business Machines Corporation
    Inventors: Brian Bass, Jean Calvignac, Anthony Gallo, Marco Heddes, Sridhar Rao, Michael Siegel, Brian Youngman, Fabrice Verplanken
  • Publication number: 20050232204
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Application
    Filed: June 14, 2005
    Publication date: October 20, 2005
    Applicant: International Business Machines Corporation
    Inventors: Brian Bass, Jean Calvignac, Anthony Gallo, Marco Heddes, Sridhar Rao, Michael Siegel, Brian Youngman, Fabrice Verplanken
  • Publication number: 20050232270
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Application
    Filed: June 14, 2005
    Publication date: October 20, 2005
    Applicant: International Business Machines Corporation
    Inventors: Brian Bass, Jean Calvignac, Anthony Gallo, Marco Heddes, Sridhar Rao, Michael Siegel, Brian Youngman, Fabrice Verplanken
  • Publication number: 20050232205
    Abstract: A network switch apparatus, components for such an apparatus, and methods of operating such an apparatus in which data flow handling and flexibility is enhanced by the cooperation of a control point and a plurality of interface processors formed on a semiconductor substrate. The control point and interface processors together form a network processor capable of cooperating with other elements including an optional switching fabric device in executing instructions directing the flow of data in a network.
    Type: Application
    Filed: June 14, 2005
    Publication date: October 20, 2005
    Applicant: International Business Machines Corporation
    Inventors: Brian Bass, Jean Calvignac, Anthony Gallo, Marco Heddes, Sridhar Rao, Michael Siegel, Brian Youngman, Fabrice Verplanken
  • Patent number: 6951125
    Abstract: A system and method is disclosed for aligning an integrated circuit die on an integrated circuit substrate. A plurality of deposits of deformable material are placed on the substrate where the integrated circuit die is to be aligned. In one advantageous embodiment a stamping tool is indexed to a first tooling hole and to a second tooling hole in the substrate. The stamping tool imprints the deposits of deformable material to a tolerance of less than one hundred microns with respect to the first and second tooling holes. The imprinted portions of the deposits a form a pocket for receiving the integrated circuit die. This enables the integrated circuit die to be precisely aligned on the substrate in three dimensions.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: October 4, 2005
    Assignee: STMicroelectronics, Inc.
    Inventors: Harry Michael Siegel, Anthony M. Chiu
  • Publication number: 20050177552
    Abstract: Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBs) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n->n mapping of the bits of the key to the bits of the hash key.
    Type: Application
    Filed: August 28, 2003
    Publication date: August 11, 2005
    Inventors: Brian Bass, Jean Calvignac, Marco Heddes, Antonios Maragkos, Piyush Patel, Michael Siegel, Fabrice Verplanken
  • Publication number: 20050144553
    Abstract: Novel data structures, methods and apparatus for finding the longest prefix match search when searching tables with variable length patterns or prefixes. To find the exact match or the best matching prefix, patterns have to be compared a bit at a time until the exact or first: match is found. This requires ā€œnā€ number of comparisons or memory accesses to identify the closest matching pattern. The trees are built in such a way that the matching result is guaranteed to be a best match, whether it is an exact match or a longest prefix match. Using the trail of all the birds and associated prefix lengths enables determination of the correct prefix result from the trail. By construction, the search tree provides the best matching prefix at or after the first compare during walking of the trail or tree.
    Type: Application
    Filed: January 28, 2005
    Publication date: June 30, 2005
    Applicant: International Business Machines Corporation
    Inventors: Brian Bass, Jean Calvignac, Marco Heddes, Antonios Maragkos, Piyush Patel, Michael Siegel, Fabrice Verplanken
  • Patent number: 6900508
    Abstract: A flat filter layer is received between upper and lower mold portions of a mold for packaging an integrated circuit sensor device, held by the mold over and in contact with the integrated circuit's sensing surface, in light compression between the sensing surface and a mold surface. The filter layer includes slots allowing passage of injected encapsulating material to cover the integrated circuit die, with overlap portions embedded in the encapsulating material, while preventing such encapsulating material from flowing onto the sensing surface. The filter layer may be, for example, a liquid and/or light filter, and may include a protective or supportive backing. The filter is thus affixed to the packaged integrated circuit sensor device, while mold residue is reduced and mold life extended.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: May 31, 2005
    Assignee: STMicroelectronics, Inc.
    Inventors: Anthony M. Chiu, Harry Michael Siegel
  • Publication number: 20050076010
    Abstract: Novel data structures, methods and apparatus for finding a full match between a search pattern and a pattern stored in a leaf of the search tree. A key is input, a hash function is performed on the key, a direct table (DT) is accessed, and a tree is walked through pattern search control blocks (PSCBS) until reaching a leaf. The search mechanism uses a set of data structures that can be located in a few registers and regular memory, and then used to build a Patricia tree structure that can be manipulated by a relatively simple hardware macro. Both keys and corresponding information needed for retrieval are stored in the Patricia tree structure. The hash function provides an n->n mapping of the bits of the key to the bits of the hash key. The data structure that is used to store the hash key and the related information in the tree is called a leaf. Each leaf corresponds to a single key that matches exactly with the input key. The leaf contains the key as well as additional information.
    Type: Application
    Filed: August 28, 2003
    Publication date: April 7, 2005
    Inventors: Brian Bass, Jean Calvignac, Marco Heddes, Antonios Maragkos, Piyush Patel, Michael Siegel, Fabrice Verplanken
  • Publication number: 20050063415
    Abstract: A method, apparatus and computer program product are provided for implementing a pointer and stake model for frame alteration code in a network processor. A current pointer and a stake are provided for a packet selected for transmit. The current pointer is maintained for tracking a current position for frame alteration operations in the packet. The stake is maintained for tracking a start of a current header for frame alteration operations in the packet. The current pointer is used by frame alteration code instructions to specify a sequence of operations relative to the current pointer. The specified frame alteration sequence is compact in terms of code size to operate on data within a small window of bytes. Advance pointer instructions allow the current and stake pointers to be advanced an arbitrary number of bytes into the packet.
    Type: Application
    Filed: September 18, 2003
    Publication date: March 24, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kerry Imming, John Irish, Joseph Logan, Tolga Ozguner, Michael Siegel
  • Publication number: 20050008021
    Abstract: A system that indicates which frame should next be removed by a scheduler from flow queues within a network device, such as a router, network processor, and like devices is disclosed. The system includes a search engine that searches a set of calendars under the control of a Finite State Machine (FSM), a current pointer, and input signals from an array and a clock line providing current time. Also included is a decision block that determines which of the searches are critical and which, during peak calendar search periods, can be postponed with minimal impact to the system. The postponed searches are then conducted at a time when there is available calendar search capacity.
    Type: Application
    Filed: July 10, 2003
    Publication date: January 13, 2005
    Applicant: International Business Machines Corporation
    Inventors: Bryan Bullis, Darryl Rumph, Michael Siegel