Patents by Inventor Michael A. VanBuskirk
Michael A. VanBuskirk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9343666Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.Type: GrantFiled: June 21, 2012Date of Patent: May 17, 2016Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael Vanbuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffery A. Shields
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Patent number: 9318373Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).Type: GrantFiled: April 19, 2013Date of Patent: April 19, 2016Assignee: CYPRESS SEMICONDUCTOR CORPORATIONInventors: David M Rogers, Mimi X Qian, Kwadwo A Appiah, Mark Randolph, Michael A VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi He, Wei Zheng
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Publication number: 20130237022Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).Type: ApplicationFiled: April 19, 2013Publication date: September 12, 2013Applicant: SPANSION LLCInventors: David M Rogers, Mimi X Qian, Kwadwo A Appiah, Mark Randolph, Michael A VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi HE, Wei Zheng
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Patent number: 8514631Abstract: Determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: GrantFiled: June 7, 2011Date of Patent: August 20, 2013Assignee: Spansion LLCInventors: Bruce Lee Morton, Michael VanBuskirk
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Patent number: 8445966Abstract: A semiconductor device (400) for improved charge dissipation protection includes a substrate (426), a layer of semiconductive or conductive material (406), one or more thin film devices (408) and a charge passage device (414). The thin film devices (408) are connected to the semiconductive or conductive layer (406) and the charge passage device (414) is coupled to the thin film devices (408) and to the substrate (426) and provides a connection from the thin film devices (408) to the substrate (426) to dissipate charge from the semiconductive/conductive layer (406) to the substrate (426).Type: GrantFiled: December 20, 2006Date of Patent: May 21, 2013Assignee: Spansion LLCInventors: David M. Rogers, Mimi X. Qian, Kwadwo A. Appiah, Mark Randolph, Michael A. VanBuskirk, Tazrien Kamal, Hiroyuki Kinoshita, Yi He, Wei Zheng
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Publication number: 20120276706Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer;, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body Filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.Type: ApplicationFiled: June 21, 2012Publication date: November 1, 2012Inventors: Suzette K. PANGRLE, Steven AVANZINO, Sameer HADDAD, Michael VANBUSKIRK, Manuj RATHOR, James XIE, Kevin SONG, Christie MARRIAN, Bryan CHOO, Fei WANG, Jeffery A. SHIELDS
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Patent number: 8232175Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.Type: GrantFiled: September 14, 2006Date of Patent: July 31, 2012Assignee: Spansion LLCInventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffrey A. Shields
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Publication number: 20120092924Abstract: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.Type: ApplicationFiled: December 13, 2011Publication date: April 19, 2012Inventors: Michael A. VanBuskirk, Colin S. Bill, Zhida Lan, Tzu-Ning Fang
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Patent number: 8098521Abstract: A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrode. The memory device is programmed by providing a charged species from the passive layer into the active layer. The memory device may be programmed to have for the programmed memory device a first erase activation energy. The present method provides for the programmed memory device a second erase activation energy greater than the first erase activation energy.Type: GrantFiled: March 31, 2005Date of Patent: January 17, 2012Assignee: Spansion LLCInventors: Michael A. VanBuskirk, Colin S. Bill, Zhida Lan, Tzu-Ning Fang
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Patent number: 8089113Abstract: The present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening in the dielectric layer, providing a switching body in the opening, and providing a second conductive body in the opening.Type: GrantFiled: December 5, 2006Date of Patent: January 3, 2012Assignee: Spansion LLCInventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael VanBuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffrey A. Shields
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Publication number: 20110235430Abstract: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: ApplicationFiled: June 7, 2011Publication date: September 29, 2011Applicant: SPANSION LLC.Inventors: Bruce Lee Morton, Michael VanBuskirk
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Patent number: 8003436Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.Type: GrantFiled: December 3, 2008Date of Patent: August 23, 2011Assignee: Spansion LLCInventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
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Patent number: 7983089Abstract: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: GrantFiled: June 6, 2008Date of Patent: July 19, 2011Assignee: Spansion LLCInventors: Bruce Lee Morton, Michael VanBuskirk
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Patent number: 7894243Abstract: In a first method of writing data to a resistive memory device (i.e. programming or erasing), successive electrical potentials are applied across the resistive memory device, wherein the successive electrical potentials are of increasing duration. In another method of writing data to a resistive memory device (i.e. programming or erasing), an electrical potential is applied across the resistive memory device, and the level of current through the memory device is sensed as the electrical potential is applied. The application of the electrical potential is ended based on a selected level of current through the resistive memory device.Type: GrantFiled: December 5, 2006Date of Patent: February 22, 2011Assignee: Spansion LLCInventors: Michael VanBuskirk, Wei Daisy Cai, Colin S. Bill, Yi-Ching Jean Wu
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Patent number: 7838342Abstract: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: GrantFiled: June 6, 2008Date of Patent: November 23, 2010Assignee: Spansion LLCInventors: Bruce Lee Morton, Michael VanBuskirk
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Patent number: 7830716Abstract: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: GrantFiled: June 6, 2008Date of Patent: November 9, 2010Assignee: Spansion LLCInventors: Bruce Lee Morton, Michael VanBuskirk
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Patent number: 7791947Abstract: The present disclosure adjusts the voltage threshold values of select gates of NAND strings. The select gates of the NAND string can be read, erased, and programmed.Type: GrantFiled: January 10, 2008Date of Patent: September 7, 2010Assignee: Spansion LLCInventors: Michael A. VanBuskirk, Colin S. Bill, Takao Akaogi
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Patent number: 7781806Abstract: A method for providing an optical erase memory structure including: forming a metal-insulator-metal memory cell; positioning a light emitting diode adjacent to the metal-insulator-metal memory cell; and emitting a light emission from the light emitting diode for erasing the metal-insulator-metal memory cell.Type: GrantFiled: April 18, 2008Date of Patent: August 24, 2010Assignee: Spansion LLCInventors: Michael VanBuskirk, Mark McClain
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Publication number: 20090303793Abstract: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: ApplicationFiled: June 6, 2008Publication date: December 10, 2009Applicant: Spansion LLCInventors: Bruce Lee Morton, Michael VanBuskirk
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Publication number: 20090303795Abstract: During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.Type: ApplicationFiled: June 6, 2008Publication date: December 10, 2009Applicant: Spansion LLCInventors: Bruce Lee Morton, Michael VanBuskirk