Abstract: Sulfur-fused perylene diimides (PDIs) having the formula 2PDI-nS, wherein n is an integer. Such sulfur-fused PDIs (e.g., 2PDI-2S, 2PDI-3S, and 2PDI-4S) are incorporated as electron acceptors in an active region of a bulk heterojunction solar cell and/or as an electron transport layer. Example solar cells exhibit a power conversion efficiency above 5% and a fill factor above 70% (a record high for non-fullerene bulk heterojunction solar cell devices) when 2PDI-nS is used as the electron acceptor. In addition, the solar cells exhibit low open circuit voltage (Voc) loss.

Abstract: Sulfur-fused perylene diimides (PDIs) having the formula 2PDI-nS, wherein n is an integer. Such sulfur-fused PDIs (e.g., 2PDI-2S, 2PDI-3S, and 2PDI-4S) are incorporated as electron acceptors in an active region of a bulk heterojunction solar cell and/or as an electron transport layer. Example solar cells exhibit a power conversion efficiency above 5% and a fill factor above 70% (a record high for non-fullerene bulk heterojunction solar cell devices) when 2PDI-nS is used as the electron acceptor. In addition, the solar cells exhibit low open circuit voltage (Voc) loss.

Abstract: This disclosure provides systems, methods, and apparatus related to thermoelectric materials. In one aspect, a method includes providing a plurality of nanostructures. The plurality of nanostructures comprise a thermoelectric material, with each nanostructure of the plurality of nanostructures having first ligands disposed on a surface of the nanostructure. The plurality of nanostructures is mixed with a solution containing second ligands and a ligand exchange process occurs in which the first ligands disposed on the plurality of nanostructures are replaced with the second ligands. The plurality of nanostructures is deposited on a substrate to form a layer. The layer is thermally annealed.

Abstract: This disclosure provides systems, methods, and apparatus related to thermoelectric materials. In one aspect, a method includes providing a plurality of nanostructures. The plurality of nanostructures comprise a thermoelectric material, with each nanostructure of the plurality of nanostructures having first ligands disposed on a surface of the nanostructure. The plurality of nanostructures is mixed with a solution containing second ligands and a ligand exchange process occurs in which the first ligands disposed on the plurality of nanostructures are replaced with the second ligands. The plurality of nanostructures is deposited on a substrate to form a layer. The layer is thermally annealed.

Abstract: An optoelectronic device comprising an active layer sandwiched between a first electrode and a second electrode. The active layer comprises a material of the formula AaBbMmXx, wherein A represents a monovalent inorganic cation, a monovalent organic cation, or mixture of different monovalent organic or inorganic cations; B represents a divalent inorganic cation, a divalent organic cation, or mixture of different divalent organic or inorganic cations; M represents Bi3+ or Sb3+; X represents a monovalent halide anion, or mixture of different monovalent halide anions; and a, b represent 0 or any positive numbers, m, x represent any positive numbers, and a+2b+3m=x.

Abstract: A method of fabricating an organic device is provided comprising providing a first solution comprising an organic semiconductor or a precursor thereof; a solvent and a decomposable polymer additive, where the polymer additive is heated so that it decomposes into gas. The method is applicable to large scale fabrication of OLEDs, OPVs and OFET devices.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: A method of fabricating an organic device is provided comprising providing a first solution comprising an organic semiconductor or a precursor thereof; a solvent and a decomposable polymer additive, where the polymer additive is heated so that it decomposes into gas. The method is applicable to large scale fabrication of OLEDs, OPVs and OFET devices.

Abstract: A detection system includes a detection device and an anti-evaporation device. The detection device comprises a region configured to merge at least two small drops and to detect a potential transient signal generated by the merger of the drops. The an anti-evaporation is configured to enclose the region and limit evaporation from the region. A method for detecting a signal includes the following steps: depositing drops of potentially reactive chemical solutions on a detection device within a drop-merging region; placing an anti-evaporation device over the drop-merging region to form a seal around the drop-merging region; merging the drops of potentially reactive chemical solutions; and measuring a signal occurring within the merged solution drops.

Abstract: A process for fabricating fine features such as small gate electrodes on a transistor. The process involves the jet-printing of a mask and the plating of a metal to fabricate sub-pixel and standard pixel size features in one layer. Printing creates a small sub-pixel size gap mask for plating a fine feature. A second printed mask may be used to protect the newly formed gate and etch standard pixel size lines connecting the small gates.

Abstract: A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.

Abstract: The roughness and structural height of printed metal lines is used to pin a fluid. This fluid deposits a top contact material which is connected to the bottom printed contacts through pinholes in the hydrophobic polymer layer. This results in a sandwich-like contact structure achieved in a self-aligned deposition process and having improved source-drain contact for all-additive printed circuits. In one form, the present technique is used for thin film transistor applications, but it may be applied to electrodes in general.

Abstract: A method to pattern films into dimensions smaller than the printed pixel mask size. A printed mask is deposited on a thin film on a substrate. The second mask layer is selectively deposited onto the film, but not to the printed mask. A third mask is then printed onto the substrate to pattern a portion of the second mask. Certain solvents are then used to remove the printed mask but not the mask layer on the thin film. The mask layer is then used to form a pattern on the thin film in combination with etching. The features formed in the thin film are smaller than the smallest dimension of the printed mask. The coated mask layer can be a self-assembled mono-layer or other material that selectively binds to the thin film.

Abstract: A print patterned mask is formed a digital lithographic process on the surface of a photoresist or similar material layer. The print patterned mask is then used as a development or etching mask, and the underlying layer overdeveloped or overetched to undercut the print patterned mask. The mask may be removed and the underlying structure used an etch mask or as a final structure. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.

Abstract: A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.

Abstract: Susceptibility of darkfield etch masks (majority of the mask area is opaque) to pinhole defects, transferred pattern, non-uniformity, etc. due to ejector dropout or drop misdirection, and long duty cycles due to large-area coverage, when using digital lithography (or print patterning) is addressed by using a clear-field print pattern that is then coated with etch resist material. The printed clear field pattern is selectively removed to form an inverse pattern (darkfield) within the coated resist layer. Etching then removes selected portions of an underlying (e.g., encapsulation, conductive, etc.) layer. Removal of the mask produces a layer with large-area features with substantially reduced defects.

Abstract: A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.

Abstract: A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.