Patents by Inventor Michael Chabinyc

Michael Chabinyc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050258428
    Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.
    Type: Application
    Filed: July 25, 2005
    Publication date: November 24, 2005
    Inventors: William Wong, Jeng Lu, Alberto Salleo, Michael Chabinyc, Raj Apte, Robert Street
  • Publication number: 20050208695
    Abstract: An electronic device and a method of fabricating the electronic device includes forming a first electrical contact, a dielectric layer and a second electrical contact wherein the dielectric layer is located between the first and the second electrical contacts, forming an electrically insulating layer over the dielectric layer and the first electrical contact, exposing the first and second electrical contact, the dielectric layer and a first portion of the electrically insulating layer to radiation from the side of the first electrical contact, removing a second portion of the electrically insulating layer that was not irradiated by the radiation, providing a semiconductor material over a portion of the dielectric layer, and forming at least a third electrical contact over at least a portion of the electrically insulting layer and the semiconductor material.
    Type: Application
    Filed: March 4, 2005
    Publication date: September 22, 2005
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Michael Chabinyc, Alberto Salleo, William Wong
  • Publication number: 20050133788
    Abstract: An electronic device and a method of fabricating the electronic device includes forming a first electrical contact, a dielectric layer and a second electrical contact wherein the dielectric layer is located between the first and the second electrical contacts, forming an electrically insulating layer over the dielectric layer and the first electrical contact, exposing the first and second electrical contact, the dielectric layer and a first portion of the electrically insulating layer to radiation from the side of the first electrical contact, removing a second portion of the electrically insulating layer that was not irradiated by the radiation, providing a semiconductor material over a portion of the dielectric layer, and forming at least a third electrical contact over at least a portion of the electrically insulating layer and the semiconductor material.
    Type: Application
    Filed: December 19, 2003
    Publication date: June 23, 2005
    Applicant: PALO ALTO RESEARCH CENTER, INCORPORATED
    Inventors: Michael Chabinyc, Alberto Salleo, William Wong
  • Publication number: 20050127357
    Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.
    Type: Application
    Filed: December 12, 2003
    Publication date: June 16, 2005
    Inventors: William Wong, Jeng Lu, Alberto Salleo, Michael Chabinyc, Raj Apte, Robert Street
  • Publication number: 20040251136
    Abstract: Various gel electrophoretic assemblies and techniques are disclosed for providing unique isoelectric focusing (IEF) strategies. Several particular systems, assemblies and methods are provided that significantly reduce processing time, enable the use of reduced operating voltages, and produce analytical results with improved resolution.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Meng H. Lean, Huangpin Ben Hsieh, John S. Fitch, Armin R. Volkel, Bryan Preas, Scott Elrod, Richard H. Bruce, Eric Peeters, Frank Torres, Michael Chabinyc
  • Publication number: 20040251139
    Abstract: An electrophoretic cell configuration and related method are disclosed that employ oppositely directed traveling electrical waves. The waves travel across the cell and samples undergoing separation. Various strategies are used to selectively direct the movement and arrangement of the samples and resulting sample patterns.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Meng H. Lean, Huangpin Ben Hsieh, John S. Fitch, Armin R. Volkel, Bryan Preas, Scott Elrod, Richard H. Bruce, Eric Peeters, Frank Torres, Michael Chabinyc
  • Publication number: 20040251135
    Abstract: Various traveling wave grids and electrophoretic systems, and electrode assemblies using such grids, are disclosed. A configuration in which a voltage potential is used to load a biomolecule sample against a grid is disclosed. A unique strategy of using multiple, reconfigurable grids in such systems is also described. The strategy involves initially conducting a broad protein separation and then selectively tailoring one or more grids, and conducting one or more secondary processing operations. Related strategies and specific methods are additionally disclosed for separating samples of biomolecules and components thereof using the noted systems, assemblies, and grids.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Meng H. Lean, Huangpin Ben Hsieh, John S. Fitch, Armin R. Volkel, Bryan Preas, Scott Elrod, Richard H. Bruce, Eric Peeters, Frank Torres, Michael Chabinyc