Patents by Inventor Michael Check

Michael Check has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260150436
    Abstract: Light-emitting diode (LED) components, and more particularly, LED components that have substrates with recessed cavities are disclosed for LED matrix applications. LED matrix applications involve an array of LEDs closely spaced together, resulting in conventional applications, an undesired level of crosstalk where light from one LED chip excites the phosphors and/or epitaxial layers on a neighboring LED chip. The present disclosure describes LED components with recessed cavities on a substrate, where the LED chips can be placed in the cavities, enabling the sidewalls of the cavities to prevent cross-talk between the LED chips in the LED matrix. The recessed cavities in the substrate can be used for flip-chip mounted chips or LED chips with vertical geometry. Additionally, an LED matrix can have recesses with varying depths to enable customized emission patterns.
    Type: Application
    Filed: November 26, 2024
    Publication date: May 28, 2026
    Inventors: David Suich, Michael Check, Joseph G. Sokol, Colin Blakely
  • Publication number: 20260150449
    Abstract: Light-emitting devices, and more particularly, LED chips that have pillars or pillar-like structures for plugged substrates are disclosed. Pillars can be formed of metal that plug into hollow vias of a substrate, enabling the LED chip to have electrical contact with a submount on which the substrate is mounted. The pillars can facilitate easier mounting of the LED chips to the submount in a surface mount device (SMD) context. The pillars can also serve as alignment pins to improve the die attach process. The substrate can include back-side metal contacts to facilitate the electrical contact between the pillars and the submount. In other embodiments, the hollow vias can extend all the way through the substrate allowing the pillars to make direct electrical contact with the submount.
    Type: Application
    Filed: November 25, 2024
    Publication date: May 28, 2026
    Inventors: David Suich, Michael Check, Joseph G. Sokol, Robert Wilcox, Andre Pertuit, Colin Blakely
  • Publication number: 20260136727
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly microparticle arrangements in LED packages are disclosed. Microparticles and corresponding microparticle layers are structured to internally recirculate light received from an LED chip and/or a recipient lumiphoric material layer to promote increased color mixing and color over angle uniformity. Microparticles are structured with particle sizes that exceed wavelengths of light provided by LED chips and/or lumiphoric materials to elicit internal recirculating of light. Arrangements and/or particle sizes of microparticles are disclosed that tailor light recycling and color mixing to various applications with targeted emission patterns. Related methods include forming microparticles and corresponding microparticle layers before encapsulants of LED packages.
    Type: Application
    Filed: November 11, 2024
    Publication date: May 14, 2026
    Inventors: David Suich, Michael Check, Andre Pertuit, Joseph G. Sokol, Robert Wilcox, Colin Blakely
  • Patent number: 12622108
    Abstract: Solid-state lighting devices including light-emitting diode (LED) chips and more particularly interconnect structures for improved LED chip performance are disclosed. Interconnect structures are disclosed within LED chips that are structured to increase perimeter contact areas within localized LED chip areas without substantial increases to overall areas occupied by the interconnect structures. By increasing contact perimeters of interconnects within a certain area, increased current injection efficiency may be provided. Interconnect structures for increased current injection are disclosed for both n-type layers and p-type layers. Interconnect structures may include patterned dielectric materials within interconnect openings and corresponding interconnects that are formed around the patterned dielectric materials. Additional interconnect structures include nested patterns and extensions that provide enhanced adhesion along LED chip perimeters.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: May 5, 2026
    Assignee: CreeLED, Inc.
    Inventors: Michael Check, Justin White, Steven Wuester, Kevin Haberern, Colin Blakely, Jesse Reiherzer
  • Publication number: 20260123116
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly identification markers for LED packages and related methods are disclosed. Identification markers may include materials incorporated within LED packages that are transparent in a visible spectrum but detectable when illuminated with light outside the visible spectrum. When radiated with light outside the visible spectrum, identification markers may provide light in the visible spectrum. Alternatively, identification markers may provide light outside the visible spectrum that is detectable with equipment capable of detecting nonvisible light. Identification markers are generally configured to not be readily visible under inspection as a way to make LED packages more difficult for copying in counterfeit products.
    Type: Application
    Filed: October 31, 2024
    Publication date: April 30, 2026
    Inventors: David Suich, Colin Blakely, Michael Check, Joseph G. Sokol, Andre Pertuit
  • Publication number: 20260123121
    Abstract: Solid-state lighting devices and more particularly infrared light-emitting diodes (LEDs) with filter structures are disclosed. Filter structures include long-pass filters configured to pass wavelength-converted light while reflecting light from underlying LED chips. Filter structures further include various dual band-pass filters and multiple band-pass filters in combination with long-pass filters that provide targeted emissions in specific infrared wavelength bands. Filter structures may be provided as part of cover structures over LED chips as various multiple-layer dielectric layer sequences. Infrared light-absorbing particles may be provided in combination with filter structures to provide further targeted emissions.
    Type: Application
    Filed: October 28, 2024
    Publication date: April 30, 2026
    Inventors: David Suich, Austin Spencer, Michael Check, Joseph G. Sokol, Colin Blakely
  • Publication number: 20260101614
    Abstract: Light-emitting diode (LED) devices and more particularly coefficient of thermal expansion (CTE) structures in submounts of LEDs are disclosed. Thermal expansion structures include arrangements of vias within submounts that provide variable CTE values across submount surfaces and/or within thicknesses of submounts. Vias may comprise air-filled vias and/or vias filled with various materials that provide variable CTE values. Vias may further be formed with variable thicknesses within submounts to further tailor CTE values. Submounts may include flexible submounts adept for mounting to irregular surfaces with vias structure to provide CTE compensation. Further aspects are described in the context of chip-scale packaging.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 9, 2026
    Inventors: Michael Check, Colin Blakely
  • Publication number: 20260101609
    Abstract: Light-emitting diode (LED) devices and more particularly LED chips with optically pumped quantum well structures are disclosed. LED chips include electrically pumped quantum well structures positioned proximate p-n junctions, and optically pumped quantum well structures positioned to receive photons of light generated by the electrically pumped quantum well structures and re-emit light having longer peak wavelengths. Aggregate emissions may include broader emission spectrums. Moreover, aggregate emissions may predominately be provided by light from the electrically pumped quantum well structures while light from the optically pumped quantum well structures may provide wavelengths that appear brighter to the human eye to increase luminous flux.
    Type: Application
    Filed: October 8, 2024
    Publication date: April 9, 2026
    Inventors: Joseph G. Sokol, Michael Check, David Suich, Colin Blakely, Robert Wilcox, Andre Pertuit
  • Publication number: 20260096256
    Abstract: Light-emitting diode (LED) devices and more particularly lens structures in multiple-chip LED packages are disclosed. Lens structures include separate lenses positioned to reduce optical decoupling from corresponding LED chips. Individual lenses for each individual LED chip provide flexibility in tailoring each lens to provide a portion of aggregate emissions with a targeted profile. Multiple lenses may be integrally formed from a common encapsulant material. Other lens structures include separate lenses provided on or through encapsulant materials. Combinations of different LED chip structures and different lens structures within a common LED package are disclosed.
    Type: Application
    Filed: September 30, 2024
    Publication date: April 2, 2026
    Inventors: Andre Pertuit, Michael Check, Colin Blakely, David Suich, Joseph G. Sokol, Robert Wilcox, F James Claire
  • Publication number: 20260096255
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with metallic dimming layers and related methods are disclosed. Metallic dimming layers are formed over top surfaces and mesa sidewalls in LED chips to absorb and/or reflect light generated by the LED chips. Resulting LED chips have light outputs that may be reduced in a controlled manner to target various lighting applications where specific brightness levels are targeted. Metallic dimming layers are disclosed that extend past mesa sidewalls without extending all the way to perimeter edges of LED chips. Metallic dimming layers may be embedded within passivation layers for electrical isolation, particularly at the perimeter edges. Related methods are disclosed where LED chips with metallic dimming layers are fabricated with as few as three photolithography steps.
    Type: Application
    Filed: September 12, 2025
    Publication date: April 2, 2026
    Inventors: Steven Wuester, Michael Check, Nikolas Hall
  • Publication number: 20260075992
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures and related methods are disclosed. LED chip structures include arrangements of current spreading layers and dielectric reflective layers relative to active LED structures. Current spreading layers may be positioned to provide electron path steering toward bulk portions of active LED structures and away from associated mesa sidewalls. Dielectric reflective layers may cover current spreading layers while also extending to cover the mesa sidewalls. Dielectric reflective layers include etch stop layers followed by one or more dielectric layers. The etch stop layers allow over-etching of the dielectric layers to ensure integrity of openings for various electrical interconnects formed through the dielectric reflective layer in related methods. Arrangements of electrical interconnects are also provided that provide tailored current balancing for LED chips.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 12, 2026
    Inventors: Michael Check, Steven Wuester, Daniel Carleton Driscoll
  • Patent number: 12557443
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures in LED chips for reducing voiding of bonding metals are disclosed. LED chips include active LED structures on carrier submounts and contact structures arranged to receive external electrical connections adjacent the active LED structures. Exemplary contact structures include contacts electrically coupled to active LED structures and dielectric structures beneath the contacts. Dielectric structures are arranged beneath portions of the contacts while still allowing electrical connections therethrough. Such dielectric structures may be provided as regions of dielectric material with spacings that control topography of underlying bonding metals to reduce voiding.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: February 17, 2026
    Assignee: CreeLED, Inc.
    Inventors: Michael Check, Justin White, Steven Wuester, Nikolas Hall, Kevin Haberern, Colin Blakely, Jesse Reiherzer
  • Patent number: 12557444
    Abstract: Light-emitting diode (LED) chips and, more particularly, structures of LED chips with electrically insulating substrates and related methods are disclosed. LED chips include at least one opening that extends through a substrate to provide an electrical pathway to an active LED structure. Another electrical connection may be provided on the active LED structure in a position that forms a vertical contact arrangement. The at least one opening may extend through the substrate and into a portion of the active LED structure to provide increased surface area for the electrical connection. Additional LED chip structures include another opening on the active LED structure that is registered with the opening in the substrate, and electrical connections to a same layer of the active LED structure may be provided within each opening. Related methods include laser drilling the at least one opening in the substrate.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: February 17, 2026
    Assignee: CreeLED, Inc.
    Inventors: Michael Check, Michael John Bergmann, David Suich, Kevin Haberern
  • Patent number: 12550496
    Abstract: A light emitting device comprises a light emitting diode (LED) chip having a dominant wavelength in a range from about 390 nm to about 560 nm, an encapsulant in optical communication with the LED chip, and coated phosphor particles dispersed in the encapsulant. Each of the coated phosphor particles comprises (a) a luminescent particle having a first refractive index at the dominant wavelength, and (b) an optical coating on the luminescent particle, where the optical coating has a second refractive index at the dominant wavelength. The second refractive index is between the first refractive index and a refractive index of the encapsulant at the dominant wavelength.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: February 10, 2026
    Assignee: CREELED, INC.
    Inventors: Andre Pertuit, Michael Check, David Suich, Colin Blakely, Robert Wilcox
  • Publication number: 20260033048
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly reflective structures for LED chips and related methods are disclosed. Reflective structures include arrangements of a first metal and a second metal within a metal reflective layer. The second metal may have a nonuniform distribution throughout a thickness of the metal reflective layer relative to the first metal. The first metal may promote increased reflectivity relative to the second metal, and the second metal may promote increased mechanical stability, increased adhesion, and reduced electromigration. An exemplary metal reflective layer includes increased concentrations of the second metal near interfaces between the metal reflective layer and other layers of the LED chip. The second metal may also form concentration gradients in directions away from the interfaces. Related methods include sequentially forming discrete layers of the first and second metals, followed by annealing to form the metal reflective layer.
    Type: Application
    Filed: July 29, 2024
    Publication date: January 29, 2026
    Inventors: Michael Check, Steven Wuester, Nikolas Hall
  • Publication number: 20260006956
    Abstract: Light-emitting diode (LED) devices and more particularly lead frame structures for reflow mitigation in LED packages are disclosed. Lead frame structures include various features positioned within a recess of a package housing and proximate mounting areas of LED chips within the recess. The features may include nonplanar shapes relative to a floor of the recess that promote increased adhesion with an encapsulant in the recess while also mitigating effects of reflow when the package is later bonded at a device level. Exemplary nonplanar shapes include portions of leads that extend upward into the recess and/or portions of leads that extend downward below the floor of the recess. The features may be arranged in rows, as islands, or even as random structures along portions of the leads.
    Type: Application
    Filed: June 26, 2024
    Publication date: January 1, 2026
    Inventors: Michael Check, Robert David Schmidt
  • Patent number: 12506026
    Abstract: Methods and related systems for transfer of semiconductor die and more particularly for mass transfer of semiconductor die, such as light-emitting diodes, using transfer elements are disclosed. Certain aspects relate to methods of continuous mass transfer using roller feed loops. Two carrier bars move in opposite directions, one with die and one with a substrate. The die stick to a roller and transfer from a die carrier to the substrate on a substrate carrier. In certain aspects, transfer elements may include rollers, flexible rollers, or expandable rollers. Transfer elements may further include alignment features, such as alignment pockets, that provide enhanced die alignment. In certain aspects, transfer elements may include one or more planar surfaces that rotate positions relative to the die carrier and the substrate carrier.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: December 23, 2025
    Assignee: CreeLED, Inc.
    Inventors: Colin Blakely, Michael Check, Robert Wilcox, David Suich, Joseph G. Sokol, Andre Pertuit
  • Publication number: 20250386619
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly light-directing structures in LED devices and related methods are disclosed. Exemplary light-directing structures include light-extraction films having one or more light-extraction elements with internal cavities for shaping emissions. Light-extraction elements and corresponding internal cavities are shaped to direct light emissions off center to provide LED devices with wider angle emissions. Internal cavities may be at least partially embedded within light-extraction films. Internal cavities may be bounded by angled inner sidewalls. Angled shapes of inner sidewalls and/or further angled shapes of outer sidewalls of light-extraction elements may effectively promote light to exit the LED chip at desired emission angles. Exemplary LED devices include LED chips and LED packages.
    Type: Application
    Filed: June 17, 2024
    Publication date: December 18, 2025
    Inventors: Steven Wuester, Nikolas Hall, Michael Check
  • Publication number: 20250366279
    Abstract: Light-emitting devices and more particularly contact structures for submounts in light-emitting diode (LED) devices are disclosed. Exemplary devices include LED chips with active LED structures bonded to carrier submounts. Contact structures include arrangements of mounting pads of carrier submounts relative to contacts of active LED structures that improve bonding integrity and/or mitigate stress-related deformation in active LED structures where growth substrates are removed. Exemplary contact structures include differing heights between anode and cathode mounting pads, particularly greater heights for mounting pads with smaller surface areas to ensure suitable bonding contact. Additional contact structures include arrangements of contacts and corresponding mounting pads that position bonding interfaces about various areas of LED chips that mitigate and/or counterbalance certain areas prone to stress-related deformation.
    Type: Application
    Filed: May 21, 2024
    Publication date: November 27, 2025
    Inventors: David Suich, Michael Check, Thomas Celano, Joseph G. Sokol, Colin Blakely
  • Patent number: 12464870
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly sealing structures for LED packages are disclosed. Sealing structures include multiple seals within an LED package that provide a multiple barrier structure for enhanced protection from elemental ingress from a surrounding environment. Certain seals may be provided as bonding materials between cover structures and submounts of LED packages, thereby enclosing LED chips. Additional seals may be provided as coatings on surfaces of LED chips and/or submounts that are between cover structures and LED chips. Sealing structures may include multiple levels of hermetic seals with LED packages.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: November 4, 2025
    Assignee: CreeLED, Inc.
    Inventors: Tucker McFarlane, Robert Wilcox, David Suich, Thomas Celano, Michael Check, Colin Blakely