Patents by Inventor Michael Check

Michael Check has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230170335
    Abstract: Aspects disclosed herein relate to light-emitting diode (LED) chips and manufacturing processes thereof. In certain aspects, an LED chip includes an epitaxial layer with a first side and a second side, a first type contact proximate a second side of the epitaxial layer, and a wavelength conversion element including at least one lumiphore. In certain embodiments, in a flip-chip construction, a distance between the at least one lumiphore and the epitaxial layer is less than 5 microns and/or the first side of the epitaxial layer includes texturing. In certain embodiments, in a vertical stack construction, a transparent bonding layer between the epitaxial layer and the wavelength conversion element includes inorganic material. In certain embodiments, a ceramic layer is bonded to the second side of the epitaxial layer and positioned horizontally adjacent to the first type contact. Such configurations facilitate construction, decrease size, and/or increase performance of the LED chips.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: David Suich, Christopher P. Hussell, Michael Check, Colin Blakely, Steven Wuester, Brian T. Collins
  • Publication number: 20230170445
    Abstract: Aspects disclosed herein relate to light-emitting diode (LED) chips and manufacturing processes thereof. In certain aspects, an LED chip includes an epitaxial layer with a first side and a second side, a first type contact proximate a second side of the epitaxial layer, and a wavelength conversion element including at least one lumiphore. In certain embodiments, in a flip-chip construction, a distance between the at least one lumiphore and the epitaxial layer is less than 5 microns and/or the first side of the epitaxial layer includes texturing. In certain embodiments, in a vertical stack construction, a transparent bonding layer between the epitaxial layer and the wavelength conversion element includes inorganic material. In certain embodiments, a ceramic layer is bonded to the second side of the epitaxial layer and positioned horizontally adjacent to the first type contact. Such configurations facilitate construction, decrease size, and/or increase performance of the LED chips.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: David Suich, Christopher P. Hussell, Michael Check, Colin Blakely, Steven Wuester, Brian T. Collins
  • Publication number: 20230170449
    Abstract: Aspects disclosed herein relate to light-emitting diode (LED) chips and manufacturing processes thereof. In certain aspects, an LED chip includes an epitaxial layer with a first side and a second side, a first type contact proximate a second side of the epitaxial layer, and a wavelength conversion element including at least one lumiphore. In certain embodiments, in a flip-chip construction, a distance between the at least one lumiphore and the epitaxial layer is less than 5 microns and/or the first side of the epitaxial layer includes texturing. In certain embodiments, in a vertical stack construction, a transparent bonding layer between the epitaxial layer and the wavelength conversion element includes inorganic material. In certain embodiments, a ceramic layer is bonded to the second side of the epitaxial layer and positioned horizontally adjacent to the first type contact. Such configurations facilitate construction, decrease size, and/or increase performance of the LED chips.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: David Suich, Christopher P. Hussell, Michael Check, Colin Blakely, Steven Wuester, Brian T. Collins
  • Publication number: 20230170447
    Abstract: Aspects disclosed herein relate to light-emitting diode (LED) chips and manufacturing processes thereof. In certain aspects, an LED chip includes an epitaxial layer with a first side and a second side, a first type contact proximate a second side of the epitaxial layer, and a wavelength conversion element including at least one lumiphore. In certain embodiments, in a flip-chip construction, a distance between the at least one lumiphore and the epitaxial layer is less than 5 microns and/or the first side of the epitaxial layer includes texturing. In certain embodiments, in a vertical stack construction, a transparent bonding layer between the epitaxial layer and the wavelength conversion element includes inorganic material. In certain embodiments, a ceramic layer is bonded to the second side of the epitaxial layer and positioned horizontally adjacent to the first type contact. Such configurations facilitate construction, decrease size, and/or increase performance of the LED chips.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: David Suich, Christopher P. Hussell, Michael Check, Colin Blakely, Steven Wuester, Brian T. Collins
  • Publication number: 20230115342
    Abstract: Light-emitting diode (LED) packages, and more particularly broad electromagnetic spectrum LED packages are disclosed. Individual LED packages are disclosed that are capable of emitting various combinations of peak wavelengths across a broad electromagnetic spectrum, including one or more combinations of ultraviolet, visible, and infrared peak wavelengths. Such LED packages may also be broadly tunable across portions of the electromagnetic spectrum ranging from ultraviolet to infrared wavelengths. By providing such capabilities within a single light source provided by a single LED package, larger and more complex systems for broadband emissions that include multiple light sources, complex optical systems, mirrors, filters, and additional components may be avoided. LED chip arrangements, control schemes, and encapsulant arrangements are also disclosed for such broad electromagnetic spectrum LED packages.
    Type: Application
    Filed: October 7, 2021
    Publication date: April 13, 2023
    Inventors: David Suich, Michael Check, Colin Blakely
  • Publication number: 20230106479
    Abstract: Multiple-junction light-emitting diodes (LEDs), and more particularly lumiphoric material arrangements for multiple-junction LEDs are disclosed. LEDs may refer to multiple-junction LED chips and/or LED packages that include multiple-junction LED chips. Individual lumiphoric material regions may be arranged in positions that are registered with individual junctions of a multiple-junction LED chip. The lumiphoric material regions may be formed at the LED chip level and/or at the LED package level. Different ones of the lumiphoric material regions may be configured to provide different wavelengths in response to recipient light emitted by junctions of the LED chip. In this manner, a single multiple-junction LED chip according to the present disclosure may be capable of providing a plurality of different emission colors and/or wavelengths.
    Type: Application
    Filed: October 5, 2021
    Publication date: April 6, 2023
    Inventors: Morgan Meadows Davis, Colin Blakely, Kyle Damborsky, Michael Check
  • Publication number: 20230083154
    Abstract: Lumiphoric materials and corresponding light-emitting devices, and more particularly localized surface plasmon resonance for enhanced photoluminescence of lumiphoric materials are disclosed. Plasmonic materials are disclosed that are configured to induce localized surface plasmon resonance and excite a corresponding localized surface plasmon enhanced electric field in response to incident light. An increase in photoluminescence of lumiphoric materials may be realized when the lumiphoric materials are arranged within the localized surface plasmon enhanced electric field. Plasmonic materials are disclosed that include various arrangements of nanoparticles and/or patterned structures with corresponding dielectric materials that are collectively arranged in close proximity to lumiphoric materials.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Michael Check, David Suich, Steven Wuester
  • Publication number: 20230037469
    Abstract: Light-emitting diodes (LEDs), and more particularly edge structures for light shaping in LED chips are disclosed. Edge structures may include a repeating pattern of features that is formed along one or more mesa sidewalls of active LED structure mesas. Such active LED structure mesas may include a p-type layer, an active layer, and at least a portion of an n-type layer. Features of the repeating pattern may be configured with a size and/or shape to promote redirection of laterally propagating light from the active layer at the mesa sidewalls. In this manner, light that may otherwise escape the LED chip at the mesa sidewalls may be redirected toward an intended emission direction for the LED chip. Certain aspects include reflective structures that are provided on the active LED structures mesas and are further arranged to extend past the active LED structure mesas to cover the repeating pattern of features.
    Type: Application
    Filed: August 6, 2021
    Publication date: February 9, 2023
    Inventors: Michael Check, Steven Wuester, Justin White, Seth Joseph Balkey
  • Patent number: 11508715
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures with electrical overstress protection are disclosed. LED chip structures are disclosed that include built-in electrical overstress protection. An exemplary LED chip may include an active LED structure that is arranged as a primary light-emitting structure and a separate active LED structure that is arranged as an electrical overstress protection structure. The electrical overstress protection structure may be electrically connected in reverse relative to the primary light-emitting structure. In this manner, under normal operating conditions, forward current will flow through the primary light-emitting structure to generate desired light emissions, and during an electrical overstress event, reverse current may flow through the electrical overstress protection structure, thereby protecting the light-emitting structure from damage.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: November 22, 2022
    Assignee: CreeLED, Inc.
    Inventors: Daniel E. Stasiw, Steven Wuester, Michael Check
  • Publication number: 20220328728
    Abstract: A light-emitting diode (LED) chip with reflective layers having high reflectivity is disclosed. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer. An adhesion layer may be provided between the first reflective layer and the second reflective layer. The adhesion layer may comprise a metal oxide that promotes improved adhesion with reduced optical losses.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 13, 2022
    Inventors: Michael Check, Kevin Haberern
  • Publication number: 20220246816
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 4, 2022
    Inventor: Michael Check
  • Patent number: 11398591
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: July 26, 2022
    Assignee: CREELED, INC.
    Inventor: Michael Check
  • Patent number: 11387389
    Abstract: A light-emitting diode (LED) chip with reflective layers having high reflectivity is disclosed. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer. An adhesion layer may be provided between the first reflective layer and the second reflective layer. The adhesion layer may comprise a metal oxide that promotes improved adhesion with reduced optical losses.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: July 12, 2022
    Assignee: CREELED, INC.
    Inventors: Michael Check, Kevin Haberern
  • Publication number: 20210336093
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures with electrical overstress protection are disclosed. LED chip structures are disclosed that include built-in electrical overstress protection. An exemplary LED chip may include an active LED structure that is arranged as a primary light-emitting structure and a separate active LED structure that is arranged as an electrical overstress protection structure. The electrical overstress protection structure may be electrically connected in reverse relative to the primary light-emitting structure. In this manner, under normal operating conditions, forward current will flow through the primary light-emitting structure to generate desired light emissions, and during an electrical overstress event, reverse current may flow through the electrical overstress protection structure, thereby protecting the light-emitting structure from damage.
    Type: Application
    Filed: April 24, 2020
    Publication date: October 28, 2021
    Inventors: Daniel E. Stasiw, Steven Wuester, Michael Check
  • Publication number: 20210288226
    Abstract: A light-emitting diode (LED) chip with reflective layers having high reflectivity. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer.
    Type: Application
    Filed: June 2, 2021
    Publication date: September 16, 2021
    Inventor: Michael Check
  • Patent number: 11094848
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures are disclosed. LED chip structures are disclosed that include reduced bonding topography between active LED structures and carrier submounts. For certain LED chip structures, active LED structures are formed on a growth substrate and subsequently bonded to a carrier substrate. Bonding between active LED structures and carrier submounts is typically provided by metal bonding materials. By providing reduced bonding topography between active LED structures and carrier submounts, bonding strength of metal bonding materials may be improved. Electrical connection configurations for certain layers of active LED structures are disclosed that promote reduced bonding topography. Peripheral border configurations of carrier submounts are also disclosed with that promote reduced bonding topography along the peripheral borders.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: August 17, 2021
    Assignee: CreeLED, Inc.
    Inventors: Luis Breva, Colin Stuart, Michael Check
  • Patent number: 11031527
    Abstract: A light-emitting diode (LED) chip with reflective layers having high reflectivity. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: June 8, 2021
    Assignee: CreeLED, Inc.
    Inventor: Michael Check
  • Publication number: 20210050482
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures are disclosed. LED chip structures are disclosed that include reduced bonding topography between active LED structures and carrier submounts. For certain LED chip structures, active LED structures are formed on a growth substrate and subsequently bonded to a carrier substrate. Bonding between active LED structures and carrier submounts is typically provided by metal bonding materials. By providing reduced bonding topography between active LED structures and carrier submounts, bonding strength of metal bonding materials may be improved. Electrical connection configurations for certain layers of active LED structures are disclosed that promote reduced bonding topography. Peripheral border configurations of carrier submounts are also disclosed with that promote reduced bonding topography along the peripheral borders.
    Type: Application
    Filed: August 16, 2019
    Publication date: February 18, 2021
    Inventors: Luis Breva, Colin Stuart, Michael Check
  • Publication number: 20210050485
    Abstract: A light-emitting diode (LED) chip with reflective layers having high reflectivity is disclosed. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer. An adhesion layer may be provided between the first reflective layer and the second reflective layer. The adhesion layer may comprise a metal oxide that promotes improved adhesion with reduced optical losses.
    Type: Application
    Filed: January 28, 2019
    Publication date: February 18, 2021
    Inventors: Michael Check, Kevin Haberern
  • Patent number: 10879441
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: December 29, 2020
    Assignee: Cree, Inc.
    Inventor: Michael Check