Patents by Inventor Michael Check

Michael Check has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200395524
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 17, 2020
    Inventor: Michael Check
  • Patent number: 10840423
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: November 17, 2020
    Assignee: Cree, Inc.
    Inventor: Michael Check
  • Patent number: 10804452
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: October 13, 2020
    Assignee: Cree, Inc.
    Inventor: Michael Check
  • Publication number: 20200194644
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chips with interconnect structures are disclosed. LED chips are provided that include first interconnects electrically coupled to an n-type layer and second interconnects electrically connected to a p-type layer. Configurations of the first and second interconnects are provided that may improve current spreading by reducing localized areas of current crowding within LED chips. Various configurations are disclosed that include collectively formed symmetric patterns of the first and second interconnects, diameters of certain ones of either the first or second interconnects that vary based on their relative positions in LED chips, and spacings of the second interconnects that vary based on their distances from the first interconnects. In this regard, LED chips are disclosed with improved current spreading as well as higher lumen outputs and efficiencies.
    Type: Application
    Filed: December 17, 2018
    Publication date: June 18, 2020
    Inventor: Michael Check
  • Publication number: 20190237630
    Abstract: A light-emitting diode (LED) chip with reflective layers having high reflectivity. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer.
    Type: Application
    Filed: January 29, 2018
    Publication date: August 1, 2019
    Inventor: Michael Check
  • Patent number: 8814511
    Abstract: A turbomachine component includes a turbine stator nozzle member having an airfoil core shape. The airfoil core shape includes a nominal profile substantially in accordance with Cartesian coordinate values of X, Y, and Z set forth in TABLE 1, and wherein X and Y are distances in inches which, when connected by smooth continuing arcs, define airfoil profile sections at each distance Z in inches, the profile sections at the Z distances being joined smoothly with one another to form a complete airfoil core shape.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: August 26, 2014
    Assignee: General Electric Company
    Inventors: Benjamin Michael Check, Craig Allen Bielek, Hal Feaster Pollard, Sivaraman Vedhagiri
  • Publication number: 20130039771
    Abstract: A turbomachine component includes a turbine stator nozzle member having an airfoil core shape. The airfoil core shape includes a nominal profile substantially in accordance with Cartesian coordinate values of X, Y, and Z set forth in TABLE 1, and wherein X and Y are distances in inches which, when connected by smooth continuing arcs, define airfoil profile sections at each distance Z in inches, the profile sections at the Z distances being joined smoothly with one another to form a complete airfoil core shape.
    Type: Application
    Filed: August 9, 2011
    Publication date: February 14, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Benjamin Michael Check, Craig Allen Bielek, Hal Feaster Pollard, Sivaraman Vedhagiri
  • Publication number: 20050021210
    Abstract: An apparatus and method are provided for operating a pump-less rear wheel anti-lock brake system of a vehicle using speed sensors on at least one front and one rear wheel, to provide a true dynamic rear proportioning (DRP) function, and to significantly enhance braking performance in rear wheel anti-lock mode through better management of the volume of pressurized fluid supplied by the master cylinder using rear pressure control (RPC).
    Type: Application
    Filed: July 21, 2003
    Publication date: January 27, 2005
    Inventors: James Bond, Daniel Borgemenke, Matthew Cukovecki, David Reuter, William Borchers, Jeffrey Vondervellen, Jerry Newton, Michael Check, Joseph Elliott