Abstract: A nanogap of controlled width in-between noble metals is produced using sidewall techniques and chemical-mechanical-polishing. Electrical connections are provided to enable current measurements across the nanogap for analytical purposes. The nanogap in-between noble metals may also be formed inside a Damascene trench. The nanogap in-between noble metals may also be inserted into a crossed slit nanopore framework. A noble metal layer on the side of the nanogap may have sub-layers serving the purpose of multiple simultaneous electrical measurements.

Abstract: A multi-generational carrier platform is configured to carry substrate carriers of different sizes depending on processing needs. Multiple carrier adaptors are provided on one side of a support plate, and substrate carriers can be distributed among the carrier adaptors to mount a maximum number of substrates under the constraint of non-overlap of the substrates and the substrate carriers. The multi-generational carrier platform can be configured to provide rotation to each substrate carrier mounted thereupon, and is compatible with chemical mechanical planarization processes that require rotation of substrates against an abrasive surface. The multi-generational carrier platform facilitates maximum utilization of a processing area provided by a tool configured to process substrates of different sizes.

Abstract: A multi-generational carrier platform is configured to carry substrate carriers of different sizes depending on processing needs. Multiple carrier adaptors are provided on one side of a support plate, and substrate carriers can be distributed among the carrier adaptors to mount a maximum number of substrates under the constraint of non-overlap of the substrates and the substrate carriers. The multi-generational carrier platform can be configured to provide rotation to each substrate carrier mounted thereupon, and is compatible with chemical mechanical planarization processes that require rotation of substrates against an abrasive surface. The multi-generational carrier platform facilitates maximum utilization of a processing area provided by a tool configured to process substrates of different sizes.

Abstract: An apparatus for chemical mechanical planarization includes a spindle assembly structure and at least one substrate carrier, which make a linear lateral movement relative to each other while abrasive surfaces of a plurality of cylindrical spindles in the spindle assembly structure contact, and rotate against, at least one substrate mounted on the at least one substrate carrier. The direction of the linear lateral movement is within the plane that tangentially contacts the plurality of cylindrical spindles, and can be orthogonal to the axes of rotation of the plurality of cylindrical spindles.

Abstract: An apparatus for chemical mechanical planarization includes a spindle assembly structure and at least one substrate carrier, which make a linear lateral movement relative to each other while abrasive surfaces of a plurality of cylindrical spindles in the spindle assembly structure contact, and rotate against, at least one substrate mounted on the at least one substrate carrier. The direction of the linear lateral movement is within the plane that tangentially contacts the plurality of cylindrical spindles, and can be orthogonal to the axes of rotation of the plurality of cylindrical spindles.

Abstract: An apparatus for chemical mechanical planarization includes a spindle assembly structure and at least one substrate carrier, which make a linear lateral movement relative to each other while abrasive surfaces of a plurality of cylindrical spindles in the spindle assembly structure contact, and rotate against, at least one substrate mounted on the at least one substrate carrier. The direction of the linear lateral movement is within the plane that tangentially contacts the plurality of cylindrical spindles, and can be orthogonal to the axes of rotation of the plurality of cylindrical spindles.

Abstract: Planarization methods include depositing a mask material on top of an overburden layer on a semiconductor wafer. The mask material is planarized to remove the mask material from up areas of the overburden layer to expose the overburden layer without removing the mask material from down areas. The exposed overburden layer is wet etched and leaves a thickness remaining over an underlying layer. Remaining portions of the mask layer and the exposed portions of the overburden layer are planarized to expose the underlying layer.

Abstract: A planarization method includes planarizing a semiconductor wafer in a first chemical mechanical polish step to remove overburden and planarize a top layer leaving a thickness of top layer material over underlying layers. The top layer material is planarized in a second chemical mechanical polish step to further remove the top layer and expose underlying layers of a second material and a third material such that a selectivity of the top layer material to the second material to the third material is between about 1:1:1 to about 2:1:1 to provide a planar topography.

Abstract: Methods for polishing multiple dielectric layers to form replacement metal gate structures include a first chemical mechanical polish step to remove overburden and planarize a top layer to leave a planarized thickness over a gate structure. A second chemical mechanical polish step includes removal of the thickness to expose an underlying covered surface of a dielectric of the gate structure with a slurry configured to polish the top layer and the underlying covered surface substantially equally to accomplish a planar topography. A third chemical mechanical polish step is employed to remove the dielectric of the gate structure and expose a gate conductor.

Abstract: A polishing method includes polishing, in a first polish, a wafer to remove overburden and planarize a top layer leaving a portion remaining on an underlying layer. A second polishing step includes two phases. In a first phase, the top layer is removed and the underlying layer is exposed, with a top layer to underlying layer selectivity of between about 1:1 to about 2:1 to provide a planar topography. In a second phase, residual portions of the top layer are removed from a top of the underlying layer to ensure complete exposure of an underlying layer surface.

Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

Abstract: A multi-generational carrier platform is configured to carry substrate carriers of different sizes depending on processing needs. Multiple carrier adaptors are provided on one side of a support plate, and substrate carriers can be distributed among the carrier adaptors to mount a maximum number of substrates under the constraint of non-overlap of the substrates and the substrate carriers. The multi-generational carrier platform can be configured to provide rotation to each substrate carrier mounted thereupon, and is compatible with chemical mechanical planarization processes that require rotation of substrates against an abrasive surface. The multi-generational carrier platform facilitates maximum utilization of a processing area provided by a tool configured to process substrates of different sizes.

Abstract: An apparatus for chemical mechanical planarization includes a spindle assembly structure and at least one substrate carrier, which make a linear lateral movement relative to each other while abrasive surfaces of a plurality of cylindrical spindles in the spindle assembly structure contact, and rotate against, at least one substrate mounted on the at least one substrate carrier. The direction of the linear lateral movement is within the plane that tangentially contacts the plurality of cylindrical spindles, and can be orthogonal to the axes of rotation of the plurality of cylindrical spindles.

Abstract: An apparatus for chemical mechanical planarization includes a spindle assembly structure and at least one substrate carrier, which make a linear lateral movement relative to each other while abrasive surfaces of a plurality of cylindrical spindles in the spindle assembly structure contact, and rotate against, at least one substrate mounted on the at least one substrate carrier. The direction of the linear lateral movement is within the plane that tangentially contacts the plurality of cylindrical spindles, and can be orthogonal to the axes of rotation of the plurality of cylindrical spindles.

Abstract: A multi-generational carrier platform is configured to carry substrate carriers of different sizes depending on processing needs. Multiple carrier adaptors are provided on one side of a support plate, and substrate carriers can be distributed among the carrier adaptors to mount a maximum number of substrates under the constraint of non-overlap of the substrates and the substrate carriers. The multi-generational carrier platform can be configured to provide rotation to each substrate carrier mounted thereupon, and is compatible with chemical mechanical planarization processes that require rotation of substrates against an abrasive surface. The multi-generational carrier platform facilitates maximum utilization of a processing area provided by a tool configured to process substrates of different sizes.

Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

Abstract: An assembly including a main wafer having a body with a front side and a back side and a plurality of blind electrical vias terminating above the back side, and a handler wafer, is obtained. A step includes exposing the blind electrical vias to various heights on the back side. Another step involves applying a first chemical mechanical polish process to the back side, to open any of the surrounding insulator adjacent the end regions of the cores remaining after the exposing step, and to co-planarize the via conductive cores, the surrounding insulator adjacent the side regions of the cores, and the body of the main wafer. Further steps include etching the back side to produce a uniform standoff height of each of the vias across the back side; depositing a dielectric across the back side; and applying a second chemical mechanical polish process to the back side.

Abstract: A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and fowling at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

Abstract: Methods for polishing multiple dielectric layers to form replacement metal gate structures include a first chemical mechanical polish step to remove overburden and planarize a top layer to leave a planarized thickness over a gate structure. A second chemical mechanical polish step includes removal of the thickness to expose an underlying covered surface of a dielectric of the gate structure with a slurry configured to polish the top layer and the underlying covered surface substantially equally to accomplish a planar topography. A third chemical mechanical polish step is employed to remove the dielectric of the gate structure and expose a gate conductor.