Patents by Inventor Michael Gaynes

Michael Gaynes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11224927
    Abstract: Exemplary embodiments of the invention include a method and apparatus for assembling a semiconductor device. The method may include heating the semiconductor device, which comprises a printed circuit card and a packaging laminate, according to a device heating profile to melt solder material located between an array of contact points on the printed circuit card and an array of corresponding contact points on the packaging laminate; and cooling the semiconductor device to solidify the solder material, wherein during at least a portion of the cooling a temperature of the printed circuit card is kept at substantially a same temperature or a higher temperature than a temperature of an electronic module attached to the packaging laminate opposite the corresponding array of contact points.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: January 18, 2022
    Assignee: International Business Machines Corporation
    Inventors: Michael Gaynes, Edward J Yarmchuk
  • Patent number: 11140786
    Abstract: An electronic component to be encapsulated is introduced into a mold cavity. The mold cavity includes at least first and second halves, and at least one of the halves is formed with a negative of a thermal-interface-material engaging pattern thereon. An encapsulating material, which encapsulates the electronic component and engages the negative of the thermal-interface-material engaging pattern, is introduced into the mold cavity. The encapsulating material is allowed to solidify such that a thermal-interface-material engaging surface of the encapsulant solidifies with the thermal-interface-material engaging pattern thereon. During subsequent assembly, the thermal-interface-material engaging pattern engages thermal interface material to resist lateral motion of the thermal interface material.
    Type: Grant
    Filed: January 19, 2020
    Date of Patent: October 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael A. Gaynes
  • Patent number: 10908110
    Abstract: An electric potential is applied to first and second electrodes on opposite sides of a gap between an electronic component and a heat spreader. At least one of a thermal interface material in the gap, the electronic component and the heat spreader is subjected to a changing physical condition. The capacitance is monitored. Such a method can be practiced using an array of components sharing a common heat spreader. An assembly for testing thermal interfaces includes a printed circuit board, a plurality of electronic components mounted to and operatively associated with the printed circuit board, a heat spreader positioned for absorbing heat generated by the electronic components, a first electrode associated with the heat spreader, a plurality of second electrodes associated, respectively, with the electronic component, and a device for monitoring electrical capacitances. The technique may be employed for monitoring physical changes in electronic devices.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: February 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael A. Gaynes, Edward J. Yarmchuk
  • Patent number: 10750615
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: August 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran
  • Publication number: 20200154576
    Abstract: An electronic component to be encapsulated is introduced into a mold cavity. The mold cavity includes at least first and second halves, and at least one of the halves is formed with a negative of a thermal-interface-material engaging pattern thereon. An encapsulating material, which encapsulates the electronic component and engages the negative of the thermal-interface-material engaging pattern, is introduced into the mold cavity. The encapsulating material is allowed to solidify such that a thermal-interface-material engaging surface of the encapsulant solidifies with the thermal-interface-material engaging pattern thereon. During subsequent assembly, the thermal-interface-material engaging pattern engages thermal interface material to resist lateral motion of the thermal interface material.
    Type: Application
    Filed: January 19, 2020
    Publication date: May 14, 2020
    Inventors: Timothy J. Chainer, Michael A. Gaynes
  • Patent number: 10548228
    Abstract: An electronic component to be encapsulated is introduced into a mold cavity. The mold cavity includes at least first and second halves, and at least one of the halves is formed with a negative of a thermal-interface-material engaging pattern thereon. An encapsulating material, which encapsulates the electronic component and engages the negative of the thermal-interface-material engaging pattern, is introduced into the mold cavity. The encapsulating material is allowed to solidify such that a thermal-interface-material engaging surface of the encapsulant solidifies with the thermal-interface-material engaging pattern thereon. During subsequent assembly, the thermal-interface-material engaging pattern engages thermal interface material to resist lateral motion of the thermal interface material.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: January 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael A. Gaynes
  • Patent number: 10535619
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: January 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael A. Gaynes, Kenneth P. Rodbell, William Santiago-Fernandez
  • Patent number: 10535618
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: January 14, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael A. Gaynes, Kenneth P. Rodbell, William Santiago-Fernandez
  • Publication number: 20190323983
    Abstract: An electric potential is applied to first and second electrodes on opposite sides of a gap between an electronic component and a heat spreader. At least one of a thermal interface material in the gap, the electronic component and the heat spreader is subjected to a changing physical condition. The capacitance is monitored. Such a method can be practiced using an array of components sharing a common heat spreader. An assembly for testing thermal interfaces includes a printed circuit board, a plurality of electronic components mounted to and operatively associated with the printed circuit board, a heat spreader positioned for absorbing heat generated by the electronic components, a first electrode associated with the heat spreader, a plurality of second electrodes associated, respectively, with the electronic component, and a device for monitoring electrical capacitances. The technique may be employed for monitoring physical changes in electronic devices.
    Type: Application
    Filed: July 1, 2019
    Publication date: October 24, 2019
    Inventors: Timothy J. Chainer, Michael A. Gaynes, Edward J. Yarmchuk
  • Publication number: 20190281702
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Application
    Filed: May 28, 2019
    Publication date: September 12, 2019
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran
  • Patent number: 10368441
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: July 30, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran
  • Patent number: 10338024
    Abstract: An electric potential is applied to first and second electrodes on opposite sides of a gap between an electronic component and a heat spreader. At least one of a thermal interface material in the gap, the electronic component and the heat spreader is subjected to a changing physical condition. The capacitance is monitored. Such a method can be practiced using an array of components sharing a common heat spreader. An assembly for testing thermal interfaces includes a printed circuit board, a plurality of electronic components mounted to and operatively associated with the printed circuit board, a heat spreader positioned for absorbing heat generated by the electronic components, a first electrode associated with the heat spreader, a plurality of second electrodes associated, respectively, with the electronic component, and a device for monitoring electrical capacitances. The technique may be employed for monitoring physical changes in electronic devices.
    Type: Grant
    Filed: July 8, 2017
    Date of Patent: July 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael A. Gaynes, Edward J. Yarmchuk
  • Patent number: 10257924
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael J. Fisher, Michael A. Gaynes, David C. Long, Kenneth P. Rodbell, William Santiago-Fernandez, Thomas Weiss
  • Patent number: 10194522
    Abstract: A method comprises applying an adhesive to a first substrate and a second substrate to secure the first substrate to the second substrate. The adhesive extends in a plane on one side of an interposer that also extends in the plane, and is contiguous with the adhesive. The interposer comprises openings to enable flow of adhesive through the openings to form adhesive bond areas on one of the substrates where the areas substantially conform to the openings and lie adjacent to adhesive free areas. The adhesive substantially covers the other of the substrates so that the bond areas produce regions of reduced adhesive strength to the one substrate compared to the bond strength of the adhesive to the other substrate. Adjusting opening sizes adjusts area bond strengths. One substrate may comprise a VTM, the other a heat spreader, and the adhesive, a TIM. An article of manufacture comprises the substrate-adhesive-interposer-adhesive-substrate layers.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: January 29, 2019
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael Gaynes
  • Patent number: 10177102
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: January 8, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael A. Gaynes, Kenneth P. Rodbell, William Santiago-Fernandez
  • Patent number: 10168436
    Abstract: Water soluble, low alpha particle emission, electrically conductive coatings and techniques for formation thereof are provided. In one aspect, a method for forming an electrically-conductive coating on a substrate includes the steps of: forming an aqueous solution of a water soluble polymer (e.g., a polyvinylpyrrolidinone polymer or copolymer); adding electrically conductive filler particles to the aqueous solution above a percolation threshold to form a mixture; and depositing the mixture onto the substrate to form a low alpha particle emitting, electrically-conductive coating on the substrate, wherein the coating blocks alpha particles from being emitted from the substrate. An article and an alpha particle detector having a surface(s) thereof covered with the coating are also provided.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Michael S. Gordon
  • Publication number: 20180358311
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Application
    Filed: July 26, 2018
    Publication date: December 13, 2018
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
  • Publication number: 20180350757
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Application
    Filed: July 26, 2018
    Publication date: December 6, 2018
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
  • Patent number: 10147694
    Abstract: Solder bumps are provided on round wafers through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned mask layer. Solder is injected over the pillars or BLM, filling the channels. Molten solder can be injected in cavities formed in round wafers without leakage using a carrier assembly that accommodates wafers that have been previously subjected to mask layer deposition and patterning. One such carrier assembly includes an elastomeric body portion having a round recess, the walls of the recess forming a tight seal with the round wafer. Other carrier assemblies employ adhesives applied around the peripheral edges of the wafers to ensure sealing between the carrier assemblies and wafers.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: December 4, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Bing Dang, Michael A. Gaynes, Paul A. Lauro, Jae-Woong Nah
  • Patent number: 10141236
    Abstract: A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: November 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Martin Beaumier, Yves Dallaire, Melania C. Doll, Michael Gaynes, Edward J. Yarmchuk