Patents by Inventor Michael Gaynes

Michael Gaynes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10043725
    Abstract: A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Martin Beaumier, Yves Dallaire, Melania C. Doll, Michael Gaynes, Edward J. Yarmchuk
  • Publication number: 20180213645
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Application
    Filed: March 22, 2018
    Publication date: July 26, 2018
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran
  • Patent number: 9999124
    Abstract: Tamper-respondent assemblies with regions of increased susceptibility to a tamper event are provided, which include one or more tamper-detect sensors, one or more conductive traces, and an adhesive. The tamper-detect sensor(s) facilitates defining a secure volume about one or more electronic components to be protected, and the conductive trace(s) forms, at least in part, a tamper-detect network of the tamper-respondent assembly. The conductive trace(s) is disposed, at least in part, on the tamper-detect sensor(s). The adhesive contacts the conductive trace(s) on the tamper-detect sensor(s), and is disposed, at least in part, between and couples a surface of the tamper-detect sensor(s) to another surface of the assembly. Together, the tamper-detect sensor(s), conductive trace(s), and adhesive are a subassembly, with the subassembly being configured with multiple regions of increased susceptibility to breaking of the conductive trace(s) with a tamper event through the subassembly.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: June 12, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Michael J. Fisher, Michael A. Gaynes, David C. Long, Thomas Weiss
  • Patent number: 9974179
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: May 15, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran
  • Publication number: 20180124915
    Abstract: Tamper-respondent assemblies with regions of increased susceptibility to a tamper event are provided, which include one or more tamper-detect sensors, one or more conductive traces, and an adhesive. The tamper-detect sensor(s) facilitates defining a secure volume about one or more electronic components to be protected, and the conductive trace(s) forms, at least in part, a tamper-detect network of the tamper-respondent assembly. The conductive trace(s) is disposed, at least in part, on the tamper-detect sensor(s). The adhesive contacts the conductive trace(s) on the tamper-detect sensor(s), and is disposed, at least in part, between and couples a surface of the tamper-detect sensor(s) to another surface of the assembly. Together, the tamper-detect sensor(s), conductive trace(s), and adhesive are a subassembly, with the subassembly being configured with multiple regions of increased susceptibility to breaking of the conductive trace(s) with a tamper event through the subassembly.
    Type: Application
    Filed: November 2, 2016
    Publication date: May 3, 2018
    Inventors: James A. BUSBY, Michael J. FISHER, Michael A. GAYNES, David C. LONG, Thomas WEISS
  • Publication number: 20180102329
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 12, 2018
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
  • Publication number: 20180098424
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 5, 2018
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael J. FISHER, Michael A. GAYNES, David C. LONG, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ, Thomas WEISS
  • Publication number: 20180090406
    Abstract: A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
    Type: Application
    Filed: July 20, 2017
    Publication date: March 29, 2018
    Applicant: International Business Machines Corporation
    Inventors: Martin Beaumier, Yves Dallaire, Melania C. Doll, Michael Gaynes, Edward J. Yarmchuk
  • Publication number: 20180090407
    Abstract: A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
    Type: Application
    Filed: July 20, 2017
    Publication date: March 29, 2018
    Applicant: International Business Machines Corporation
    Inventors: Martin Beaumier, Yves Dallaire, Melania C. Doll, Michael Gaynes, Edward J. Yarmchuk
  • Patent number: 9913370
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: March 6, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael J. Fisher, Michael A. Gaynes, David C. Long, Kenneth P. Rodbell, William Santiago-Fernandez, Thomas Weiss
  • Patent number: 9881880
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: January 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, Silvio Dragone, Michael A. Gaynes, Kenneth P. Rodbell, William Santiago-Fernandez
  • Publication number: 20170330844
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 16, 2017
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael A. GAYNES, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ
  • Publication number: 20170329020
    Abstract: Water soluble, low alpha particle emission, electrically conductive coatings and techniques for formation thereof are provided. In one aspect, a method for forming an electrically-conductive coating on a substrate includes the steps of: forming an aqueous solution of a water soluble polymer (e.g., a polyvinylpyrrolidinone polymer or copolymer); adding electrically conductive filler particles to the aqueous solution above a percolation threshold to form a mixture; and depositing the mixture onto the substrate to form a low alpha particle emitting, electrically-conductive coating on the substrate, wherein the coating blocks alpha particles from being emitted from the substrate. An article and an alpha particle detector having a surface(s) thereof covered with the coating are also provided.
    Type: Application
    Filed: May 10, 2016
    Publication date: November 16, 2017
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Michael S. Gordon
  • Publication number: 20170332485
    Abstract: Tamper-proof electronic packages and fabrication methods are provided which include a glass enclosure enclosing, at least in part, at least one electronic component within a secure volume, and a tamper-respondent detector. The glass enclosure includes stressed glass with a compressively-stressed surface layer, and the tamper-respondent detector monitors, at least in part, the stressed glass to facilitate defining the secure volume. The stressed glass fragments with an attempted intrusion event through the stressed glass, and the tamper-respondent detector detects the fragmenting of the stressed glass. In certain embodiments, the stressed glass may be a machined glass enclosure that has undergone ion-exchange processing, and the compressively-stressed surface layer of the stressed glass may be compressively-stressed to ensure that the stressed glass fragments into glass particles of fragmentation size less than 1000 ?m with the intrusion event.
    Type: Application
    Filed: May 13, 2016
    Publication date: November 16, 2017
    Inventors: James A. BUSBY, Silvio DRAGONE, Michael J. FISHER, Michael A. GAYNES, David C. LONG, Kenneth P. RODBELL, William SANTIAGO-FERNANDEZ, Thomas WEISS
  • Publication number: 20170307558
    Abstract: An electric potential is applied to first and second electrodes on opposite sides of a gap between an electronic component and a heat spreader. At least one of a thermal interface material in the gap, the electronic component and the heat spreader is subjected to a changing physical condition. The capacitance is monitored. Such a method can be practiced using an array of components sharing a common heat spreader. An assembly for testing thermal interfaces includes a printed circuit board, a plurality of electronic components mounted to and operatively associated with the printed circuit board, a heat spreader positioned for absorbing heat generated by the electronic components, a first electrode associated with the heat spreader, a plurality of second electrodes associated, respectively, with the electronic component, and a device for monitoring electrical capacitances. The technique may be employed for monitoring physical changes in electronic devices.
    Type: Application
    Filed: July 8, 2017
    Publication date: October 26, 2017
    Inventors: Timothy J. Chainer, Michael A. Gaynes, Edward J. Yarmchuk
  • Patent number: 9786572
    Abstract: A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: October 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Martin Beaumier, Yves Dallaire, Melania C. Doll, Michael Michael Gaynes, Edward J. Yarmchuk
  • Publication number: 20170257977
    Abstract: An electronic component to be encapsulated is introduced into a mold cavity. The mold cavity includes at least first and second halves, and at least one of the halves is formed with a negative of a thermal-interface-material engaging pattern thereon. An encapsulating material, which encapsulates the electronic component and engages the negative of the thermal-interface-material engaging pattern, is introduced into the mold cavity. The encapsulating material is allowed to solidify such that a thermal-interface-material engaging surface of the encapsulant solidifies with the thermal-interface-material engaging pattern thereon. During subsequent assembly, the thermal-interface-material engaging pattern engages thermal interface material to resist lateral motion of the thermal interface material.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 7, 2017
    Inventors: Timothy J. Chainer, Michael A. Gaynes
  • Patent number: 9714911
    Abstract: An electric potential is applied to first and second electrodes on opposite sides of a gap between an electronic component and a heat spreader. At least one of a thermal interface material in the gap, the electronic component and the heat spreader is subjected to a changing physical condition. The electrical capacitance between the electrodes is monitored during the changing physical condition. Such a method can be practiced using an array of components sharing a common heat spreader. An assembly for testing thermal interfaces includes a printed circuit board, a plurality of electronic components mounted to and operatively associated with the printed circuit board, a heat spreader positioned for absorbing heat generated by the electronic components, a first electrode associated with the heat spreader, a plurality of second electrodes associated, respectively, with the electronic component, and a device for monitoring electrical capacitances between the first and second electrodes.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: July 25, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy J. Chainer, Michael A. Gaynes, Edward J. Yarmchuk
  • Publication number: 20170200659
    Abstract: The disclosure generally relates to methods for manufacturing a filled gap region or cavity between two surfaces forming a device microchip. In one embodiment, the cavity results from two surfaces, for example, a PCB and a chip or two chips. More specifically, the disclosure relates to a method of manufacture and the resulting apparatus having porous underfill to enable rework of the electrical interconnects of a microchip on a multi-chip module. In one embodiment, the disclosure builds on the thermal underfill concept and achieves high thermal conductivity by the use of alumina fillers. Alternatively, other material such as silica filler particles may be selected to render the underfill a poor thermal conductive. In one embodiment, the disclose is concerned with reworkability of the material.
    Type: Application
    Filed: January 8, 2016
    Publication date: July 13, 2017
    Inventors: Michael Gaynes, Jeffrey Gelorme, Thomas Brunschwiler, Brian Burg, Gerd Schlottig, Jonas Zuercher
  • Publication number: 20170196089
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Application
    Filed: March 22, 2017
    Publication date: July 6, 2017
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran