Patents by Inventor Michael Gaynes

Michael Gaynes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170181267
    Abstract: A method comprises applying an adhesive to a first substrate and a second substrate to secure the first substrate to the second substrate. The adhesive extends in a plane on one side of an interposer that also extends in the plane, and is contiguous with the adhesive. The interposer comprises openings to enable flow of adhesive through the openings to form adhesive bond areas on one of the substrates where the areas substantially conform to the openings and lie adjacent to adhesive free areas. The adhesive substantially covers the other of the substrates so that the bond areas produce regions of reduced adhesive strength to the one substrate compared to the bond strength of the adhesive to the other substrate. Adjusting opening sizes adjusts area bond strengths. One substrate may comprise a VTM, the other a heat spreader, and the adhesive, a TIM. An article of manufacture comprises the substrate-adhesive-interposer-adhesive-substrate layers.
    Type: Application
    Filed: February 27, 2017
    Publication date: June 22, 2017
    Applicant: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael Gaynes
  • Patent number: 9686853
    Abstract: A method comprises applying an adhesive to a first substrate and a second substrate to secure the first substrate to the second substrate. The adhesive extends in a plane on one side of an interposer that also extends in the plane, and is contiguous with the adhesive. The interposer comprises openings to enable flow of adhesive through the openings to form adhesive bond areas on one of the substrates where the areas substantially conform to the openings and lie adjacent to adhesive free areas. The adhesive substantially covers the other of the substrates so that the bond areas produce regions of reduced adhesive strength to the one substrate compared to the bond strength of the adhesive to the other substrate. Adjusting opening sizes adjusts area bond strengths. One substrate may comprise a VTM, the other a heat spreader, and the adhesive, a TIM. An article of manufacture comprises the substrate-adhesive-interposer-adhesive-substrate layers.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: June 20, 2017
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Chainer, Michael Gaynes
  • Publication number: 20170148758
    Abstract: Exemplary embodiments of the invention include a method and apparatus for assembling a semiconductor device. The method may include heating the semiconductor device, which comprises a printed circuit card and a packaging laminate, according to a device heating profile to melt solder material located between an array of contact points on the printed circuit card and an array of corresponding contact points on the packaging laminate; and cooling the semiconductor device to solidify the solder material, wherein during at least a portion of the cooling a temperature of the printed circuit card is kept at substantially a same temperature or a higher temperature than a temperature of an electronic module attached to the packaging laminate opposite the corresponding array of contact points.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 25, 2017
    Inventors: Michael Gaynes, Edward J. Yarmchuk
  • Patent number: 9627784
    Abstract: An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: April 18, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Robert P. Kuder, II, Daniel J. Littrell, Thomas E. Lombardi, Marie-Claude Paquet, Frank L. Pompeo, David L. Questad, James Speidell, Sri M. Sri-Jayantha, Son K. Tran
  • Patent number: 9583410
    Abstract: A volumetric integrated circuit manufacturing method is provided. The method includes assembling a slab element of elongate chips, exposing a wiring layer between adjacent elongate chips of the slab element, metallizing a surface of the slab element at and around the exposed wiring layer to form a metallized surface electrically coupled to the wiring layer and passivating the metallized surface to hermetically seal the metallized surface.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: February 28, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel C. Edelstein, Michael A. Gaynes, Thomas M. Shaw, Bucknell C. Webb, Roy R. Yu
  • Patent number: 9472789
    Abstract: A microsystem with an integrated energy source serves as a platform and ecosystem for a variety of microsystems for implanting into human tissue. The microsystem includes a flexible battery located in an enclosed void. The enclosed void is formed by joining a first dielectric element with a second dielectric element.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: October 18, 2016
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Joana Sofia Branquinho Teresa Maria, Bing Dang, Michael A. Gaynes, John U. Knickerbocker, Eric P. Lewandowski, Cornelia K. Tsang, Bucknell C. Webb
  • Patent number: 9412891
    Abstract: A device for dissipating heat from a photovoltaic cell is disclosed. A first thermally conductive layer receives heat from the photovoltaic cell and reduces a density of the received heat. A second thermally conductive layer conducts heat from the first thermally conductive layer to a surrounding environment. An electrically isolating layer thermally couples the first thermally conductive layer and the second thermally conductive layer.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: August 9, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Peter D. Kirchner, Yves C. Martin, Naim Moumen, Dhirendra M. Patel, Robert L. Sandstrom, Theodore G. van Kessel, Brent A. Wacaser, Hussam Khonkar
  • Patent number: 9343423
    Abstract: A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: May 17, 2016
    Assignee: International Business Machines Corporation
    Inventors: Claudius Ferger, Michael A. Gaynes, Jae-Woong Nah, Da-Yuan Shih
  • Patent number: 9330946
    Abstract: Structures and processes for die stacking using an opaque or translucent pre-applied underfill material generally include selectively applying a low surface tension material to at least a portion of an alignment mark surface on a die; and applying the opaque or translucent underfill material to the die surface, wherein the underfill material does not wet or adhere to the low surface tension material such that the alignment mark surface is free of underfill material.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: May 3, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mukta G. Farooq, Michael A. Gaynes, Katsuyuki Sakuma
  • Publication number: 20160118358
    Abstract: Solder bumps are provided on round wafers through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned mask layer. Solder is injected over the pillars or BLM, filling the channels. Molten solder can be injected in cavities formed in round wafers without leakage using a carrier assembly that accommodates wafers that have been previously subjected to mask layer deposition and patterning. One such carrier assembly includes an elastomeric body portion having a round recess, the walls of the recess forming a tight seal with the round wafer. Other carrier assemblies employ adhesives applied around the peripheral edges of the wafers to ensure sealing between the carrier assemblies and wafers.
    Type: Application
    Filed: January 4, 2016
    Publication date: April 28, 2016
    Inventors: Bing Dang, Michael A. Gaynes, Paul A. Lauro, Jae-Woong Nah
  • Patent number: 9321245
    Abstract: A method for providing a matrix material between a bonded pair of substrates with a homogeneous distribution of anisotropic filler particles is provided. Functionalized anisotropic filler particles are mixed uniformly with a matrix material to form a homogenous mixture. A bonded assembly of a first substrate and a second substrate with an array of electrical interconnect structures is placed within a vacuum environment. The homogenous mixture of the matrix material and the anisotropic filler particles is dispensed around the array of electrical interconnect structures. A gas is abruptly introduced into the vacuum environment to induce an implosion of the homogenous mixture. The implosion causes the homogenous mixture to fill the cavity between the first and second substrates without causing agglomeration of the anisotropic filler particles. The mixture filling the space between the first and second substrates has a homogenous distribution of the anisotropic filler particles.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: April 26, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael A. Gaynes, Eric P. Lewandowski, Jae-Woong Nah, Robert J. Polastre
  • Patent number: 9324896
    Abstract: A device for dissipating heat from a photovoltaic cell is disclosed. A first thermally conductive layer receives heat from the photovoltaic cell and reduces a density of the received heat. A second thermally conductive layer conducts heat from the first thermally conductive layer to a surrounding environment. An electrically isolating layer thermally couples the first thermally conductive layer and the second thermally conductive layer.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: April 26, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Peter D. Kirchner, Yves C. Martin, Naim Moumen, Dhirendra M. Patel, Robert L. Sandstrom, Theodore G. van Kessel, Brent A. Wacaser
  • Patent number: 9305896
    Abstract: A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: April 5, 2016
    Assignee: International Business Machines Corporation
    Inventors: Claudius Ferger, Michael A. Gaynes, Jae-Woong Nah, Da-Yuan Shih
  • Patent number: 9275879
    Abstract: Multi-chip underfills and methods for multi-chip module fabrication include connecting one or more chips to a substrate with one or more electrical connections; partially curing an underfill material such that the underfill provides structural support to the electrical connections; electrically testing the one or more chips to identify one or more defective chips; and replacing the one or more defective chips.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: March 1, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Jae-Woong Nah
  • Patent number: 9273408
    Abstract: Solder bumps are provided on round wafers through the use of injection molded solder. Copper pillars or ball limiting metallurgy are formed over I/O pads within the channels of a patterned mask layer. Solder is injected over the pillars or BLM, filling the channels. Molten solder can be injected in cavities formed in round wafers without leakage using a carrier assembly that accommodates wafers that have been previously subjected to mask layer deposition and patterning. One such carrier assembly includes an elastomeric body portion having a round recess, the walls of the recess forming a tight seal with the round wafer. Other carrier assemblies employ adhesives applied around the peripheral edges of the wafers to ensure sealing between the carrier assemblies and wafers.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 1, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Bing Dang, Michael A. Gaynes, Paul A. Lauro, Jae-Woong Nah
  • Publication number: 20160042979
    Abstract: Multi-chip underfills and methods for multi-chip module fabrication include connecting one or more chips to a substrate with one or more electrical connections; partially curing an underfill material such that the underfill provides structural support to the electrical connections; electrically testing the one or more chips to identify one or more defective chips; and replacing the one or more defective chips.
    Type: Application
    Filed: August 11, 2014
    Publication date: February 11, 2016
    Inventors: Michael A. Gaynes, Jeffrey D. Gelorme, Jae-Woong Nah
  • Patent number: 9231139
    Abstract: A substrate has a top side and a bottom side. A solar cell is secured to the top side of the substrate and has an anode and a cathode. A heat transfer element is secured to the bottom side of the substrate. An anode pad is formed on the top side of the substrate and is coupled to the anode of the solar cell; similarly, a cathode pad is formed on the top side of the substrate and is coupled to the cathode of the solar cell. The substrate coefficient of thermal expansion and the solar cell coefficient of thermal expansion match within plus or minus ten parts per million per degree C.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: January 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael A. Gaynes, Yves C. Martin, Jay E. Pogemiller, Aparna Prabhakar, Theodore G. van Kessel, Brent A. Wacaser
  • Publication number: 20150359108
    Abstract: A method comprises applying an adhesive to a first substrate and a second substrate to secure the first substrate to the second substrate. The adhesive extends in a plane on one side of an interposer that also extends in the plane, and is contiguous with the adhesive. The interposer comprises openings to enable flow of adhesive through the openings to form adhesive bond areas on one of the substrates where the areas substantially conform to the openings and lie adjacent to adhesive free areas. The adhesive substantially covers the other of the substrates so that the bond areas produce regions of reduced adhesive strength to the one substrate compared to the bond strength of the adhesive to the other substrate. Adjusting opening sizes adjusts area bond strengths. One substrate may comprise a VTM, the other a heat spreader, and the adhesive, a TIM. An article of manufacture comprises the substrate-adhesive-interposer-adhesive-substrate layers.
    Type: Application
    Filed: June 9, 2014
    Publication date: December 10, 2015
    Inventors: Timothy J. Chainer, Michael Gaynes
  • Patent number: 9181440
    Abstract: An electrically conductive paste providing low alpha particle emission is provided. A resin and conductive particles are mixed, and a curing agent is added. A solvent is subsequently added. The electrically conductive paste including a resin compound is formed by mixing the mixture in a high shear mixer. The electrically conductive paste can be applied to a surface of an article to form a coating, or can be molded into an article. The solvent is evaporated, and the electrically conductive paste is cured to provide a graphite-containing resin compound. The graphite-containing resin compound is electrically conductive, and provides low alpha particle emission at a level suitable for a low alpha particle emissivity coating.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: November 10, 2015
    Assignee: GLOBALFOUNDRIES U.S. 2 LLC
    Inventors: Michael A. Gaynes, Michael S. Gordon, Eric P. Lewandowski
  • Publication number: 20150287960
    Abstract: A system comprising a first dielectric element and a second dielectric element each having a first surface, wherein the first surface of the first dielectric element and the first surface of the second dielectric element are joined. The system further comprises one or more enclosed voids within the joined first and second dielectric elements. The system further comprises a flexible battery in a first enclosed void of the one or more enclosed voids, the flexible battery having a thickness of less than about 150 microns.
    Type: Application
    Filed: July 24, 2014
    Publication date: October 8, 2015
    Inventors: Paul S. Andry, Joana Sofia Branquinho Teresa Maria, Bing Dang, Michael A. Gaynes, John U. Knickerbocker, Eric P. Lewandowski, Cornelia K. Tsang, Bucknell C. Webb