Patents by Inventor Michael L. Chabinyc

Michael L. Chabinyc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230348649
    Abstract: A composition of matter including a yield stress fluid including self-assembled copolymers each including at least one first type of polymer covalently bonded to at least one second type of polymer, wherein the first type of polymer (“first block”) is microphase separated from the second type of polymer (“second block”), at least one of the first block or the second block has its glass transition temperature less than or equal to 20° C., and the yield stress fluid has a critical yield stress at room temperature or below room temperature, without addition of a solvent for the first block or the second block. Examples of the self-assembled copolymers include a diblock copolymer or bottlebrush copolymer including the first block covalently bonded to the second block.
    Type: Application
    Filed: March 10, 2021
    Publication date: November 2, 2023
    Applicant: The Regents of the University of California
    Inventors: Renxuan Xie, Sanjoy Mukherjee, Adam E. Levi, Veronica Reynolds, Michael L. Chabinyc, Christopher Bates
  • Patent number: 11780969
    Abstract: A composition of matter including a crosslinked bottlebrush polymer, wherein the crosslinker units in the composition of matter are soluble with the bottlebrush polymer. In one example, the crosslinked bottlebrush polymer is tailored as a single phase (solvent free) elastomer useful in a capacitive pressure sensing device. A novel embodiment of the present invention further includes demonstration of a universal approach to form solvent-free bottlebrush polymer networks by photo-crosslinking mixtures of well-defined bottlebrush precursors and bis-benzophenone-based additives. This method has been proven effective with a wide variety of different side-chain chemistries.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: October 10, 2023
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Michael L. Chabinyc, Christopher M. Bates, Veronica G. Reynolds, Sanjoy Mukherjee, Renxuan E. Xie, Adam E. Levi, Jeffrey Self
  • Publication number: 20220293866
    Abstract: Triazabicylodecene can effectively n-dope a variety of organic semiconductors, including PCBM, thus increasing in-plane conductivities. We synthesized a series of TBD-based n-dopants via an N-alkylation reaction and studied the effect of various alkyl chains on the physical and device properties of the dopants. Combining two TBD moieties on a long alky chain gave a solid dopant, 2TBD-C10, with high thermal stability above 250° C. PCBM films doped by 2TBD-C10 were the most tolerant to thermal annealing and reached in-plane conductivities of 6.5×10?2 S/cm. Furthermore, incorporating 2TBD-C10 doped PCBM as the electron transport layer (ETL) in methylammonium lead triiodide (MAPbI3) based photovoltaics led to a 23% increase in performance, from 11.8% to 14.5% PCE.
    Type: Application
    Filed: May 27, 2022
    Publication date: September 15, 2022
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, THE MITSUBISHI CHEMICAL CORPORATION, A JAPANESE CORPORATION
    Inventors: Julia Schneider, Michael L. Chabinyc, Hengbin Wang, Hidenori Nakayama, Kyle D. Clark, Javier Read de Alaniz
  • Patent number: 11380852
    Abstract: Triazabicylodecene can effectively n-dope a variety of organic semiconductors, including PCBM, thus increasing in-plane conductivities. We synthesized a series of TBD-based n-dopants via an N-alkylation reaction and studied the effect of various alkyl chains on the physical and device properties of the dopants. Combining two TBD moieties on a long alky chain gave a solid dopant, 2TBD-C10, with high thermal stability above 250° C. PCBM films doped by 2TBD-C10 were the most tolerant to thermal annealing and reached in-plane conductivities of 6.5×10?2 S/cm. Furthermore, incorporating 2TBD-C10 doped PCBM as the electron transport layer (ETL) in methylammonium lead triiodide (MAPbI3) based photovoltaics led to a 23% increase in performance, from 11.8% to 14.5% PCE.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: July 5, 2022
    Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, THE MITSUBISHI CHEMICAL CORPORATION
    Inventors: Julia Schneider, Michael L. Chabinyc, Hengbin Wang, Hidenori Nakayama, Kyle D. Clark, Javier Read de Alaniz
  • Publication number: 20200362117
    Abstract: A composition of matter including a crosslinked bottlebrush polymer, wherein the crosslinker units in the composition of matter are soluble with the bottlebrush polymer. In one example, the crosslinked bottlebrush polymer is tailored as a single phase (solvent free) elastomer useful in a capacitive pressure sensing device. A novel embodiment of the present invention further includes demonstration of a universal approach to form solvent-free bottlebrush polymer networks by photo-crosslinking mixtures of well-defined bottlebrush precursors and bis-benzophenone-based additives. This method has been proven effective with a wide variety of different side-chain chemistries.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Applicant: The Regents of the University of California
    Inventors: Michael L. Chabinyc, Christopher M. Bates, Veronica G. Reynolds, Sanjoy Mukherjee, Renxuan E. Xie, Adam E. Levi, Jeffrey Self
  • Publication number: 20200194686
    Abstract: Triazabicylodecene can effectively n-dope a variety of organic semiconductors, including PCBM, thus increasing in-plane conductivities. We synthesized a series of TBD-based n-dopants via an N-alkylation reaction and studied the effect of various alkyl chains on the physical and device properties of the dopants. Combining two TBD moieties on a long alky chain gave a solid dopant, 2TBD-C10, with high thermal stability above 250° C. PCBM films doped by 2TBD-C10 were the most tolerant to thermal annealing and reached in-plane conductivities of 6.5×10?2 S/cm. Furthermore, incorporating 2TBD-C10 doped PCBM as the electron transport layer (ETL) in methylammonium lead triiodide (MAPbI3) based photovoltaics led to a 23% increase in performance, from 11.8% to 14.5% PCE.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 18, 2020
    Applicant: The Regents of the University of California
    Inventors: Julia Schneider, Michael L. Chabinyc, Hengbin Wang, Hidenori Nakayama, Kyle D. Clark, Javier Read de Alaniz
  • Patent number: 10186661
    Abstract: A method for enhancing charge carrier mobility of a field-effect transistor device. The method comprises generating uniaxial nanogrooves on a substrate and blade coating a solution comprising a semiconducting polymer onto the substrate. The polymer solution is spread onto the substrate in a direction parallel to the nanogrooves and a main-chain axis of the polymer is parallel to the nanogrooves. The semiconducting polymer can be then annealed, so that a polymer film is formed which is layered on top of the substrate, with polymer chains aligned parallel to a direction of charge carrier movement.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: January 22, 2019
    Assignee: The Regents of the University of California
    Inventors: Shrayesh N. Patel, Edward J. Kramer, Michael L. Chabinyc, Chan Luo, Alan J. Heeger
  • Publication number: 20160260900
    Abstract: A method for enhancing charge carrier mobility of a field-effect transistor device. The method comprises generating uniaxial nanogrooves on a substrate and blade coating a solution comprising a semiconducting polymer onto the substrate. The polymer solution is spread onto the substrate in a direction parallel to the nanogrooves and a main-chain axis of the polymer is parallel to the nanogrooves. The semiconducting polymer can be then annealed, so that a polymer film is formed which is layered on top of the substrate, with polymer chains aligned parallel to a direction of charge carrier movement.
    Type: Application
    Filed: March 2, 2016
    Publication date: September 8, 2016
    Applicants: The Regents of the University of California, Mitsubishi Chemical Corporation
    Inventors: Shrayesh N. Patel, Edward J. Kramer, Michael L. Chabinyc, Chan Luo, Alan J. Heeger
  • Publication number: 20150243869
    Abstract: A an organic material is shown including a conjugated core, one or more electron donating moieties, and a non-conjugated spacer coupled between the conjugated core and the electron donating moiety. Methods of forming the organic material include solution based processing. One example of an organic material includes a self-doping n-type organic material.
    Type: Application
    Filed: February 19, 2015
    Publication date: August 27, 2015
    Inventors: Rachel Segalman, Boris Russ, Fulvio Brunetti, Craig Hawker, Michael L. Chabinyc, Jeffrey J. Urban
  • Publication number: 20130248833
    Abstract: The invention provides methods for making and using end-functionalized conjugated polymers. Embodiments of the invention comprise performing a coupling polymerization in the presence of AA monomers, BB monomers and an end capping compound that can react with a monomer and which is selected to include a functional group. The functional end groups can, for example, comprise polymers or small molecules selected for their ability to produce conjugated polymers that self-assemble into thermodynamically ordered structures. In certain embodiments of the invention, nano-scale morphology of such conjugated polymer compositions can be driven by the phase separation of two covalently bound polymer blocks. These features make the use of conjugated polymers an appealing strategy for exerting control over active layer morphology in semiconducting polymer materials systems.
    Type: Application
    Filed: March 25, 2013
    Publication date: September 26, 2013
    Applicant: The Regents of the University of California
    Inventors: Craig J. Hawker, Michael L. Chabinyc, Sung-Yu Ku, Maxwell J. Robb
  • Patent number: 8513069
    Abstract: A method of depositing elongated nanostructures that allows accurate positioning and orientation is described. The method involves printing or otherwise depositing elongated nanostructures in a carrier solution. The deposited droplets are also elongated, usually by patterning the surface upon which the droplets are deposited. As the droplet evaporates, the fluid flow within the droplets is controlled such that the nanostructures are deposited either at the edge of the elongated droplet or the center of the elongated droplet. The described deposition technique has particular application in forming the active region of a transistor.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: August 20, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L. Chabinyc, William S. Wong
  • Patent number: 8497506
    Abstract: In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spincasting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: July 30, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse N. Ng, Michael L. Chabinyc
  • Publication number: 20120326149
    Abstract: In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spincasting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.
    Type: Application
    Filed: September 4, 2012
    Publication date: December 27, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Michael L. Chabinyc
  • Patent number: 8283655
    Abstract: In layered structures, channel regions and light-interactive regions can include the same semiconductive polymer material, such as with an organic polymer. A light-interactive region can be in charge-flow contact with a contacting electrode region, and a channel region can, when conductive, provide an electrical connection between the contacting electrode region and other circuitry. For example, free charge carriers can be generated in the light-interactive region, resulting in a capacitively stored signal level; the signal level can be read out to other circuitry by turning on a transistor that includes the channel region. In an array of photosensing cells with organic thin film transistors, an opaque insulating material can be patterned to cover a data line and channel regions of cells along the line, but not extend entirely over the cells' light-interactive regions.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: October 9, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L. Chabinyc, Tse Nga Ng
  • Patent number: 8258021
    Abstract: In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spin-casting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: September 4, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Michael L. Chabinyc
  • Patent number: 8058113
    Abstract: A method of depositing elongated nanostructures that allows accurate positioning and orientation is described. The method involves printing or otherwise depositing elongated nanostructures in a carrier solution. The deposited droplets are also elongated, usually by patterning the surface upon which the droplets are deposited. As the droplet evaporates, the fluid flow within the droplets is controlled such that the nanostructures are deposited either at the edge of the elongated droplet or the center of the elongated droplet. The described deposition technique has particular application in forming the active region of a transistor.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: November 15, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L. Chabinyc, William S. Wong
  • Patent number: 8059975
    Abstract: A system of diagnosing a printer or photocopying system using a flexible diagnostic sheet is described. In the system, a thin diagnostic sheet including a plurality of sensors formed on the sheet is run through the paper path of the printing system. The printing system subjects the diagnostic sheet to the printing process, including the deposition of fuser oil and toner on the sheet. Sensors on the sheet record various parameters, including but not limited to the amount of fuser oil deposited and the charge on various toner particles. The information is transmitted to service personnel or the printer end user to enable timely repair of the printer.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: November 15, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L Chabinyc, Tse Nga Ng, William S Wong, Ashish Pattekar, John E Northrup, Pengfei Qi
  • Patent number: 8000613
    Abstract: A system, including an improved sensor, for determining toner particle uniformity is described. The sensor measures toner particle charge, typically be having the charge on the toner particle control a current flow through the channel of a thin film transistor. By measuring the charge on many toner particles, the system determines whether sufficient toner degradation has occurred that the toner should be replaced. The sensor is particularly suitable for being formed on a thin diagnostic sheet that is input through the paper path of a printing system.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: August 16, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S Wong, Michael L Chabinyc, Sanjiv Sambandan, Pengfei Qi
  • Patent number: 7980195
    Abstract: A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: July 19, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L. Chabinyc, Ana C. Arias
  • Publication number: 20110073840
    Abstract: An embodiment is a method and apparatus of radial contact using nanowires. An inner contact has a center. An outer contact surrounds the inner contact around the center and is spaced from the inner contact by a channel length. A nanowire connects the center of the inner contact and the outer contact in a rotationally invariant geometry. Another embodiment is a method and apparatus of a semiconductor device with bottom gate structure and having radial contact using nanowires. A gate electrode is deposited on a substrate. A dielectric layer is deposited on the substrate and the gate electrode. A source-drain assembly is deposited on the dielectric layer. The source-drain assembly has source and drain electrodes connected via a nanowire in a rotationally invariant geometry. Another embodiment is a method and apparatus of a semiconductor device with top gate structure and having radial contact using nanowires. An isolation barrier layer is deposited on a substrate.
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Michael L. Chabinyc, William S. Wong, Sourobh Raychaudhuri