Patents by Inventor Michael Shur

Michael Shur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10211048
    Abstract: A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer. One or more of a set of growth conditions, a thickness of one or both of the layers, and/or a lattice mismatch between the layers can be configured to create a target level of compressive and/or shear stress within a minimum percentage of the interface between the layers.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: February 19, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Wenhong Sun, Rakesh Jain, Jinwei Yang, Maxim S. Shatalov, Alexander Dobrinsky, Remigijus Gaska, Michael Shur
  • Publication number: 20190039920
    Abstract: A solution for disinfecting a fluid, colloid, mixture, and/or the like using ultraviolet radiation is provided. An ultraviolet transparent enclosure can include an inlet and an outlet for a flow of media to be disinfected. The ultraviolet transparent enclosure can include a material that is configured to prevent biofouling within the ultraviolet transparent enclosure. A set of ultraviolet radiation sources are located adjacent to the ultraviolet transparent enclosure and are configured to generate ultraviolet radiation towards the ultraviolet transparent enclosure.
    Type: Application
    Filed: October 8, 2018
    Publication date: February 7, 2019
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Saulius Smetona, Timothy James Bettles, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 10197750
    Abstract: A light guiding structure is provided. The structure includes an anodized aluminum oxide (AAO) layer and a fluoropolymer layer located immediately adjacent to a surface of the AAO layer. Light propagates through the AAO layer in a direction substantially parallel to the fluoropolymer layer. An optoelectronic device can be coupled to a surface of the AAO layer, and emit/sense light propagating through the AAO layer. Solutions for fabricating the light guiding structure are also described.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: February 5, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 10199535
    Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: February 5, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 10199536
    Abstract: A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: February 5, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Wenhong Sun, Jinwei Yang, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 10199531
    Abstract: A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: February 5, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Daniel Billingsley, Robert M. Kennedy, Wenhong Sun, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 10199537
    Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: February 5, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Publication number: 20190035968
    Abstract: A semiconductor heterostructure including a polarization doped region is described. The region can correspond to an active region of a device, such as an optoelectronic device. The region includes an n-type semiconductor side and a p-type semiconductor side and can include one or more quantum wells located there between. The n-type and/or p-type semiconductor side can be formed of a group III nitride including aluminum and indium, where a first molar fraction of aluminum nitride and a first molar fraction of indium nitride increase (for the n-type side) or decrease (for the p-type side) along a growth direction to create the n- and/or p-polarizations.
    Type: Application
    Filed: September 28, 2018
    Publication date: January 31, 2019
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Alexander Dobrinsky, Michael Shur
  • Publication number: 20190030196
    Abstract: A solution for disinfecting an ultraviolet transparent structure and/or an item placed on or near the structure is provided. The solution can utilize a set of ultraviolet radiation sources configured to generate ultraviolet radiation through the internal surface of the ultraviolet transparent structure towards the external surface and out to an ambient environment for disinfection of the external surface and/or a targeted item. A first set of sources can generate a scattered type of radiation that uniformly disinfects the external surface of the ultraviolet transparent structure and a second set of sources can generate a focused type of radiation that disinfects at least one portion of the targeted item. A control system can direct the first set of sources to generate the scattered radiation towards the external surface of the ultraviolet transparent structure and direct the second set of sources to generate the focused radiation at the targeted item.
    Type: Application
    Filed: September 26, 2018
    Publication date: January 31, 2019
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Yuri Bilenko, Alexander Dobrinsky, Michael Shur
  • Patent number: 10190973
    Abstract: An integrated ultraviolet analyzer is described. The integrated ultraviolet analyzer can include one or more ultraviolet analyzer cells, each of which includes one or more ultraviolet photodetectors and one or more solid state light sources, which are monolithically integrated. The solid state light source can be operated to emit ultraviolet light, at least some of which passes through an analyzer active gap and irradiates a light sensing surface of the ultraviolet photodetector. A medium to be evaluated can be present in the analyzer active gap and affect the ultraviolet light as it passes there through, thereby altering an effect of the ultraviolet light on a ultraviolet photodetector.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: January 29, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Michael Shur, Alexander Dobrinsky
  • Publication number: 20190027650
    Abstract: An opto-electronic device with two-dimensional injection layers is described. The device can include a semiconductor structure with a semiconductor layer having one of an n-type semiconductor layer or a p-type semiconductor layer, and a light generating structure formed on the semiconductor layer. A set of tilted semiconductor heterostructures is formed over the semiconductor structure. Each tilted semiconductor heterostructure includes a core region, a set of shell regions adjoining a sidewall of the core region, and a pair of two-dimensional carrier accumulation (2DCA) layers. Each 2DCA layer is formed at a heterointerface between one of the sidewalls of the core region and one of the shell regions. The sidewalls of the core region, the shell regions, and the 2DCA layers each having a sloping surface, wherein each 2DCA layer forms an angle with a surface of the semiconductor structure.
    Type: Application
    Filed: September 26, 2018
    Publication date: January 24, 2019
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Michael Shur, Alexander Dobrinsky
  • Publication number: 20190027651
    Abstract: A contact for solid state light sources is described. The solid state light source can include an active region, such as a light emitting multiple quantum well, and a semiconductor layer, such as a p-type layer, from which carriers (e.g., holes) enter the active region. A contact can be located adjacent to the semiconductor layer and include a plurality of small area contacts extending only partially through the semiconductor layer. The plurality of small area contacts can have a characteristic lateral size at an interface between the small area contact and the semiconductor layer equal to or smaller than a characteristic depletion region width for the plurality of small area contacts.
    Type: Application
    Filed: October 31, 2017
    Publication date: January 24, 2019
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Michael Shur, Alexander Dobrinsky
  • Patent number: 10183085
    Abstract: A system capable of detecting and/or sterilizing surface(s) of an object using ultraviolet radiation is provided. The system can include a disinfection chamber and/or handheld ultraviolet unit, which includes ultraviolet sources for inducing fluorescence in a contaminant and/or sterilizing a surface of an object. The object can comprise a protective suit, which is worn by a user and also can include ultraviolet sources for disinfecting air prior to the air entering the protective suit. The system can be implemented as a multi-tiered system for protecting the user and others from exposure to the contaminant and sterilizing the protective suit after exposure to an environment including the contaminant.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: January 22, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Alexander Dobrinsky, Michael Shur, Remigijus Gaska, Timothy James Bettles
  • Patent number: 10186632
    Abstract: A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers. One or more of the quantum wells and/or the barriers includes a carbon doped layer (e.g., a non-percolated or percolated carbon atomic plane).
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: January 22, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Remigijus Gaska, Jinwei Yang, Alexander Dobrinsky
  • Publication number: 20190019917
    Abstract: A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 17, 2019
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Wenhong Sun, Jinwei Yang, Maxim S. Shatalov, Alexander Dobrinsky, Remigijus Gaska, Michael Shur, Brandon Robinson
  • Patent number: 10181398
    Abstract: A solution for fabricating a group III nitride heterostructure and/or a corresponding device is provided. The heterostructure can include a nucleation layer, which can be grown on a lattice mismatched substrate using a set of nucleation layer growth parameters. An aluminum nitride layer can be grown on the nucleation layer using a set of aluminum nitride layer growth parameters. The respective growth parameters can be configured to result in a target type and level of strain in the aluminum nitride layer that is conducive for growth of additional heterostructure layers resulting in strains and strain energies not exceeding threshold values which can cause relaxation and/or dislocation formation.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: January 15, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Wenhong Sun, Alexander Dobrinsky, Maxim S. Shatalov, Michael Shur, Remigijus Gaska
  • Patent number: 10178726
    Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: January 8, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Grigory Simin, Michael Shur, Alexander Dobrinsky, Maxim S. Shatalov
  • Patent number: 10177534
    Abstract: A device is provided in which a light emitting semiconductor structure is excited by an electron beam that impacts a region of a lateral surface of the light emitting semiconductor structure at an angle to the normal of the lateral surface that is non-zero. The non-zero angle can be configured to cause excitation in a desired region of the light emitting semiconductor structure. The device can include wave guiding layer(s) and/or other features to improve the light generation and/or operation of the device.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: January 8, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Maxim S. Shatalov, Michael Shur, Alexander Dobrinsky
  • Patent number: 10172968
    Abstract: Ultraviolet radiation is directed within a storage area formed of a plurality of layers including an outer ultraviolet reflective layer, an inner ultraviolet transparent layer, and a layer located between the outer ultraviolet reflective layer and the inner ultraviolet transparent layer. The refractive index of the layer between the outer ultraviolet reflective layer and the inner ultraviolet transparent layer is less than the refractive index of the inner ultraviolet transparent layer. A set of ultraviolet radiation sources generate ultraviolet radiation directed at a set of items located within the storage area.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: January 8, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Maxim S. Shatalov, Timothy James Bettles, Yuri Bilenko, Saulius Smetona, Alexander Dobrinsky, Remigijus Gaska
  • Patent number: 10166307
    Abstract: An adhesive device with an ultraviolet element is disclosed. The adhesive device with an ultraviolet element can be used to provide a treatment of a surface of an object. The treatment can include cleaning, disinfection, sterilization and sanitization. The adhesive device with an ultraviolet element can also be used as a self-adhesive bandage.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: January 1, 2019
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Alexander Dobrinsky, Michael Shur, Remigijus Gaska