Abstract: A circuit for setting one of a plurality of organization forms of an integrated circuit comprises a detector circuit connected to an external connection of the integrated circuit. The external connection in at least one of the organization forms can be used for external communication of the integrated circuit. A signal can be impressed into a signal path connected to the external connection by the detector circuit. As a consequence, an output signal is generated at an output of the detector circuit. A control circuit sets one of the organization forms and receives the output signal of the detector circuit. One of the organization forms is set by the control circuit depending on the state of the output signal of the detector circuit. A module with a circuit according to the invention can identify that organization form of the organization forms in which it is operated in the application.

Abstract: A novel method is provided for the manufacture of escitalopram. The method comprises chromatographic separation of the enantiomers of citalopram or an intermediate in the production of citalopram using a chiral stationary phase such as Chiralpak™ or Chiralcel™ OD. Novel chiral intermediates for the synthesis of Escitalopram made by said method are also provided.

Abstract: The invention relates to a semiconductor memory, particularly a DRAM, in which the memory cells in each case have a trench capacitor arranged in a lower area of a trench hole and a vertical selection transistor which is formed adjoining an upper area of the trench hole and which connects an inner electrode of the trench capacitor to a bit line, a conductive channel being capable of being formed in dependence on the potential of a word line in the channel area, the channel area completely enclosing the trench hole in its upper area, and the associated word line at least partially enclosing the channel area.

Abstract: An integrated circuit includes a first circuit component, a second circuit component, and an external terminal for making contact with the circuit. The first circuit component is connected to the external terminal via the second component. A bridging circuit connects the first circuit component to the external terminal and can be activated by a test mode signal. In the active state, the bridging circuit connects the external terminal to the first circuit component while bridging the second circuit component, while it is nonconducting in the deactivated state. Circuit components integrated in the semiconductor chip can be electrically measured nondestructively via activatable switches. Circuit components that lie between the external terminal and the device to be measured can be excluded from the measurement by bridging circuits. The method also makes it possible to measure a plurality of integrated devices in parallel or serially.

Abstract: Method for fabricating a semiconductor memory device having auxiliary transistor structures which are required for lithography and etching processes. A protective structure for reducing leakage currents between gate conductor and doped zone is provided. The protective structure is formed as a region doped oppositely to the doped zone.

Abstract: The document describes a method for transferring data between a memory device and a read/write device. In this case, a system clock is produced at a system clock rate and a data transfer clock is produced at a data transfer clock rate. In addition, control commands for controlling the data transfer are transferred in sync with the system clock, and data are transferred in line with corresponding control commands in sync with the data transfer clock. The system clock rate and the data transfer clock rate can be set as desired in this context. In particular, the data transfer clock rate is chosen to be higher than the system clock rate, which means that a higher data transfer rate than previously is possible.

Abstract: A pipe clamp for connecting two partially insertable pipes has a clamping strap that is placed circumferentially about the spherical end sections of the pipes inserted into one another. The clamping strap has two outwardly projecting clamping jaws provided with a hole through which a clamping screw extends. The clamping strap is curved about a transverse axis that is positioned for coaxially inserted pipes in the untightened state of the clamping strap in a central plane of the clamping strap extending perpendicularly to the coaxial center axes of the pipes at a spacing from a center of the spherical end sections of the pipes. The inner radius of the clamping strap in the untightened state is smaller than the outer radius of the spherical end sections such that the sum of the spacing and of the inner radius is greater than the outer radius of the end sections.

Abstract: An integrated semiconductor circuit, having active components lying in mutually adjoining wells of a respective first and second conduction type, wherein the active components respectively are associated with substrate contacts lying in direct proximity to an edge bounding the mutually adjoining wells, is disclosed. Preferably, structures of the active components other than the contacts are arranged to lie further away from the edge and the circuit/layout structures are not mirror-symmetrical with respect to a center line of the circuit chip.

Abstract: The enumeration and analysis of residual white blood cells in a sample of leukocyte-reduced blood products is conducted by forming a suspension of the leukocyte-reduced blood products with a sufficient amount of a lysing reagent. The lysing reagent comprises a buffer with a low molar concentration, and a non-ionic surfactant. The suspension of leukocyte-reduced blood products and the lysing reagent is incubated for a sufficient time at a temperature sufficient to selectively lyse the platelets and red blood cells without damaging the white blood cells. The white blood cells of the lysed blood products are then contacted with a suitable dye to stain the white blood cells and the number of stained white blood cells is measured. The lysing reagent is free of harsh organic solvents which can damage the plastic components of automated clinical analyzers.

Abstract: A circuit structure has at least two etching trenches disposed at sidewalls of a silicon block left behind during the etching of the structure. The etching trenches are disposed at angles with respect to one another that are prescribed by the form of the silicon block left behind. Semiconductor layer structures which can interact with one another diagonally across are in each case accommodated in the etching trenches. In this case, the function of the entire circuit structure results from the interaction of the layer structures disposed in the various etching trenches.

Abstract: A circuit for generating a refresh signal for a memory cell, includes a temperature-independent current source, a temperature-independent voltage source, and a temperature-dependent reference voltage source. A capacitor's first and second terminals are connected respectively to the temperature-independent current source, and the temperature-independent voltage source. The capacitor's first terminal is connected to a first input terminal of a comparator. The comparator's second input is connected to the temperature-dependent reference voltage source. The comparator is configured to output a refresh signal in response to a difference between voltages present at the first and second inputs thereof.

Abstract: In a DRAM memory circuit, the sense amplifiers, for amplifying the differential voltage sensed between the cores of a bit line, in each case contain two transistor circuits, each of which has two switching transistors. The first transistor circuit pulls the lower potential of the sensed differential voltage down to a defined low logic potential. The second transistor circuit pulls the higher potential up to a defined high logic potential. According to the invention, all the transistors in the sense amplifier are field-effect transistors of the same conduction type, in the case of which the channel is at low impedance if the gate potential is higher than the source potential at least by the amount of the threshold voltage Vth.

Abstract: Memory cell having a trench capacitor that is constructed in a lower region of a substantially perpendicular trench hole, and which comprises an inner and an outer electrode, a dielectric layer being arranged between the inner and the outer electrodes, a vertical selection transistor that has a substantially perpendicular channel region, which is constructed adjacent to an upper region of the trench hole and which connects the inner electrode of the trench capacitor to a bit line, it being possible to construct a conductive channel as a function of the potential of a word line in the channel region, the channel region partially enclosing the trench hole in its upper region, and the associated work line at least partially surrounding the channel region.

Abstract: A semiconductor memory having memory cells, each memory cell includes a selection transistor and a trench capacitor. The selection transistor is formed in the form of a vertical transistor. In such a case, two word lines are separated only by a connecting channel that enables an electrically conductive connection between a trench filling of the trench capacitor and a bit line.

Abstract: A dynamic semiconductor memory has memory cells disposed in a cell field. The memory cells are connected to master word lines by way of a word line driver for driving the memory cells. As a rule, all the master word lines that are located in the segmented cell field are inactive, with at most one master word line being active. The master word lines are switched to an active low state, and a portion of the master word lines in a region of the cell field are inverted by a control device located at the beginning of the cell field. The deactivated master word lines in the cell field are at a ground potential, which, in view of the large number of existing master word lines, advantageously substantially reduces the leakage current that must be applied by the generators.

Abstract: A circuit structure has at least two etching trenches disposed at sidewalls of a silicon block left behind during the etching of the structure. The etching trenches are disposed at angles with respect to one another that are prescribed by the form of the silicon block left behind. Semiconductor layer structures which can interact with one another diagonally across are in each case accommodated in the etching trenches. In this case, the function of the entire circuit structure results from the interaction of the layer structures disposed in the various etching trenches.

Abstract: The memory cell according to the invention has a vertical selection transistor, via whose channel region the inner electrode of the trench capacitor can be connected to a bit line. The channel region is led to the bit line through an associated word line, which completely or partially encloses the channel region. As a result, a conductive channel can be formed within the channel region depending on the potential of the word line. Preferably, the extent of the trench hole in the word line direction is at least 1.5 times as large as in the bit line direction.

Abstract: The memory cell according to the invention has a vertical selection transistor, via whose channel region the inner electrode of the trench capacitor can be connected to a bit line. The large extent of the channel region in the bit line direction means that the trench capacitor can be rapidly charged and read. The channel region is led to the bit line through an associated word line, which completely or partially encloses the channel region. A conductive channel can be formed within the channel region depending on the potential of the word line.

Abstract: Integrated circuits, in particular memory chips of the DDR SDRAM type, are tested in a parallel manner. In order to prevent the circuits from being driven relative to one another during a test operation, an input terminal that is already connected to a channel of an automatic test machine anyway is connected to a switching device, by which the output drivers can be turned off in a manner dependent on the control signal that can be fed in at the input terminal. The switching device preferably contains a demultiplexer and also a multiplexer. The demultiplexer can be driven by a test control signal that is additionally generated besides the test control signal. The input terminal is connected to a tester channel anyway during test operation, with the result that no additional external outlay arises.

Abstract: An integrated circuit has a voltage divider that is configured to save current. The circuit includes a capacitor that is inventively connected to a potential sink or potential source by way of a charge branch even when the voltage divider is inactive. The capacitor is thus held at a charge state that corresponds to the charge state given an active voltage divider. The voltage divider thus becomes functional in a shorter time following activation, because the capacitor does not require recharging.