Patents by Inventor Miki Moriyama

Miki Moriyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100244071
    Abstract: A method of manufacturing a LED lamp that is formed by sealing a LED element mounted on a substrate with glass, includes a mounting process for mounting the LED element on the substrate, a sealing member preparation process for preparing a glass sealing member that includes a concave portion being capable of housing the LED element, and a sealing process wherein the sealing member is arranged so that a forming surface of the concave portion faces the LED element, the sealing member is bonded to the substrate by thermal compression bonding, and the forming surface of the concave portion is made along the LED element.
    Type: Application
    Filed: March 25, 2010
    Publication date: September 30, 2010
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Satoshi Wada, Miki Moriyama
  • Publication number: 20100237369
    Abstract: A light-emitting device includes a substrate, a light-emitting element mounted on a first flat surface of the substrate, and a glass sealing member for sealing the light-emitting element, wherein the sealing member is in contact with the first flat surface and a side surface of the substrate and a second flat surface of the surface opposite to the first flat surface is exposed.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 23, 2010
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Satoshi Wada, Miki Moriyama
  • Publication number: 20100219444
    Abstract: A manufacturing method of a mounting part of a semiconductor light emitting element comprising: preparing a semiconductor light emitting element including an electrode which has a surface, and a board which has a surface; forming a plurality of bump material bodies on at least one of the surface of the electrode and the surface of the board by shaping bump material into islands, wherein the bump material is paste in which metal particles are dispersed, a top surface and a bottom surface of the bump material bodies have different areas, and the top surface is practically flat; solidifying the bump material bodies by thermally processing the bump material bodies; and fixing the semiconductor light emitting element and the board through the bumps.
    Type: Application
    Filed: February 24, 2010
    Publication date: September 2, 2010
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Satoshi Wada, Miki Moriyama, Koichi Goshonoo
  • Patent number: 7781339
    Abstract: A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 ?m or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: August 24, 2010
    Assignee: Kobe Steel, Ltd.
    Inventors: Takashi Onishi, Mikako Takeda, Masao Mizuno, Susumu Tsukimoto, Tatsuya Kabe, Toshifumi Morita, Miki Moriyama, Kazuhiro Ito, Masanori Murakami
  • Patent number: 7723743
    Abstract: A semiconductor light emitting element has an electrode formed on a semiconductor layer, a passivation film covering a part of a top surface of the electrode, and a multilayer film formed on the electrode. The multilayer film has at least one pair of a Ti layer and a Ni layer, the Ti layer and the Ni layer being stacked alternately in the multilayer film.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: May 25, 2010
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kosuke Yahata, Koichi Goshonoo, Miki Moriyama
  • Publication number: 20100078649
    Abstract: A light emitting element which emits light of a wavelength, includes a substrate which is transparent to the wavelength of emitted light and includes a first surface and a second surface; a semiconductor layer stacked on the first surface; a first electrode which is reflective to the wavelength of emitted light and formed on a surface of the semiconductor layer, wherein electrical resistance of the first electrode in a farthest distance is equal to or smaller than 1?; and a second electrode which is reflective to the wavelength of emitted light and formed on the second surface, wherein electrical resistance of the second electrode in a farthest distance is equal to or smaller than 1?.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 1, 2010
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Miki Moriyama, Koichi Goshonoo
  • Publication number: 20100078672
    Abstract: Provided is a method for producing a Group III nitride semiconductor light-emitting device including a GaN substrate serving as a growth substrate, which method realizes processing of the GaN substrate to have a membrane structure at high reproducibility. In the production method, a stopper layer of AlGaN having an Al compositional proportion of 20% is formed on the top surface of a GaN substrate; an n-type layer, an active layer, a p-type layer, and a p-electrode are sequentially formed on the stopper layer; and the p-electrode is joined to a support substrate. Subsequently, a mask having a center-opening pattern is formed on the bottom surface of the GaN substrate, and the bottom surface is subjected to PEC etching. The bottom surface is irradiated with light having a wavelength corresponding to an energy higher than the band gap of GaN, but lower than the band gap of AlGaN having an Al compositional proportion of 20%.
    Type: Application
    Filed: September 30, 2009
    Publication date: April 1, 2010
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Miki Moriyama, Koichi Goshonoo
  • Publication number: 20100078660
    Abstract: An n-type layer of a light-emitting device has a structure in which a first n-type layer, a second n-type layer and a third n-type layer are sequentially laminated in this order on a sapphire substrate, and an n-electrode composed of V/Al is formed on the second n-type layer. The first n-type layer and the second n-type layer are n-GaN, and the third n-type layer is n-InGaN. The n-type impurity concentration of the second n-type layer is higher than that of the first n-type layer and the third n-type layer.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 1, 2010
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Miki Moriyama, Koichi Goshonoo
  • Publication number: 20100062558
    Abstract: When a p-layer 4 composed of GaN is maintained at ordinary temperature and TNO is sputtered thereon by an RF magnetron sputtering method, a laminated TNO layer 5 is in an amorphous state. Then, there is included a step of thermally treating the amorphous TNO layer in a reduced-pressure atmosphere where hydrogen gas is substantially absent to thereby crystallize the TNO layer. At the sputtering, an inert gas is passed through together with oxygen gas, and volume % of the oxygen gas contained in the gas passed through is 0.10 to 0.15%. In this regard, oxygen partial pressure is 5×10?3 Pa or lower. The temperature of the thermal treatment is 500° C. for about 1 hour.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 11, 2010
    Applicants: TOYODA GOSEI CO., LTD., Kanagawa Academy of Science and Technology
    Inventors: Koichi Goshonoo, Miki Moriyama, Taro Hitosugi, Tetsuya Hasegawa, Junpei Kasai
  • Publication number: 20100035082
    Abstract: There have been demands for transparent electrode materials and magnetic materials, each having a wide range of applications. In view of the situations, a novel functional device and a method for forming an oxide material are provided. A functional device includes an AlxGayInzN layer (wherein 0?x?1, 0?y?1, and 0?z?1) and an oxide material layer composed of a metal oxide and formed on the AlxGayInzN layer. The metal oxide may be TiO2. The present invention provides a functional device that includes a group III nitride layer having excellent physical and chemical properties and a film integrally formed thereon. The film reflects less light at the interface and has chemical resistance and high durability.
    Type: Application
    Filed: January 6, 2006
    Publication date: February 11, 2010
    Inventors: Taro Hitosugi, Yutaka Furubayashi, Tetsuya Hasegawa, Yasushi Hirose, Junpei Kasai, Miki Moriyama
  • Publication number: 20090200563
    Abstract: Provided is a method for producing a Group III nitride semiconductor light-emitting device including a GaN substrate serving as a growth substrate, which method facilitates tapering of a bottom portion of the GaN substrate. In the production method, firstly, a Group III nitride semiconductor layer, an ITO electrode, a p-electrode, and an n-electrode are formed on the top surface of a GaN substrate through MOCVD. Thereafter, the GaN substrate is thinned through mechanical polishing of the bottom surface thereof, and then scratches formed by mechanical polishing are removed through chemical mechanical polishing, to thereby planarize the bottom surface. Subsequently, a mask is formed on the bottom surface of the GaN substrate, followed by wet etching with phosphoric acid. By virtue of anisotropy in etching of GaN with phosphoric acid, a tapered surface is exposed so as to be inclined by about 60° with respect to the GaN substrate.
    Type: Application
    Filed: February 10, 2009
    Publication date: August 13, 2009
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Koichi Goshonoo, Miki Moriyama
  • Patent number: 7564062
    Abstract: A p-type electrode containing a first electrode material exhibiting an eutectic reaction at a temperature of 600° C. or lower, and a second electrode material of aluminum (Al).
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: July 21, 2009
    Assignee: Toyoda Gosei, Co., Ltd.
    Inventors: Tomohiro Sakai, Miki Moriyama, Masanori Murakami, Naoki Shibata
  • Patent number: 7550782
    Abstract: In a semiconductor device in which a group III nitride compound semiconductor layer is formed without a low temperature grown buffer layer provided on an undercoat layer formed by a metal nitride layer, the metal nitride layer is formed of reddish brown titanium nitride. The reddish brown titanium nitride can be obtained by causing nitrogen to be rich in the titanium nitride.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: June 23, 2009
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanori Murakami, Teppei Watanabe, Susumu Tsukimoto, Kazuhiro Ito, Jun Ito, Miki Moriyama, Naoki Shibata
  • Patent number: 7538027
    Abstract: There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 ?m, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: May 26, 2009
    Assignee: Kobe Steel, Ltd.
    Inventors: Takashi Onishi, Masao Mizuno, Mikako Takeda, Susumu Tsukimoto, Tatsuya Kabe, Toshifumi Morita, Miki Moriyama, Kazuhiro Ito, Masanori Murakami
  • Publication number: 20090104757
    Abstract: An object of the present invention is to remove micro-scratches on a surface of a GaN substrate cut from a GaN ingot. The invention is directed to establish a method for surface treatment of a GaN substrate, including heating the surface in an atmosphere containing trimethylgallium, ammonia, and hydrogen. It is preferable that the trimethylgallium feeding rate is 150 ?mol/min or higher, the ratio of trimethylgallium feeding rate to ammonia feeding rate (V/III ratio) is 1,200 to 4,000, and the heating temperature is 1,000° C. to 1,250° C. In addition, the temperature of the surface treatment is set to be higher than that of the following GaN growth, and the feed rate of trimethylgallium is lower than that of the growth procedure. RMS of roughness on the substrate was equal to or less than 1.3 nm, and the substrate whose step condition is excellent can be obtained.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 23, 2009
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Masato Aoki, Miki Moriyama
  • Publication number: 20090072267
    Abstract: Provided is a GaN-based semiconductor light-emitting device which does not require an external constant-current circuit. The light-emitting device of the present invention includes a sapphire substrate; an AlN buffer layer formed on the substrate; and an HEMT structure formed on the buffer layer, the HEMT structure including a GaN layer and an Al0.2Ga0.8N layer. On the Al0.2Ga0.8N layer are sequentially formed an n-GaN layer, an MQW light-emitting layer including an InGaN well layer and an AlGaN barrier layer, and a p-GaN layer. A source electrode and an HEMT/LED connection electrode are formed on an exposed portion of the Al0.2Ga0.8N layer. The HEMT/LED connection electrode serves as both the corresponding drain electrode and an electrode for injecting electrons into the n-GaN layer. An ITO transparent electrode is formed on the top surface of the p-GaN layer, and a gold pad electrode is formed on a portion of the top surface of the transparent electrode.
    Type: Application
    Filed: September 15, 2008
    Publication date: March 19, 2009
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Koichi Goshonoo, Miki Moriyama
  • Publication number: 20080308833
    Abstract: The refractive index of a titanium oxide layer is modified by adding an impurity (e.g., niobium (Nb)) thereto within a range where good electrical conductivity is obtained. The Group III nitride-based compound semiconductor light-emitting device of the invention includes a sapphire substrate, an aluminum nitride (AlN) buffer layer, an n-contact layer, an n-cladding layer, a multiple quantum well layer (emission wavelength: 470 nm), a p-cladding layer, and a p-contact layer. On the p-contact layer is provided a transparent electrode made of niobium titanium oxide and having an embossment. An electrode is provided on the n-contact layer. An electrode pad is provided on a portion of the transparent electrode. Since the transparent electrode is formed from titanium oxide containing 3% niobium, the refractive index with respect to light (wavelength: 470 nm) becomes almost equal to that of the p-contact layer.
    Type: Application
    Filed: May 23, 2008
    Publication date: December 18, 2008
    Applicants: TOYODA GOSEI CO., LTD., KANAGAWA ACADEMY OF SCIENCE AND TECHNOLOGY
    Inventors: Miki Moriyama, Koichi Goshonoo, Taro Hitosugi, Tetsuya Hasegawa
  • Publication number: 20080293231
    Abstract: A method for forming an electrode for Group-III nitride compound semiconductor light-emitting devices includes a step of forming a first electrode layer having an average thickness of less than 1 nm on a Group-III nitride compound semiconductor layer, the first electrode layer being made of a material having high adhesion to the Group-III nitride compound semiconductor layer or low contact resistance with the Group-III nitride compound semiconductor layer and also includes a step of forming a second electrode layer made of a highly reflective metal material on the first electrode layer.
    Type: Application
    Filed: March 26, 2008
    Publication date: November 27, 2008
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Koichi Goshonoo, Miki Moriyama
  • Publication number: 20080248639
    Abstract: An undoped GaN layer having a thickness of 3 ?m is formed by MOVPE on a sapphire substrate with a buffer layer composed of aluminum nitride (AlN) therebetween. A GaN layer doped with 5×1019/cm3 of Mg and having a thickness of 100 nm is formed thereon. An ITO film having a thickness of 300 nm is formed by vacuum evaporation (EB). The wafer is kept in nitrogen at 700° C. for 5 minutes so as to reduce the resistance of the GaN layer doped with 5×1019/cm3 of Mg and having a thickness of 100 nm, so that a p-GaN layer is obtained. A FeCl3 aqueous solution is prepared, and the ITO film is removed. In this manner, a surface of the p-GaN layer having reduced resistance is exposed. The hole concentration is 4.3×1017/cm3. The resistivity is 3.0 ?cm.
    Type: Application
    Filed: March 26, 2008
    Publication date: October 9, 2008
    Applicant: TOYODA GOSEI CO., LTD.
    Inventor: Miki Moriyama
  • Publication number: 20080014743
    Abstract: A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 ?m or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.
    Type: Application
    Filed: June 19, 2007
    Publication date: January 17, 2008
    Applicant: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel, Ltd.)
    Inventors: Takashi Onishi, Mikako Takeda, Masao Mizuno, Susumu Tsukimoto, Tatsuya Kabe, Toshifumi Morita, Miki Moriyama, Kazuhiro Ito, Masanori Murakami