Patents by Inventor Mikio Shiraishi
Mikio Shiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6334686Abstract: A display optical unit and apparatus in which the optical axis of a projection lens is shifted from the optical axis of an illumination unit and light splitter. The projection lens is attachable and detachable in a direction in which the optical axes are shifted from each other. A light valve or a polarizer is cooled by cooling winds blown by a cooling device to the light valve or polarizer through a plurality of wind supply openings are arranged in directions different from one another and within the range of 45 degrees to 315 degrees so as to enable cooling of the display optical unit.Type: GrantFiled: September 9, 1999Date of Patent: January 1, 2002Assignee: Hitachi, Ltd.Inventors: Mikio Shiraishi, Nobuyuki Kaku, Fukuyasu Abe, Kenji Fuse, Nobuo Masuoka, Tatsuo Morita
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Publication number: 20010043312Abstract: An optical equipment having a discharge lamp for supplying light, and first, second and third light valves for projecting the light from the equipment, having an air intake opening arranged on one side of the equipment, a ventilation device associated with the air intake opening so as to draw in air from outside of the equipment through the air intake opening and a ventilation path arranged between an outlet of the ventilation device and the first, second and third light valves. The ventilation path includes a plurality of partition members which divide the ventilation path into first, second and third air flow paths so as to cool the first, second and third light valves respectively by air from the ventilation device.Type: ApplicationFiled: July 25, 2001Publication date: November 22, 2001Inventors: Kenji Fuse, Mikio Shiraishi, Yasuo Otsuka, Nobuyuki Kaku, Hidehiro Ikeda
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Publication number: 20010033345Abstract: For obtaining both high brightness under condition of small-sized and simplified structure and suppression of increase in temperature of liquid crystal display elements and polarizing elements, in a liquid crystal display apparatus, comprising: a liquid crystal display element 2 for converting light from a light source into display picture depending on a driving signal; an optical projection system 1b containing a first optical element 1a and for projecting said light signal toward an object of projection; exit side polarizing elements 3b; a holding member 6 for holding them with the liquid crystal display element 2; and cooling medium 5; incident side polarizing elements 3a, wherein, a space is defined by either one of the incident side polarizing elements 3a and the liquid crystal display element 2, the first optical element 1a, between the liquid crystal display element 2 and the first optical element 1a, and the holding member 6, and said space is filled up with the cooling medium 5.Type: ApplicationFiled: June 22, 2001Publication date: October 25, 2001Applicant: Hitachi, Ltd.Inventors: Toru Numata, Yasuo Otsuka, Mikio Shiraishi, Koji Hirata, Naoyuki Ogura, Shigeru Inaoka, Kazunari Nakagawa, Shigeru Mori, Masahiko Yatsu
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Publication number: 20010019397Abstract: In order to prevent dust from sticking to the LCD panel, to prevent the LCD panel from being heated and to suitably adjust the position of the LCD panel, a duct is provided between cooling means for a light source and cooling means for a LCD panel to send cooling air from the LCD panel side to the light source side. Therefore, a light incidence/reflection plane of the LCD panel is disposed in an almost hermetically closed space and an optical path from an integrator lens to the LCD panel is formed in the almost hermetically closed space.Type: ApplicationFiled: March 27, 2001Publication date: September 6, 2001Applicant: Hitachi, Ltd.Inventors: Mikio Shiraishi, Yasuo Otsuka, Toru Numata
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Patent number: 6280038Abstract: In optical equipment, such as a liquid crystal projector, a discharge lamp supplies light through a light valve device to project a light beam on a screen. A cooling system is provided to cool the light valve device, including a ventilation device, such as a centrifugal fan, for drawing in air through an air intake opening in the case of the optical equipment and an air flow path for supplying the drawn in air to the light valve device along plural paths. For this purpose, guide members are provided in the air flow path to divide and direct the air flow to individual parts of the light valve device along the plural paths.Type: GrantFiled: July 6, 1999Date of Patent: August 28, 2001Assignee: Hitachi, Ltd.Inventors: Kenji Fuse, Mikio Shiraishi, Yasuo Otsuka, Nobuyuki Kaku, Hidehiro Ikeda
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Patent number: 6256083Abstract: For obtaining both high brightness under condition of small size and simplified structure, and for achieving suppression of increase in temperature of liquid crystal display elements and polarizing elements in a liquid crystal display apparatus, a liquid crystal display element converts light from a light source into a display picture depending on a driving signal, and an optical projection system contains a first optical element and projects a light signal toward an object of projection. A space is defined by an incident side polarizing element or the liquid crystal display element, the first optical element and a holding member, and the space is filled up with a cooling medium.Type: GrantFiled: October 8, 1998Date of Patent: July 3, 2001Assignee: Hitachi, Ltd.Inventors: Toru Numata, Yasuo Otsuka, Mikio Shiraishi, Koji Hirata, Naoyuki Ogura, Shigeru Inaoka, Kazunari Nakagawa, Shigeru Mori, Masahiko Yatsu
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Patent number: 6231191Abstract: In order to prevent dust from sticking to the LCD panel, to prevent the LCD panel from being heated and to suitably adjust the position of the LCD panel, a duct is provided between cooling means for a light source and cooling means for a LCD panel to send cooling air from the LCD panel side to the light source side. Therefore, a light incidence/reflection plane of the LCD panel is disposed in an almost hermetically closed space and an optical path from an integrator lens to the LCD panel is formed in the almost hermetically closed space.Type: GrantFiled: October 13, 1998Date of Patent: May 15, 2001Assignee: Hitachi, Ltd.Inventors: Mikio Shiraishi, Yasuo Otsuka, Toru Numata
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Patent number: 6181664Abstract: A disk apparatus for use in a disk cartridge system including different types of disk cartridge. The disk cartridge system has a first disk cartridge and a second disk cartridge. The first disk cartridge including a first case having a substantially rectangular shape with first, second, third and fourth edges, and at least one of a first groove in both of the second and third edges, and a first cutout portion in both of the second and third edges and passing through a thickness of the first case. The second disk cartridge includes a second case having a substantially rectangular shape with fifth, sixth, seventh and eighth edges, the fifth edge of the second case being delimited by a fifth corner portion connecting the fifth edge and sixth edge, and at least one of a second groove located in only one of the sixth and seventh edges and a second cutout portion located in both of the sixth and seventh edges without passing through a thickness of the second case.Type: GrantFiled: March 14, 2000Date of Patent: January 30, 2001Assignee: Hitachi, Ltd.Inventors: Kiyoshi Kano, Yasuo Ohtsuka, Mikio Shiraishi, Toshifumi Takeuchi, Masafumi Nakamura, Masayuki Inoue, Yoshio Suzuki, Michio Miura
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Patent number: 6108299Abstract: A disk cartridge system having different types of disk cartridges for use in a disk cartridge drive apparatus. A first disk cartridge includes a first case having a substantially rectangular shape with first, second, third and fourth edges, the first edge of the case being delimited by a first corner portion connecting the first edge and second edge and a second corner portion connecting the first edge and the third edge, the first case having a first cutout portion at both of the second and third edges and extending in a direction and passing through a thickness of the first case, and a first disk being housed in the first case.Type: GrantFiled: September 21, 1999Date of Patent: August 22, 2000Assignee: Hitachi, Ltd.Inventors: Kiyoshi Kano, Yasuo Ohtsuka, Mikio Shiraishi, Toshifumi Takeuchi, Masafumi Nakamura, Masayuki Inoue, Yoshio Suzuki, Michio Miura
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Patent number: 6075763Abstract: A disk cartridge system including different types of disk cartridges for use in a cartridge drive apparatus, including first and second disk cartridges. The first disk cartridge including a first case having a substantially rectangular shape with first, second, third and fourth edges, the first edge of the case being delimited by a first corner portion connecting the first edge and second edge and a second corner portion connecting the first edge and the third edge. The first case has a first groove at a side plane of both of the second and third edges. The first case also has a first cutout portion at both of the second and the third edges and extending in a direction of and passing through the thickness of the first case.Type: GrantFiled: September 21, 1999Date of Patent: June 13, 2000Assignee: Hitachi, Ltd.Inventors: Kiyoshi Kano, Yasuo Ohtsuka, Mikio Shiraishi, Toshifumi Takeuchi, Masafumi Nakamura, Masayuki Inoue, Yoshio Suzuki, Michio Miura
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Patent number: 5991872Abstract: Microprocessors use a conditional branch instruction so as to change processing in accordance with conditions. According to the prior art, a NOP instruction, which causes no operation, is used when a condition is satisfied, and the use of the NOP instruction inevitably lengthens the processing time. According to the present invention, a conditional transfer instruction is included in the instruction set of a microprocessor, and a flag decoder is additionally employed. The flag decoder determines whether a condition is satisfied or not, and outputs a control signal on the basis of the determination. The control signal is supplied to the instruction decoder of the processor to make a data transfer operation effective or ineffective. Accordingly, it is not necessary to use a NOP instruction, and the processing time can be as short as possible.Type: GrantFiled: October 9, 1997Date of Patent: November 23, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Mikio Shiraishi, Masaki Saitou, Yuji Okuda
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Patent number: 5991260Abstract: A disk cartridge and a disk device for receiving the disk cartridge to enable recording and/or reproducing of information from or on a disk housed within the disk cartridge. The disk cartridge includes a disk in which information is recorded and/or reproduced, a case for housing the disk which case has opposite faces including a window in a respective face for exposing a part of the disk therethrough. A shutter is mounted with respect to the case so as to open or close a window of a respective face of the case with the shutter being movable in opposite directions with respect to the window from a position in which the window is closed to a position in which the window is open. The disk cartridge may include an openable part of the case for enabling the disk to be taken in and out of the case through the openable part thereof and a discrimination arrangement for enabling discrimination of different types of disk cartridges from one another.Type: GrantFiled: February 20, 1996Date of Patent: November 23, 1999Assignee: Hitachi, Ltd.Inventors: Kiyoshi Kano, Yasuo Ohtsuka, Mikio Shiraishi, Toshifumi Takeuchi, Masafumi Nakamura, Masayuki Inoue, Yoshio Suzuki, Michio Miura
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Patent number: 5978925Abstract: In a pipelined processor, when a conditional branch is effected in accordance with a state of calculation generated by immediately previous instruction, it is necessary for a conventional technique to insert a NOP (no operation) instruction before a conditional branch instruction. This lowers the processing efficiency. In order to solve this problem, a delay circuit generates a clock signal .phi.' which is supplied to a program counter and an instruction memory. The clock signal .phi.' is delayed behind a system clock .phi.. This obviates the need to insert such a NOP instruction and the processing efficiency is improved.Type: GrantFiled: November 26, 1997Date of Patent: November 2, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Mikio Shiraishi, Masaki Saitou, Yuji Okuda
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Patent number: 5957996Abstract: The present invention provides a digital data comparator having a first selective data inverting circuit inverting a first input data when the sign of the first input data is negative, or outputting the first input data when the sign is positive, a first adding circuit coupled to an output of the first selective data inverting circuit, adding one to the least significant bit when the sign of the first input data is negative, or outputting the first input data when the sign is positive, a second selective data inverting circuit inverting a second input data when the sign of the second input data is positive, or outputting the second input data when the sign is negative, and a second adding circuit adding an output of the first adding circuit and an output of the second selective data inverting circuit.Type: GrantFiled: December 1, 1997Date of Patent: September 28, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Shiraishi
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Patent number: 5944771Abstract: In an arithmetic operation circuit, a coincidence detector receives the sign bits of binary data so as to output a truth coincidence detection signal when the two sign bits coincide with each other, and to output a false coincidence detection signal when they do not coincide with each other. A data inverter outputs a logic-inverted signal of each bit of the data when the coincidence detection result is truth, and outputs a signal equal to the data when the coincidence detection result is false. An adder receives the coincidence detection signal as a carry signal, and outputs the sum of the data and the output from the data inverter. A flag generator receives the sign bit of the data and the sign bit of the sum from the adder, and selectively outputs the sign bit or its inverted bit.Type: GrantFiled: September 11, 1997Date of Patent: August 31, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Shiraishi
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Patent number: 5909386Abstract: In a multi-bit adder, the circuit for calculating each bit of sum output is composed of switch circuits arranged regularly, input signals of corresponding bits are entered in the individual switch circuits, and a carry input signal C.sub.i is inputted instead of carry signal C.sub.k of each bit, so that the propagation of the carry signal between the bits is eliminated. As a result, the sum output is delivered in a short time after change of carry input signal C.sub.i.Type: GrantFiled: December 18, 1996Date of Patent: June 1, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Shiraishi
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Patent number: 5905662Abstract: A digital processing system for binary addition/subtraction includes an adder for adding two binary data respectively expressed by two's complements to output the addition result, an overflow carry detector for outputting an overflow carry signal indicating an overflow carry of the addition result, an exclusive OR gate for outputting the sign bit of the addition result of the adder with or without inversion, and a register for storing the output from the exclusive OR gate.Type: GrantFiled: September 11, 1997Date of Patent: May 18, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Shiraishi
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Patent number: 5805312Abstract: An image copying system is disclosed which has a thermal head energized at a strobe current supply time rate corresponding to a current head temperature according to a preset strobe current supply time rate control characteristics. In copying operation at a standard speed, a read sensor 211 reads an image by performing N main scans in one sub scan. A signal processor 221 validates the image signal thus read once every N scans according to a selection signal from a mode control circuit 401. A record circuit 311 having a thermal head performs one main scan every sub scan. During a copying operation at a speed N times the standard speed, the sub scan speed is made N times and the read sensor 211 reads the image by performing one main scan every sub scan and the signal processor 221 makes the read image signal always valid by the selection signal. The record device 311 performs one main scan every sub scan. A single A/D converter is used for A/D converting head temperature as well as other output signal.Type: GrantFiled: July 26, 1994Date of Patent: September 8, 1998Assignee: Hitachi, Ltd.Inventors: Naohiro Ozawa, Yasuo Otsuka, Akihiko Asada, Toyota Honda, Mikio Shiraishi, Yasuyuki Kojima, Toshio Tanizoe, Hiroshi Minoda, Akira Shimizu
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Patent number: 5521856Abstract: An AND gate inputs the most significant bit of a lower word of an multiplicand or "0" to an input terminal of the least significant bit of Booth's decoders to which an upper word of the multiplicand is inputted based on a control signal. An AND gate replaces a part of a partial products with "0" based on the control signal. A selector replaces other part of the partial products with partial products of the lower bits than the other part of the partial products. Whereby, a plurality of pairs of data can be multiplied at one time.Type: GrantFiled: October 20, 1994Date of Patent: May 28, 1996Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Shiraishi
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Patent number: 5412588Abstract: Upon receipt of the sine (sin .omega.) or the cosine (cos .omega.) of a digital angular frequency, a multiplier performs predetermined arithmetic operations of multiplication on it. An output of the multiplier is stored in a register. An adder-subtracter performs arithmetic addition or subtraction of the output of the register and an output of the multiplier. The arithmetic results are stored in first and second registers or third and fourth registers. The arithmetic operations performed by the multiplier include arithmetic multiplication of outputs (initial values) of the third and fourth registers by the sine or cosine of the digital angular frequency and arithmetic multiplication of the results of arithmetic operations by the adder-subtracter stored in the first and second registers or the third and fourth registers by the sine or cosine of the digital angular frequency.Type: GrantFiled: December 17, 1993Date of Patent: May 2, 1995Assignee: Kabushiki Kaisha ToshibaInventor: Mikio Shiraishi