Abstract: The present invention relates to a polyester resin composition, a preparation method thereof and use thereof. The polyester resin composition includes a PCT resin, a white pigment, a reinforcing material, a polyester elastomer, and other additives. The polyester resin composition provided by the present invention has a strong binding force with a silica gel; when the polyester resin composition is made into an LED reflecting support, the LED reflecting support is not easy to separate from the silica gel in high temperature and high humidity environments, such that the service life of an LED lamp bead can be effectively prolonged; and meanwhile, the polyester resin composition has good toughness, and would not cause the problem of powder falling under repeated stress.

Abstract: A crossbeam for measuring deformation velocities of a surface of a material under a dynamic load includes a crossbeam body, a first type of velocimeter and a second type of velocimeter-mounted on the crossbeam body. The crossbeam body is mounted on a measurement carrier. The measurement carrier is configured to move along the surface of the material and apply a dynamic load to the surface. The first type of velocimeter is configured to measure the vertically resilient deformation velocity of the surface behind an action force of the dynamic load. The second type of velocimeter is configured to measure the vertical downward deformation velocity of the surface in front of the action force of the dynamic load. The vertically resilient deformation velocity and the vertically downward deformation velocity of the surface can be simultaneously and quickly obtained by the first and second types of velocimeters.

Abstract: A method for detecting a deflection basin based on a deformation velocity of a pavement under a rolling load is provided.

Abstract: A precision three-dimensional pavement faulting measurement method includes: acquiring three-dimensional pavement contour data; based on the three-dimensional pavement contour data, obtaining a contour reference surface and a contour deviation between measuring points in the three-dimensional pavement contour data and the contour reference surface; based on the contour deviation, obtaining a suspected joint point; based on the suspected joint point, obtaining a suspected joint denoised binary image; based on a row direction projection feature of target measuring points in the suspected joint denoised binary image, obtaining an original joint target image and a joint representative position; based on the suspected joint denoised binary image, the original joint target image, and the joint representative position, obtaining a target joint binary image by means of a joint extension operation; and based on the target joint binary image and the three-dimensional pavement contour data, obtaining pavement faulting i

Abstract: The invention discloses a flame-retardant semi-aromatic polyamide derived from the following monomers: a diacid monomer A: where A1 is terephthalic acid or terephthalic acid and other diacid, terephthalic acid accounts for 50 to 100 mol % of A1, and A2 is [(6-oxido-6H-dibenzo-(c,e)(1,2)-oxaphosphorin-6-ketone)-methyl]-butanedioic acid, A1+A2=100 mol %, A1=90 to 99 mol %, A2=1 to 10 mol %; and diamine monomer B: one or more of diamine monomers containing 4 to 36 carbon atoms. In the present invention, by an in situ polymerization, a specific flame-retardant monomer [(6-oxido-6H-dibenzo-(c,e)(1,2)-oxaphosphorin-6-ketone)-methyl]-butanedioic acid is copolymerized in a semi-aromatic polyamide chain segment, excellent mechanical properties and low water absorption can be obtained.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack over a substrate. The substrate has a base and a multilayer structure over the base, and the gate stack wraps around the multilayer structure. The method includes partially removing the multilayer structure, which is not covered by the gate stack. The multilayer structure remaining under the gate stack forms a multilayer stack, and the multilayer stack includes a sacrificial layer and a channel layer over the sacrificial layer. The method includes partially removing the sacrificial layer to form a recess in the multilayer stack. The method includes forming an inner spacer layer in the recess and a bottom spacer over a sidewall of the channel layer. The method includes forming a source/drain structure over the bottom spacer. The bottom spacer separates the source/drain structure from the channel layer.

Abstract: The disclosure discloses a method and application for rapid and accurate chromosomal location of economic traits in laver, belonging to the fields of genomics and molecular breeding, wherein comprising the following steps: distinguishing the different genotype sectors by the color difference of pigment mutants, releasing monospores based on the asexual reproduction of single-genotype sectors, forming offspring CMD population; performing QTL-seq analysis on the extreme phenotype pools of offspring CMD population by SNP/InDel markers; and combining KASP and RNA-seq to predict the location of the genes of discrete traits or major QTL. The disclosure may solve the problem of difficulty in genetic analysis of various traits caused by the genotypic chimeric haploid characteristics.

Abstract: A method for reducing traffic of a bootstrap procedure in G3-PLC networks includes: a network domain having a first relay node (LBA); and a first external node (LBD) and enabling a beacon request transmission trickle mechanism according to a network domain search request (ADPM-DISCOVERY.request) instruction; wherein after the first relay node receives a first beacon request, the first relay node enables a beacon transmission trickle mechanism according to the first beacon request.

Abstract: Disclosed is a furan diacid-based polyamide resin, which is derived from the following repeating units: (A) 2,5-furandicarboxylic acid, (B) 1,4-cyclohexanedicarboxylic acid, and (C) 1,10-decanediamine, where based on the total molar percentage of the diacid units, (A) accounts for 5-45 mol % of the diacid units.

Abstract: The present application provides a pavement technical condition detection method and device based on a three-dimensional contour. The method includes: acquiring three-dimensional contour data and grayscale data of a pavement on the basis of a line scanning three-dimensional measurement sensor; preprocessing the three-dimensional contour data and the grayscale data, where the preprocessing includes performing three-dimensional modeling according to the three-dimensional contour data to acquire three-dimensional modeling data and correcting the grayscale data; and extracting a key contour of each cross section in the three-dimensional modeling data, and performing pavement technical condition index detection on the pavement according to the three-dimensional modeling data, the key contour, and the corrected grayscale data to acquire a technical condition index of the pavement.

Abstract: The present invention discloses a furan diacid-based polyamide, which is derived from the following repeating units: (A) 2,5-furandicarboxylic acid, (B) 1,4-cyclohexanedicarboxylic acid, and (C) 1,5-pentanediamine, where based on the total molar percentage of the diacid units, (A) accounts for 10-45 mol % of the diacid units. The furan diacid-based polyamide of the present invention has a melting point of 291-335° C.

Abstract: The disclosed circuit includes a first and a second active region (AR) spaced a spacing S along a direction in a first standard cell (SC) that spans Dl along the direction between a first and a second cell edge (CE). Each of the first and second ARs spans a first width W1 along the direction; a third and a fourth AR spaced S in a second SC that spans a second dimension Ds along the direction between a third and a fourth CE; and gate stacks extend from the fourth CE of the second SC to the first CE of the first SC, wherein Ds<Dl; each of the third and fourth ARs spans a second width W2 along the direction; W2<W1; and the third CE is aligned with and contacts the second CE. The first and second ARs have a structure different from the third and fourth ARs.

Abstract: The disclosed circuit includes a first and a second active region (AR) spaced a spacing S along a direction in a first standard cell (SC) that spans Dl along the direction between a first and a second cell edge (CE). Each of the first and second ARs spans a first width W1 along the direction; a third and a fourth AR spaced S in a second SC that spans a second dimension Ds along the direction between a third and a fourth CE; and gate stacks extend from the fourth CE of the second SC to the first CE of the first SC, wherein Ds<Dl; each of the third and fourth ARs spans a second width W2 along the direction; W2<W1; and the third CE is aligned with and contacts the second CE. The first and second ARs have a structure different from the third and fourth ARs.

Abstract: The present disclosure provides a method of forming a semiconductor structure. The method includes providing a semiconductor substrate and forming a patterned metal structure on the semiconductor substrate, wherein the patterned metal structure includes a first metal layer and a second metal layer deposited in a single deposition step. The method further includes etching a portion of the second metal layer thereby forming a metal plug in the second metal layer, the first metal layer of the patterned metal structure having a first metal feature underlying and contacting the metal plug.

Abstract: The present disclosure provides a method of forming a semiconductor structure. The method includes providing a semiconductor substrate and forming a patterned metal structure on the semiconductor substrate, wherein the patterned metal structure includes a first metal layer and a second metal layer deposited in a single deposition step. The method further includes etching a portion of the second metal layer thereby forming a metal plug in the second metal layer, the first metal layer of the patterned metal structure having a first metal feature underlying and contacting the metal plug.

Abstract: Systems, computer program products, and methods are described herein for component-level threat assessment in a computing environment. The present disclosure is configured to capture state information associated with a computing environment; determine correlation measures for the components in the computing environment based on at least the state information; determine threat vectors associated with the components; determine mitigation protocols to be implemented on the components in response to an incidence of the threat vectors on the components; determine a first sequence in which the mitigation protocols are to be implemented based on at least the correlation measures for the components; and implement the mitigation protocols on the components in the first sequence to reduce a propagation effect of the threat vectors across the computing environment.

Abstract: An integrated circuit includes a first diffusion area for a first type transistor. The first type transistor includes a first drain region and a first source region. A second diffusion area for a second type transistor is separated from the first diffusion area. The second type transistor includes a second drain region and a second source region. A gate electrode continuously extends across the first diffusion area and the second diffusion area in a routing direction. A first metallic structure is electrically coupled with the first source region. A second metallic structure is electrically coupled with the second drain region. A third metallic structure is disposed over and electrically coupled with the first and second metallic structures. A width of the first metallic structure is substantially equal to or larger than a width of the third metallic structure.

Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a second contact feature over the first contact feature, a barrier layer between the second dielectric layer and the second contact feature, and a liner between the barrier layer and the second contact feature. An interface between the first contact feature and the second contact feature includes the liner but is free of the barrier layer.

Abstract: Access entitlement decisioning for a network-based application occurs dynamically at the time of access request based on current scenario indicators. In addition to determining whether a user should be granted access/entitlement, in certain instances, the current scenario indicators are relied upon to determine the level of entitlement/access (i.e., less or more than standard access) and the period for enforcing the determined access/entitlement. The current scenario indicators may be associated with the user, the application and/or the computing environment and are indicative of a heightened awareness for the occurrence of potential deceptive events or the likelihood for inefficiencies in use of the application and/or computing environment.