Patents by Inventor Min Cheng

Min Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250146516
    Abstract: A method for fault diagnosis of a pressure sensor of an electro-hydraulic system with an explicit controller and an implicit controller in parallel is provided. The method may include receiving parameter information of the electro-hydraulic system; estimating a first chamber pressure of the hydraulic actuator online by utilizing a second chamber pressure of the hydraulic actuator; obtaining valve opening signals of the explicit controller and the implicit controller in a valve controller; converting the valve opening signals are difference-calculated to obtain two residual signals; and the residuals of an independent metering valve 1 and an independent metering valve 2 are compared with a preset threshold, respectively, to identify whether the independent metering valve 1 and the independent metering valve 2 are faulty or not. The method is simple to operate, has a fast response time and low cost for troubleshooting, and improves the diagnostic accuracy and coverage of the electro-hydraulic system.
    Type: Application
    Filed: October 12, 2024
    Publication date: May 8, 2025
    Applicants: EAST CHINA JIAOTONG UNIVERSITY, CHONGQING UNIVERSITY
    Inventors: Gang LI, Diancheng CHEN, Ruqi DING, Min CHENG, Liqiu LIAO, Zhanchao HE, Guoliang HU, Qianjie LIU, Liping ZENG
  • Patent number: 12291646
    Abstract: Photocurable (meth)acrylate compositions for forming features on the surfaces of membranes, and particularly, on membranes used in osmosis and reverse-osmosis applications, such as membrane filters.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: May 6, 2025
    Assignee: Henkel AG & Co. KGAA
    Inventors: Shuhua Jin, Chih-Min Cheng
  • Patent number: 12287825
    Abstract: Embodiments of the present invention provide computer-implemented methods, computer program product, and computer systems. One or more processors assign an identifier that specifies a number of resources and a category associated with a respective image layer of a plurality of image layers. One or more processors, in response to receiving a user request, identify image layers of the plurality of image layers that match the identifier based on dependencies between the plurality of image layers. One or more processors can retrieve matched layers based on the functionality of respective image layers and the dependencies of those respective image layers.
    Type: Grant
    Filed: December 27, 2023
    Date of Patent: April 29, 2025
    Assignee: International Business Machines Corporation
    Inventors: Hao Wu, Xiao Ling Chen, Si Yu Chen, Lu Yan Li, Min Cheng, Wen Qi Wq Ye, Xiao Xuan Fu
  • Publication number: 20250111819
    Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a driving circuit arranged on the base substrate. The driving circuit includes multiple denoising transistors and multiple transistors for driving, and the denoising transistors are electrically connected to a pull-up node. A length of a channel of each of at least a part of the denoising transistors is a first length L1, a length of a channel of each of at least a part of the multiple transistors for driving is a second length L2, and the first length L1 is not equal to the second length L2.
    Type: Application
    Filed: December 11, 2024
    Publication date: April 3, 2025
    Applicants: HEFEI BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qi Liu, Chunxu Zhang, Jiantao Liu, Lei Guo, Maoxiu Zhou, Min Cheng, Xiaoting Jiang
  • Publication number: 20250103365
    Abstract: In several aspects for detecting a computing system resource schedule, a computing device performs a pre-analysis process utilizing a collected log from multiple sources. The pre-analysis process including a data formatter that identifies data based on a metric, and a dimensionality reduction process that distributes the data into an n-dimensional space. Key patterns are extracted to separate a normal status and an abnormal status for the extracted key patterns. A post-analysis process is performed on the extracted key patterns utilizing a threshold formatter to identify a threshold for a health check.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 27, 2025
    Inventors: Ming Xia Guo, Bo Chen Zhu, Yong Quan Tian, Mai Zeng, Meng Jie Min, Yan An, Min Cheng
  • Publication number: 20250093719
    Abstract: Provided are a display substrate and a display device. The first display region includes at least two domains spaced apart in the first direction and a first space between the at least two domains, the second display region includes at least two domains spaced apart in the first direction and a second space located between the at least two domains of the second display region; each pixel units further includes a discharge line and a common electrode strip, the discharge line includes a first conductive part and a second conductive part, the first conductive part is at the first space, the second conductive part is at the second space, the common electrode strip is at an edge of the first display region adjacent to the data lines, and no common electrode strip is arranged on an edge of the second display region adjacent to the data lines.
    Type: Application
    Filed: December 23, 2022
    Publication date: March 20, 2025
    Inventors: Chunxu ZHANG, Maoxiu ZHOU, Min CHENG, Jiantao LIU, Xiaoting JIANG, Haipeng YANG, Ke DAI
  • Patent number: 12255211
    Abstract: The present disclosure provides an array substrate and a manufacturing method thereof, and a display apparatus. The array substrate includes a plurality of gate lines (20) and a plurality of data lines (50) disposed on a base substrate (11), the plurality of gate lines (20) extend along a first direction, the plurality of data lines (50) extend in a second direction, the plurality of gate lines (20) and the plurality of data lines (50) are intersected to define a plurality of sub-pixels, the sub-pixel includes a thin film transistor (10), a pixel electrode (80) and a common electrode (90), the common electrode (90) in one sub-pixel is connected with the common electrode (90) in the adjacent sub-pixel through a common connection portion (110).
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: March 18, 2025
    Assignees: Hefei BOE Display Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Min Cheng, Ke Dai, Haipeng Yang, Maoxiu Zhou, Jiaqing Liu, Xipeng Wang
  • Patent number: 12254079
    Abstract: Embodiments of the present disclosure relate to a method, system and computer program product for providing system services. In some embodiments, a method is disclosed. According to the method, from a user program in a user address space, a request for a system service is received via a program call instruction of a set of program call instructions in an application interface code library. Based on the program call instruction, a target authorized address space of a plurality of authorized address spaces and a target system service routine for providing the system service in the target authorized address space is determined. A result of running the target system service routine in the target authorized address space is returned to the user program as a response to the request.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: March 18, 2025
    Assignee: International Business Machines Corporation
    Inventors: Naijie Li, Min Cheng, Kui Zhang, Yi Chai, Guang Han Sui
  • Patent number: 12254837
    Abstract: A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: March 18, 2025
    Assignees: HEFEI BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunxu Zhang, Ke Dai, Jiantao Liu, Lei Guo, Maoxiu Zhou, Xiaoting Jiang, Min Cheng, Qi Liu
  • Publication number: 20250076378
    Abstract: The present disclosure discloses an SoC chip distributed simulation and verification platform and a method, and the present disclosure relates to the field of chip verification technologies. The distributed simulation and verification platform includes component modules of an SoC chip; each module has its own verification platform, and each verification platform separately runs in a different simulation process; and virtual connections between the modules are implemented through respective verification platforms, to implement system function simulation and verification. In the present disclosure, a virtual connection technology is used to connect Testbench test platforms of the modules or IPs, to implement virtual integration of the modules or IPs, thereby completing distributed simulation and verification of a system function of the SoC chip.
    Type: Application
    Filed: April 12, 2023
    Publication date: March 6, 2025
    Inventors: Min Yi, Yunzhao Yang, Min Cheng, Chuanqiang Shen, Ming Wei, Tianhao Yi
  • Publication number: 20250042435
    Abstract: A data-based driveline map is determined using road-level map data and driveline data for road users. The map data includes way data comprising one or more ways, a way includes a series of nodes, and the driveline data includes drivelines, where a driveline is a series of poses representing a road user. A first section of the way data is identified as an intersection, and second sections are matched with the driveline data to generate multiple way bars, where a way bar includes one or more poses and one node. A way bar is categorized as either constant or changing based on lanes counted therewithin. Consecutive way bars are grouped into way bar sections based on the categorization and the lane count, and the map is generated using the way bar sections and the first section. A vehicle is operated using the map as input to a control system.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 6, 2025
    Applicant: Nissan North America, Inc.
    Inventors: Hsin-Min Cheng, Christopher Ostafew
  • Publication number: 20250040190
    Abstract: A semiconductor structure including a substrate, a capacitor, and an oxide semiconductor field effect transistor (OSFET). The capacitor is located on the substrate. The oxide semiconductor field effect transistor is located on the substrate. The oxide semiconductor field effect transistor is electrically connected to the capacitor.
    Type: Application
    Filed: November 30, 2023
    Publication date: January 30, 2025
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Yu-Chang Lin, Min-Cheng Chen
  • Patent number: 12213303
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: January 28, 2025
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yukihiro Nagai, Lu-Yung Lin, Chia-Wei Wu, Tsun-Min Cheng, Yu Chun Lin, Zheng Guo Zhang, Sun-Hung Chen, Wu Xiang Li, Hsiao-Han Lin
  • Patent number: 12202918
    Abstract: Photocurable (meth)acrylate compositions for forming features on the surfaces of membranes, and particularly, on membranes used in osmosis and reverse-osmosis applications, such as membrane filters.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: January 21, 2025
    Assignee: Henkel AG & Co. KGaA
    Inventors: Shuhua Jin, Chih-Min Cheng
  • Patent number: 12198601
    Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate and a driving circuit arranged on the base substrate. The driving circuit includes multiple denoising transistors and multiple transistors for driving, and the denoising transistors are electrically connected to a pull-up node. A length of a channel of each of at least a part of the denoising transistors is a first length L1, a length of a channel of each of at least a part of the multiple transistors for driving is a second length L2, and the first length L1 is not equal to the second length L2.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: January 14, 2025
    Assignees: HEFEI BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qi Liu, Chunxu Zhang, Jiantao Liu, Lei Guo, Maoxiu Zhou, Min Cheng, Xiaoting Jiang
  • Publication number: 20250014491
    Abstract: A driving module includes N driving circuits connected in series; the driving circuit includes an input terminal; N is a positive integer; input terminals of first a stages of driving circuits included in the driving module are electrically connected to an initial voltage line; a is a positive integer; an input terminal of an nth stage of driving circuit included in the driving module is electrically connected to an output terminal of an (n?m)th stage of driving circuit included in the driving module through an input cascade line; n and m are positive integers, and m is less than n; the driving module further includes at least one connection line, there is an overlapping portion between an orthographic projection of the connection line on the base substrate and an orthographic projection of the initial voltage line on the base substrate.
    Type: Application
    Filed: September 23, 2022
    Publication date: January 9, 2025
    Inventors: Maoxiu ZHOU, Lei GUO, Ke DAI, Chunxu ZHANG, Min CHENG, Xiaoting JIANG, Haipeng YANG
  • Publication number: 20240419505
    Abstract: In an approach for intelligent workload scheduling, a processor groups a plurality of batch jobs based on workload resource requests and dependencies of each batch job resulting in a plurality of groups. A processor schedules the plurality of batch jobs based on the plurality of groups. A processor monitors workload resource usage of system for running the plurality of batch jobs and a plurality of transaction workloads. A processor identifies one or more scheduled transaction workloads will not be able to be completed in under a preset time threshold. A processor reduces a resource quota of one or more batch jobs of the plurality of batch jobs based on type of resource that is needed for the one or more scheduled transaction workloads.
    Type: Application
    Filed: June 17, 2023
    Publication date: December 19, 2024
    Inventors: Guang Han Sui, Mai Zeng, Min Cheng, Peng Hui Jiang
  • Patent number: 12167183
    Abstract: In an image processing method, an image processing device obtains an input image from an image sensor. Each pixel of the input image is either a type-I pixel or a type-II pixel. Each type-I pixel carries a luminance channel value and no color data, and each type-II pixel carries a single color channel value and no luminance data, wherein the single color channel value is a cyan channel value, a magenta channel value, or a yellow channel value. The image processing device generates a target image by performing interpolation based on the luminance channel values and the single color channel values of the pixels of the input image, wherein each pixel in the target image corresponds in location to a pixel in the input image and has three color channel values generated by the interpolation.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: December 10, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Min Cheng, Daolong Tang, Yufeng Dai
  • Patent number: 12163913
    Abstract: An electrochemical cell for sensing gas has added mechanical support for the working electrode to prevent flexure of the working electrode due to pressure differentials. The added mechanical support includes: 1) affixing a larger area of the working electrode to the body of the cell; 2) a gas vent to a cavity of the body to equalize pressures; 3) a rigid electrolyte layer abutting a back surface of the working electrode; 4) infusing an adhesive deep into sides of the porous working electrode to enhance rigidity; 5) supporting opposing surfaces of the working electrode with the rigid package body; and 6) other techniques to make the working electrode more rigid. A bias circuit is also described that uses a controllable current source, an integrator of the varying current, and a feedback circuit for supplying a voltage to the counter electrode and a bias voltage to the reference electrode.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: December 10, 2024
    Assignee: QUALCOMM Technologies, Inc.
    Inventors: Jim Chih-Min Cheng, Eric Paul Lee, Jerome Chandra Bhat
  • Publication number: 20240400846
    Abstract: Aqueous inkjet ink compositions are provided which comprise water, a co-medium, pigment particles, and resin particles, wherein the resin particles comprise a polymerization product of reactants comprising: one or more types of hydrophobic monomers; and one or more types of anionic monomers comprising one or more types of crosslinkable anionic monomers.
    Type: Application
    Filed: May 30, 2023
    Publication date: December 5, 2024
    Inventors: Jing X. Sun, Nienwen Chow, David M. Skinner, Peter V. Nguyen, Chieh-Min Cheng