Patents by Inventor Min Cheng

Min Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230296998
    Abstract: An emulsion aggregation toner including a toner particle comprising at least one resin; an optional colorant; an optional wax; and a charge control agent disposed on a surface of the toner particle; the control agent comprising a phenyl based siloxane; and a complex formed from a metal ion donor and at least one of a ligand selected from a member of the group consisting of a polyaromatic acid comprising humic acid, a pyranone based ligand, a furanone based ligand, or a combination thereof.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: Jordan A. Frank, Genggeng Qi, Elizabeth K. Priebe, Chieh-Min Cheng, Michael F. Zona
  • Publication number: 20230284436
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.
    Type: Application
    Filed: April 21, 2022
    Publication date: September 7, 2023
    Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yukihiro Nagai, Lu-Yung Lin, Chia-Wei Wu, Tsun-Min Cheng, Yu Chun Lin, Zheng Guo Zhang, Sun-Hung Chen, Wu Xiang Li, Hsiao-Han Lin
  • Publication number: 20230265315
    Abstract: Two-part silane modified polymer/free radically curable adhesive systems demonstrating improved strength and percent elongation are provided.
    Type: Application
    Filed: January 3, 2023
    Publication date: August 24, 2023
    Inventors: Chih-Min Cheng, Jian Lin, Christopher J. Verosky, James M. Murray, Daniel Yi, Richard Corrao, Zachary S. Bauman, Ling Li
  • Publication number: 20230265574
    Abstract: A method for recovering metals from tungsten-containing metallic materials includes the steps of: providing a cathode and the tungsten-containing metallic material as an anode in an electrolyte solution which has a neutral, acidic or basic pH value; and subjecting the tungsten-containing metallic material to an electrolysis process under a power density that is greater than 3 W/cm2 on the anode so that a passivation layer formed on the anode during the electrolysis process is broken down to permit the tungsten-containing metallic material to be continuously dissolved and oxidized, and a tungsten-containing compound is formed in the electrolyte solution.
    Type: Application
    Filed: July 7, 2022
    Publication date: August 24, 2023
    Inventors: Chih-Huang LAI, Shao-Chi LO, Tzu-Min CHENG
  • Publication number: 20230269938
    Abstract: A semiconductor structure includes a substrate, a common source plane disposed on the substrate, a plurality of memory cells vertically disposed on the substrate and electrically connected to the common source plane, a common source line disposed on the substrate and electrically connected to the common source plane, and an isolation pillar. The common source line extends along a first direction and has a first segment and a second segment. The isolation pillar interposes the first segment and the second segment of the common source line.
    Type: Application
    Filed: February 23, 2022
    Publication date: August 24, 2023
    Inventors: Jung-Yi GUO, Chun-Min CHENG
  • Patent number: 11721378
    Abstract: An oxide semiconductor-based FRAM is provided in the present invention, including a substrate, a word line on the substrate, a gate insulating layer on the word line, an oxide semiconductor layer on the gate insulating layer, a source and a drain respectively on the oxide semiconductor layer and spaced apart at a distance, wherein the source and the drain further connect respectively to a plate line and a bit line, a ferroelectric dielectric layer on the source, the drain and the oxide semiconductor layer, and a write electrode on the ferroelectric dielectric layer, wherein the write electrode, the ferroelectric dielectric layer, the oxide semiconductor layer, the gate insulating layer and the word line overlap each other in a direction vertical to the substrate.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: August 8, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Hiroshi Yoshida
  • Publication number: 20230230935
    Abstract: A semiconductor package includes a substrate, a semiconductor die, a ring structure and a lid. The semiconductor die is disposed on the substrate. The ring structure is disposed on the substrate and surrounds the semiconductor die, where a first side of the semiconductor die is distant from an inner sidewall of the ring structure by a first gap, and a second side of the semiconductor die is distant from the inner sidewall of the ring structure by a second gap. The first side is opposite to the second side, and the first gap is less than the second gap. The lid is disposed on the ring structure and has a recess formed therein, and the recess overlaps with the first gap in a stacking direction of the ring structure and the lid.
    Type: Application
    Filed: March 21, 2023
    Publication date: July 20, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Ching, Shu-Shen Yeh, Chien-Hung Chen, Hui-Chang Yu, Yu-Min Cheng
  • Publication number: 20230178134
    Abstract: An oxide semiconductor-based FRAM is provided in the present invention, including a substrate, a word line on the substrate, a gate insulating layer on the word line, an oxide semiconductor layer on the gate insulating layer, a source and a drain respectively on the oxide semiconductor layer and spaced apart at a distance, wherein the source and the drain further connect respectively to a plate line and a bit line, a ferroelectric dielectric layer on the source, the drain and the oxide semiconductor layer, and a write electrode on the ferroelectric dielectric layer, wherein the write electrode, the ferroelectric dielectric layer, the oxide semiconductor layer, the gate insulating layer and the word line overlap each other in a direction vertical to the substrate.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Hiroshi Yoshida
  • Publication number: 20230171966
    Abstract: A 3D monolithic stacking memory structure is provided in the present invention, including a semiconductor substrate, a field effect transistor (FET) on the semiconductor substrate, a plurality of back-end metal layers on the FET and the semiconductor substrate, an oxide-semiconductor FET (OSFET) in the back-end metal layers, wherein a drain of the OSFET is connected with a gate of the FET, and a FEMIM storage capacitor formed on the back-end metal layers, wherein a bottom electrode of the FEMIM storage capacitor is connected with the drain of the OSFET and the gate of the FET, and the FET, the OSFET and the FEMIM storage capacitor are stacked in order from bottom to top on the semiconductor substrate.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 1, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Hiroshi Yoshida
  • Publication number: 20230159777
    Abstract: A polymeric dispersant including a copolymer comprising: a basic moiety; an alkyl group having from about 4 to about 40 carbon atoms; an aromatic group; and a steric hydrophilic group. An aqueous ink jet ink composition including the polymeric dispersant.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 25, 2023
    Inventors: Genggeng Qi, Yu Qi, Lanhui Zhang, Chieh-Min Cheng
  • Publication number: 20230161273
    Abstract: A method includes shooting a primary droplet and a satellite droplet from a droplet generator along a common initial direction; applying a force to the primary droplet and the satellite droplet, wherein after applying the force, the primary droplet has a first deflection toward a first direction different than the common initial direction, and the satellite droplet has a second deflection toward a second direction different than the common initial direction, wherein the second deflection of the satellite droplet is greater than the first deflection of the primary droplet; and generating an extreme ultraviolet (EUV) light using an excitation laser hitting the primary droplet with the first deflection.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 25, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung LIAO, Min-Cheng WU
  • Publication number: 20230159778
    Abstract: A self-crosslinked polymeric dispersant including a self-crosslinked polymeric dispersant comprising: a copolymer comprising: an acid group; a base group; a hydrophobic group; and a steric hydrophilic group.
    Type: Application
    Filed: November 23, 2021
    Publication date: May 25, 2023
    Inventors: Genggeng Qi, Yu Qi, Chieh-Min Cheng
  • Patent number: 11643540
    Abstract: Methods for forming latexes are provided. In embodiments, such a method comprises adding a first portion of a monomer emulsion comprising water, a monomer, an acidic monomer, a multifunctional monomer, and a first reactive surfactant to a reactive surfactant solution comprising water and a second reactive surfactant to form a reaction mixture, wherein the reactive surfactant solution does not comprise monomers other than the second reactive surfactant; adding a first portion of an initiator solution to the reaction mixture so that monomers undergo polymerization reactions to form resin seeds in the reaction mixture; adding a second portion of the monomer emulsion to the reaction mixture comprising the resin seeds; and adding a second portion of the initiator solution to the reaction mixture to form a latex comprising resin particles.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: May 9, 2023
    Assignee: Xerox Corporation
    Inventors: Chunliang Lu, Valerie Kuykendall, Chieh-Min Cheng
  • Publication number: 20230137738
    Abstract: A ferroelectric memory structure including a substrate, a ferroelectric capacitor structure, and a switch device is provided. The ferroelectric capacitor structure is disposed on the substrate. The ferroelectric capacitor structure includes at least one first electrode, first dielectric layers, a second electrode, and a ferroelectric material layer. The at least one first electrode and the first dielectric layers are alternately stacked. The second electrode penetrates through the first electrode. The ferroelectric material layer is disposed between the first electrode and the second electrode. The switch device is electrically connected to the ferroelectric capacitor structure.
    Type: Application
    Filed: November 30, 2021
    Publication date: May 4, 2023
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Hiroshi Yoshida
  • Patent number: 11641145
    Abstract: An electronic device is provided. The electronic device includes a function module, a body, and a motor assembly. The body includes an accommodation space for accommodating the function module. The motor assembly includes a drive motor, a gear, a rotation output shaft, a displacement mechanism, and a latch. The drive motor includes a shaft. The gear is fixedly attached to the shaft. The rotation output shaft includes a gear teeth portion. The gear teeth portion is coupled to the gear. The rotation output shaft is connected to the function module and is configured to drive the function module to rotate. The displacement mechanism synchronizes with the shaft and is separated from the rotation output shaft. The displacement mechanism includes a linear motion component. The latch is connected to the linear motion component, and is configured to engage the function module.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: May 2, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chui-Hung Chen, Ching-Yuan Yang, Chia-Min Cheng, Cheng-Han Chung
  • Patent number: 11637072
    Abstract: A semiconductor package includes a substrate, a semiconductor die, a ring structure and a lid. The semiconductor die is disposed on the substrate. The ring structure is disposed on the substrate and surrounds the semiconductor die, where a first side of the semiconductor die is distant from an inner sidewall of the ring structure by a first gap, and a second side of the semiconductor die is distant from the inner sidewall of the ring structure by a second gap. The first side is opposite to the second side, and the first gap is less than the second gap. The lid is disposed on the ring structure and has a recess formed therein, and the recess overlaps with the first gap in a stacking direction of the ring structure and the lid.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: April 25, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Ching, Shu-Shen Yeh, Chien-Hung Chen, Hui-Chang Yu, Yu-Min Cheng
  • Patent number: 11634626
    Abstract: The disclosure is directed to polyelectrolyte complex nanoparticles that can be used to deliver agents deep into hydrocarbon reservoirs. Methods of making and using said polyelectrolyte complex nanoparticles are also provided.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: April 25, 2023
    Assignees: CONOCOPHILLIPS COMPANY, UNIVERSITY OF KANSAS
    Inventors: Ying-Ying Lin, Cory Berkland, Jenn-Tai Liang, Ahmad Moradi-Araghi, Terry M. Christian, Riley B. Needham, James H. Hedges, Min Cheng, Faye L. Scully, David R. Zornes
  • Publication number: 20230118862
    Abstract: A method includes transferring a wafer to a position over a wafer chuck; lifting a lifting pin through the wafer chuck to a first position to support the wafer; holding the wafer on the lifting pin using a negative pressure source in gaseous communication with an inner gas passage of the lifting pin; introducing a gas to a region between the wafer and the wafer chuck through an outer gas passage of the lifting pin, wherein in a top view of the lifting pin, the inner gas passage has a circular profile, while the outer gas passage has a ring-shape profile; and lowering the lifting to dispose the wafer over the wafer chuck.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 20, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-Cheng WU, Chi-Hung LIAO
  • Patent number: D989371
    Type: Grant
    Filed: February 20, 2023
    Date of Patent: June 13, 2023
    Inventor: Min Cheng
  • Patent number: D989372
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: June 13, 2023
    Inventor: Min Cheng