Abstract: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.

Abstract: A self-cleaning device comprises at least one first electrode disposed on a solid material layer, a first dielectric layer disposed on the first electrode, a hydrophobic layer disposed on the first dielectric layer, and at least one mechanical oscillation unit. Electrical oscillation for oscillating a droplet in a horizontal direction is generated by applying a first electric signal to the first electrode, thereby merging droplets formed on the hydrophobic layer, the mechanical oscillation unit moves the merged droplets in a specific direction or atomizes the merged droplets to remove the merged droplets by generating mechanical oscillation for oscillating the droplet in a vertical direction, and each of the droplets has a volume smaller than 3 ?l, and new droplet having a volume more than 3 ?l is generated by the merging.

Abstract: An electronic device includes a first substrate, a plurality of light emitting elements each having a horizontal length and a vertical length which are less than or equal to about 10 micrometers (?m), each of the plurality of light emitting elements being disposed on the first substrate, a quantum dot color filter layer disposed on the plurality of light emitting elements, and a first overcoat layer between a plurality of light emitting elements and the quantum dot color filter layer. The quantum dot color filter layer includes a plurality of quantum dot color filters partitioned by a plurality of first partition walls so as to be overlapped with the plurality of light emitting elements, respectively.

Abstract: A memory element includes a substrate, a first electrode formed on the substrate, a phase-change heterolayer formed on the first electrode and electrically connected to the first electrode, and a second electrode formed on the phase-change heterolayer, wherein the phase-change heterolayer includes one or more confinement material layers and one or more phase-change material layers, and the confinement material layer includes a metal chalcogenide film.

Abstract: The present application provides a wiring structure, a semiconductor device having the wiring structure, and a method of manufacturing the semiconductor device. The wiring structure includes a substrate, a metallic layer above the substrate, at least one first conductive feature and at least one second conductive feature. The first and second conductive features are disposed between the substrate and the metallic layer; the first conductive feature has a first critical dimension, and the second conductive feature has a second critical dimension less than the first critical dimension. An effective resistance of the wiring structure can be adjusted by changing the critical dimensions of the first and second conductive features. The semiconductor device including the wiring structure and a method of manufacturing the semiconductor device are also provided.

Abstract: The present application provides a wiring structure, a semiconductor device having the wiring structure, and a method of manufacturing the semiconductor device. The wiring structure includes a substrate, a metallic layer above the substrate, at least one first conductive feature and at least one second conductive feature. The first and second conductive features are disposed between the substrate and the metallic layer; the first conductive feature has a first critical dimension, and the second conductive feature has a second critical dimension less than the first critical dimension. An effective resistance of the wiring structure can be adjusted by changing the critical dimensions of the first and second conductive features. The semiconductor device including the wiring structure and a method of manufacturing the semiconductor device are also provided.

Abstract: The present application provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate and a wiring structure. The wiring structure includes at least one metal interconnect disposed on the substrate, at least one conductive feature disposed on the metal interconnect, and at least one diffusing barrier liner surrounding the conductive feature. The conductive feature has a head portion and a neck portion sandwiched between the metal interconnect and the head portion. The neck portion can have a first critical dimension, which gradually decreases at positions of increasing distance from the head portion.

Abstract: The present application provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate and a wiring structure. The wiring structure includes at least one metal interconnect disposed on the substrate, at least one conductive feature disposed on the metal interconnect, and at least one diffusing barrier liner surrounding the conductive feature. The conductive feature has a head portion and a neck portion sandwiched between the metal interconnect and the head portion. The neck portion can have a first critical dimension, which gradually decreases at positions of increasing distance from the head portion.

Abstract: A method of manufacturing an inductive device includes: providing a magnetic base including a core column and defining a positioning trench that surrounds the core column; forming a coil structure including a coil body, a first extending section, and a second extending section, in which the coil body has a through hole, the first extending section includes a first bent portion and a first terminal portion connected thereto, and the second extending section includes a second bent portion and a second terminal portion connected thereto; arranging the coil structure in the positioning trench by sleeving the coil body around the core column; and forming a package structure to cover the magnetic base and the coil structure.

Abstract: Disclosed herein is an accommodation case for an electric toothbrush, as an accommodation case for an electric toothbrush for storing an electric toothbrush having an electric body and a brush head detachably coupled to the electric body, including a first housing and a second housing connected to each other and configured to accommodate the electric toothbrush, wherein the first and second housings are formed to have a length for accommodating at least a portion of the brush head and only a portion of the electric body and exposing the rest of the electric body, and the first housing includes a counteracting portion generating a counter moment against a rotational moment generated by the rest of the electric body, while the electric toothbrush is accommodated in the first housing.

Abstract: Disclosed is a method for effectively preparing mesenchymal-like stem cells, the method including: preparing human pluripotent stem cells cultured to passage 70 or lower after establishment of cell lines; inducing differentiation of the human pluripotent stem cells to produce embryoid bodies and selecting cystic embryoid bodies therefrom; loading the cystic embryoid bodies on a cell-permeable three-dimensional (3D) culture unit to isolate mesenchymal-like stem cells therefrom; isolating only monolayer-shaped cell clusters from the mesenchymal-like stem cells passing through the cell-permeable 3D culture unit; and uniformizing sizes of the monolayer-shaped cell clusters, in which the mesenchymal-like stem cells have anti-inflammatory efficacy and immunosuppression.

Abstract: A method for a first user terminal to use a messenger service of a group chat room is proposed. The method may include receiving, from a server, invitation information associated with a second user's inviting a first user to the group chat room, and displaying chat room information on the group chat room. The method may also include in response to the second user not being registered as a friend of the first user in the messenger service, displaying information on the second user and an interface for deciding whether to participate in the group chat room. The method may further include acquiring an interaction regarding a decision to participate in the group chat room through the interface, and displaying a message created in the group chat room.

Abstract: A method for preparing a semiconductor device is provided. The method includes forming a first dielectric layer over a semiconductor substrate, and forming a conductive contact penetrating through the first dielectric layer. The method also includes forming a lower landing pad over the conductive contact, and forming a second dielectric layer covering the lower landing pad. The method further includes etching the second dielectric layer to form a first opening exposing the lower landing pad, and forming an upper landing pad in the first opening. The lower landing pad and the upper landing pad form a T-shaped landing pad structure.

Abstract: A semiconductor device includes a first dielectric layer disposed over a semiconductor substrate, and a conductive contact penetrating through the first dielectric layer. The semiconductor device also includes a T-shaped landing pad structure disposed over and in direct contact with the conductive contact. The T-shaped landing pad structure includes a lower landing pad and an upper landing pad disposed over the lower landing pad, and a width of the upper landing pad is greater than a width of the lower landing pad. The semiconductor device further includes a capacitor disposed over and in direct contact with the T-shaped landing pad structure, and a second dielectric layer disposed over the first dielectric layer and surrounding the T-shaped landing pad structure and the capacitor.

Abstract: An inductive device and a method of manufacturing the same are provided. The inductive device includes a magnetic base, a coil structure, and a package structure. The magnetic base includes a bottom plate, a core column, and a lateral wall defining a positioning trench. The coil structure includes a coil body, a first extending section, and a second extending section. The coil body disposed in the positioning trench surrounds the core column. The first extending section includes a first bent portion and a first terminal portion connected at a first connecting point. The second extending section includes a second bent portion and a second terminal portion connected at a second connecting point. A shortest distance between a first imaginary connection line defined between the first and second connecting points and a central axis of the core column is less than a minimum outer radius of the coil body.

Abstract: According to at least one aspect of the disclosure, a front-end module is provided comprising an input configured to receive a radio-frequency signal, an output configured to be coupled to an antenna, a balun coupled to the output, one or more power amplifiers coupled to the input, and an inverter coupled between the one or more power amplifiers and the balun, the inverter being configured to provide output impedance matching to the one or more power amplifiers.

Abstract: The present disclosure provides a method of forming a semiconductor structure. The method includes providing a substrate including an isolation region, an active region adjacent to the isolation region, and a first top surface, wherein the isolation region includes an isolation trench filled with a dielectric material, and the active region includes a gate trench filled with a gate electrode material; forming a hard mask on the substrate; and performing an etching process to partially remove portions of the dielectric material and gate electrode material exposed by the hard mask to form a second top surface of the dielectric material and a third top surface of the gate electrode material, wherein the second top surface and the third top surface are substantially at the same level and are substantially lower than the first top surface.

Abstract: Apparatus and methods for power amplifier systems with balun and shunt capacitor are disclosed. In certain embodiments, a front-end system includes a shunt capacitor, a balun having an input side and an output side, and power amplifier stages that operate in parallel with one another to amplify a radio frequency input signal. The power amplifier stages include a first power amplifier stage having a first output coupled to the shunt capacitor and to a first input terminal on the input side of the balun, and a second power amplifier stage having a second output coupled to a second input terminal on the input side of the balun.

Abstract: A semiconductor device includes a first dielectric layer disposed over a semiconductor substrate, and a conductive contact penetrating through the first dielectric layer. The semiconductor device also includes a T-shaped landing pad structure disposed over and in direct contact with the conductive contact. The T-shaped landing pad structure includes a lower landing pad and an upper landing pad disposed over the lower landing pad, and a width of the upper landing pad is greater than a width of the lower landing pad. The semiconductor device further includes a capacitor disposed over and in direct contact with the T-shaped landing pad structure, and a second dielectric layer disposed over the first dielectric layer and surrounding the T-shaped landing pad structure and the capacitor.

Abstract: A method for preparing a semiconductor device is provided. The method includes forming a first dielectric layer over a semiconductor substrate, and forming a conductive contact penetrating through the first dielectric layer. The method also includes forming a lower landing pad over the conductive contact, and forming a second dielectric layer covering the lower landing pad. The method further includes etching the second dielectric layer to form a first opening exposing the lower landing pad, and forming an upper landing pad in the first opening.