Patents by Inventor Min Ding

Min Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9412709
    Abstract: A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: August 9, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Sheila F. Chopin, Min Ding, Varughese Mathew, Scott S. Roth
  • Publication number: 20160199400
    Abstract: The present invention relates to high purity cangrelor, pharmaceutical formulations comprising high purity cangrelor as an active ingredient, methods for preparing such compounds and formulations, and methods for using the pharmaceutical formulations in the inhibition of platelet activation and aggregation.
    Type: Application
    Filed: February 22, 2016
    Publication date: July 14, 2016
    Applicant: The Medicine Company
    Inventors: Panna DUTTA, Adel RAFAI FAR, Min DING, Rajeshwar MOTHERAM
  • Patent number: 9295687
    Abstract: The present invention relates to high purity cangrelor, pharmaceutical formulations comprising high purity cangrelor as an active ingredient, methods for preparing such compounds and formulations, and methods for using the pharmaceutical formulations in the inhibition of platelet activation and aggregation.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: March 29, 2016
    Assignee: THE MEDICINES COMPANY
    Inventors: Panna Dutta, Adel Rafai Far, Min Ding, Rajeshwar Motheram
  • Patent number: 9281256
    Abstract: A microelectronic device package including a package substrate, microelectronic component disposed on a first surface of a first portion of the substrate, and encapsulant material surrounding the microelectronic electronic component. An exposed surface of the first portion of the substrate is exposed through an opening in a first major surface of the encapsulant material. The exposed surface of the first portion has an edge. Encapsulant material is adjacent to the edge at the first major surface. The exposed surface is opposite the first surface. A stress relief feature located in one of the first major surface or a second major surface of the encapsulant material. The second major surface is opposite the first major surface. The stress relief feature reduces an amount of the encapsulant material and is 1 mm or less of a plane of the edge of the exposed surface. The plane is generally perpendicular to the exposed surface.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: March 8, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Min Ding, Tim V. Pham
  • Patent number: 9245235
    Abstract: A system and method for analysis of complex systems which includes determining model parameters based on time series data, further including profiling a plurality of types of data properties to discover complex data properties and dependencies; classifying the data dependencies into predetermined categories for analysis; and generating a plurality of models based on the discovered properties and dependencies. The system and method may analyze, using a processor, the generated models based on a fitness score determined for each model to generate a status report for each model; integrate the status reports for each model to determine an anomaly score for the generated models; and generate an alarm when the anomaly score exceeds a predefined threshold.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: January 26, 2016
    Assignee: NEC Laboratories America, Inc.
    Inventors: Haifeng Chen, Min Ding, Bin Liu, Abhishek Sharma, Kenji Yoshihira, Guofei Jiang
  • Publication number: 20160015772
    Abstract: Drug substance preparations of oritavancin having high purity are disclosed, along with pharmaceutical compositions comprising such oritavancin drug substance preparations, and drug products or dosage forms comprising such pharmaceutical compositions.
    Type: Application
    Filed: July 16, 2015
    Publication date: January 21, 2016
    Applicant: The Medicines Company
    Inventors: Adel Rafai Far, Gopal Krishna, Min Ding, Sanjay R. Chemburkar, Carl M. Knable, James J. Petzel, Julie J. Pruyne, Douglas M. Reamer
  • Publication number: 20150291549
    Abstract: The present disclosure generally relates to compounds useful as immunomodulators. Provided herein are compounds, compositions comprising such compounds, and methods of their use. The disclosure further pertains to pharmaceutical compositions comprising at least one compound according to the disclosure that are useful for the treatment of various diseases, including cancer and infectious diseases.
    Type: Application
    Filed: April 8, 2015
    Publication date: October 15, 2015
    Inventors: Louis S. Chupak, Min Ding, Scott W. Martin, Xiaofan Zheng, Piyasena Hewawasam, Timothy P. Connolly, Ningning Xu, Kap-Sun Yeung, Juliang Zhu, David R. Langley, Daniel J. Tenney, Paul Michael Scola
  • Patent number: 9153725
    Abstract: A solar cell includes a crystalline silicon semiconductor substrate, an intrinsic amorphous silicon semiconductor layer, an amorphous silicon semiconductor layer and a transparent conductive layer. The crystalline silicon semiconductor substrate possesses a first doped type and a trench is formed thereon to form an enclosed area to define a first electrode region in the enclosed area and a second electrode region out of the enclosed area. The intrinsic amorphous silicon semiconductor layer, the amorphous silicon semiconductor layer and the transparent conductive layer are formed sequentially on the crystalline silicon semiconductor substrate and in the trench. Having discontinuity in the trench, the amorphous silicon semiconductor layer, the amorphous silicon semiconductor layer and the transparent conductive layer provide an isolation function between the previously defined first and second electrode regions.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: October 6, 2015
    Assignee: NEO SOLAR POWER CORP.
    Inventors: Jau-Min Ding, Hsin-Chiao Luan, Kun-Chih Lin, Chih-Hung Liao, Yi-Wen Tseng
  • Patent number: 9129930
    Abstract: A device comprising a substrate, an integrated circuit (IC) die attached to the substrate on one side, a plurality of contact pads on an active side of the IC die, a plurality of thermally and electrically conductive legs, each of the legs attached to a respective one of the contact pads, and an encapsulating material formed around the substrate, the IC die, and a portion of the legs. A contact end of each of the legs is exposed, and one of the contact ends conducts a signal from a transistor in the IC die.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: September 8, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Min Ding
  • Publication number: 20150179858
    Abstract: A solar cell includes a crystalline silicon semiconductor substrate, an intrinsic amorphous silicon semiconductor layer, an amorphous silicon semiconductor layer and a transparent conductive layer. The crystalline silicon semiconductor substrate possesses a first doped type and a trench is formed thereon to form an enclosed area to define a first electrode region in the enclosed area and a second electrode region out of the enclosed area. The intrinsic amorphous silicon semiconductor layer, the amorphous silicon semiconductor layer and the transparent conductive layer are formed sequentially on the crystalline silicon semiconductor substrate and in the trench. Having discontinuity in the trench, the amorphous silicon semiconductor layer, the amorphous silicon semiconductor layer and the transparent conductive layer provide an isolation function between the previously defined first and second electrode regions.
    Type: Application
    Filed: August 21, 2014
    Publication date: June 25, 2015
    Inventors: JAU-MIN DING, HSIN-CHIAO LUAN, KUN-CHIH LIN, CHIH-HUNG LIAO, YI-WEN TSENG
  • Patent number: 9026855
    Abstract: A computer implemented method for temporal ranking in invariant networks includes considering an invariant network and a set of broken invariants in the invariant network, assuming, for each time point inside a window W, that each metric with broken invariants is affected by a fault at that time point, computing an expected pattern for each invariant of a metric with assumed fault, said pattern indicative of time points at which an invariant will be broken given that its associated metric was affected by a fault at time t, comparing the expected pattern with the pattern observed over the time window W; and determining a temporal score based on a match from the prior comparing.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: May 5, 2015
    Assignee: NEC Laboratories America, Inc.
    Inventors: Abhishek Sharma, Haifeng Chen, Min Ding, Kenji Yoshihira, Guofei Jiang
  • Patent number: 9025585
    Abstract: Provided is an apparatus and method for allocating time slots to nodes without contention in a wireless network. The method for allotting time slots includes: receiveing a packet length and maximum allowable latencies of the nodes and converting them into data in symbol units; determining a beacon order so that a beacon interval representing a length of a superframe is smaller than or equal to a minimum value of the converted maximum allowable latencies; determining a superframe order so that the sum of a length of a beacon frame, a length of a contention access period, and a length of contention free period is smaller than a length of an active portion, based on the converted packet length; and allocating a guaranteed time slot without contention to each node according to an allocation priority order for the nodes.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: May 5, 2015
    Assignee: Nestfield Co., Ltd.
    Inventors: Seung Ho Hong, Yue Min Ding
  • Publication number: 20150084168
    Abstract: A microelectronic device package including a package substrate, microelectronic component disposed on a first surface of a first portion of the substrate, and encapsulant material surrounding the microelectronic electronic component. An exposed surface of the first portion of the substrate is exposed through an opening in a first major surface of the encapsulant material. The exposed surface of the first portion has an edge. Encapsulant material is adjacent to the edge at the first major surface. The exposed surface is opposite the first surface. A stress relief feature located in one of the first major surface or a second major surface of the encapsulant material. The second major surface is opposite the first major surface. The stress relief feature reduces an amount of the encapsulant material and is 1 mm or less of a plane of the edge of the exposed surface. The plane is generally perpendicular to the exposed surface.
    Type: Application
    Filed: September 25, 2013
    Publication date: March 26, 2015
    Inventors: MIN DING, Tim V. Pham
  • Patent number: 8943367
    Abstract: A method for metric ranking in invariant networks includes, given an invariant network and a set of broken invariants, two ranking processes are used to determine and rank the anomaly scores of each monitoring metrics in large-scale systems. Operators can follow the rank to investigate the root-cause in problem investigation. In a first ranking process, given a node/metric, the method determines multiple scores by integrating information from immediate neighbors to decide the anomaly score for metric ranking. In a second ranking process, given a node/metric, an iteration process is used to recursively integrate the information from immediate neighbors at each round to determine its anomaly score for metric ranking.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: January 27, 2015
    Assignee: NEC Laboratories America, Inc.
    Inventors: Guofei Jiang, Min Ding, Yong Ge
  • Patent number: 8938383
    Abstract: Apparatus and method for allowing a test script to be played back correctly in a locale of different test language. The invention uses a synonymy dictionary storing the different appearances of the property value of a property in an object of a software product to be tested in different test locales; and compares the property value of the property in the object of the software product to be tested to the corresponding property value pre-recorded in a test script to detect whether they match each other.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: January 20, 2015
    Assignee: International Business Machines Corporation
    Inventors: Min Ding, Chi Qi, Xiao Bin Yang
  • Publication number: 20140346663
    Abstract: A packaged semiconductor device is made by forming a conductive pad on an external surface of an integrated circuit device, forming a passivation layer over the conductive pad, removing a portion of the passivation layer over a bond area on the conductive pad, forming a sacrificial anode around a majority of a periphery surrounding the bond area, forming a conductive bond in the bond area, and forming an encapsulating material around the conductive bond and an exposed portion of the sacrificial anode.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 27, 2014
    Inventors: Sheila F. Chopin, Min Ding, Varughese Mathew, Scott S. Roth
  • Publication number: 20140327124
    Abstract: A device comprising a substrate, an integrated circuit (IC) die attached to the substrate on one side, a plurality of contact pads on an active side of the IC die, a plurality of thermally and electrically conductive legs, each of the legs attached to a respective one of the contact pads, and an encapsulating material formed around the substrate, the IC die, and a portion of the legs. A contact end of each of the legs is exposed, and one of the contact ends conducts a signal from a transistor in the IC die.
    Type: Application
    Filed: July 15, 2014
    Publication date: November 6, 2014
    Inventor: MIN DING
  • Patent number: 8790964
    Abstract: A device comprising a substrate, an integrated circuit (IC) die attached to the substrate on one side, a plurality of contact pads on an active side of the IC die, a plurality of thermally and electrically conductive legs, each of the legs attached to a respective one of the contact pads, and an encapsulating material formed around the substrate, the IC die, and a portion of the legs. A contact end of each of the legs is exposed, and one of the contact ends conducts a signal from a transistor in the IC die.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: July 29, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Min Ding
  • Publication number: 20140186299
    Abstract: The invention encompasses compounds of formula I as well as compositions and methods of using the compounds. The compounds have activity against hepatitis C virus (HCV) and are useful in treating those infected with HCV.
    Type: Application
    Filed: March 5, 2014
    Publication date: July 3, 2014
    Inventors: John A. Bender, Min Ding, Robert G. Gentles, Piyasena Hewawasam
  • Patent number: 8754125
    Abstract: The invention provides intravenous formulations of propofol in an oil-in-water emulsion, having a combination of preservatives.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: June 17, 2014
    Assignee: The Medicines Company
    Inventors: Min Ding, Rajeshwar Motheram, Glenn Sblendorio