Abstract: A 3D reconstruction method is provided. Positioning signals are received by a signal receiver at a first and a second time spots to determine a HMD displacement vector and a HMD rotation amount. A first and a second images are retrieved by a first camera to determine a first camera rotation amount. A relative rotation amount and a relative displacement vector between the HMD and the first camera are calculated. A first camera displacement vector of the first camera is calculated according to the HMD displacement vector, the HMD rotation amount, the relative rotation amount and the relative displacement vector. Depth information of the first and the second image is obtained based on the first camera displacement vector and the first camera rotation amount. 3D reconstruction is performed according to images retrieved by the first camera and the depth information.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dummy fin structure over a semiconductor substrate, and forming a mask layer covering the dummy fin structure. The method further includes irradiating the mask layer, so that the mask layer is divided into an unirradiated portion and an irradiated portion, and the irradiated portion is over the dummy fin structure. The method also includes removing a top portion of the irradiated portion and a top portion of the dummy fin structure by a first etching operation, such that the dummy fin structure has a convex top surface after the first etching operation. The method includes removing a middle portion of the dummy fin structure by a second etching operation, such that the dummy fin structure has a concave top surface after the second etching operation.

Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.

Abstract: A semiconductor device includes a substrate, an isolation structure, and a gate structure. The substrate has an active area. The isolation structure surrounds the active area of the substrate. The gate structure is across the active area of the substrate. The isolation structure has a first portion under the gate structure and a second portion adjacent to the gate structure. A top surface of the first portion of the isolation structure is lower than a top surface of the second portion of the isolation structure.

Abstract: A method for obtaining Hi-Res audio transfer information is provided. The method is applicable to the electronic device having a processor. In the method, a first audio signal is captured and converted from the time domain into in the frequency domain to generate a first signal spectrum. Then, a regression analysis is performed on an energy distribution of the first signal spectrum to predict an extended energy distribution according to the first signal spectrum, and head-related parameters are used to compensate for the extended energy distribution to generate an extended signal spectrum. Finally, the first signal spectrum and the extended signal spectrum are combined into a second signal spectrum which is converted from the frequency domain into the time domain to generate a second audio signal including Hi-Res audio transfer information.

Abstract: In a method of manufacturing a semiconductor device, a fin structure is formed over a substrate. The fin structure has a channel region and a source/drain region. A gate structure is formed over the channel region of the fin structure. A first source/drain etching is performed to recess the source/drain region of the fin structure. After the first source/drain etching, a second source/drain etching is performed to further recess the source/drain region of the fin structure. After the second source/drain etching, a third source/drain etching is performed to further recess the source/drain region of the fin structure, thereby forming a source/drain recess. One or more epitaxial layers are formed in the source/drain recess. The first source/drain etching is isotropic etching and the second source/drain etching is anisotropic etching.

Abstract: An auxiliary rope knotter includes an interior formed with a first through hole, a second through hole, a first locking groove and a second locking groove which are parallel with each other. In the cross-sectional face of the auxiliary rope knotter, the first center connecting line formed by the first through hole and the second through hole intersects the second center connecting line formed by the first locking groove and the second locking groove, such that the rope is easily knotted by the auxiliary rope knotter.

Abstract: Semiconductor structures and method for forming the same are provided. The method for manufacturing the semiconductor structure includes forming a first gate dielectric layer over a substrate and forming a first capping layer over the first gate dielectric layer. The method for manufacturing the semiconductor structure includes oxidizing the first capping layer to form a first capping oxide layer and forming a first work function metal layer over the first capping oxide layer. The method for manufacturing the semiconductor structure includes forming a first gate electrode layer over the first work function metal layer.

Abstract: Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the layer. A plurality of bar or pillar structures are spaced apart from one another and laterally surround the conductive body. The plurality of bar or pillar structures are generally concentric around the conductive body.

Abstract: The disclosure provides an audio processing device, an audio processing method for controlling a plurality of speakers, and a computer program product. The audio processing device includes a memory, a transceiver, and a processor. The memory stores a plurality of modules. The transceiver is wirelessly paired with a plurality of speakers. The processor executes the modules to perform following steps: requesting each of the speakers to output an audio positioning signal; collecting the audio positioning signal from each of the speakers; retrieving a location of each of the speakers relative to the audio processing device according to the audio positioning signal from each of the speakers; adjusting a plurality of audio contents based on the location of each of the speakers relative to the audio processing device; and sending the audio contents to the speakers to control the speakers outputting the audio contents.

Abstract: A PAM (Pulse Amplitude Modulation) modulator driver is configured to receive a PAM input signal having N input amplitude levels and provide a PAM output signal having N output amplitude levels, where N is an integer. The PAM modulator driver circuit configured to electrically adjust amplitude levels in the PAM output signal.

Abstract: The semiconductor device includes a substrate, an epi-layer, a first etch stop layer, an interlayer dielectric (ILD) layer, a second etch stop layer, a protective layer, a liner, a silicide cap and a contact plug. The substrate has a first portion and a second portion. The epi-layer is disposed in the first portion. The first etch stop layer is disposed on the second portion. The ILD layer is disposed on the first etch stop layer. The second etch stop layer is disposed on the ILD layer, in which the first etch stop layer, the ILD layer and the second etch stop layer form a sidewall surrounding the first portion. The protective layer is disposed on the sidewall. The liner is disposed on the protective layer. The silicide cap is disposed on the epi-layer. The contact plug is disposed on the silicide cap and surrounded by the liner.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a dummy fin structure over a semiconductor substrate, and forming a mask layer covering the dummy fin structure. The method further includes irradiating the mask layer, so that the mask layer is divided into an unirradiated portion and an irradiated portion, and the irradiated portion is over the dummy fin structure. The method also includes removing a top portion of the irradiated portion and a top portion of the dummy fin structure by a first etching operation, such that the dummy fin structure has a convex top surface after the first etching operation. The method includes removing a middle portion of the dummy fin structure by a second etching operation, such that the dummy fin structure has a concave top surface after the second etching operation.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a metal gate electrode structure and an insulating layer over the semiconductor substrate. The insulating layer surrounds the metal gate electrode structure. The method includes nitrifying a first top portion of the metal gate electrode structure to form a metal nitride layer over the metal gate electrode structure.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.

Abstract: In a method of manufacturing a semiconductor device, a fin structure is formed over a substrate. The fin structure has a channel region and a source/drain region. A gate structure is formed over the channel region of the fin structure. A first source/drain etching is performed to recess the source/drain region of the fin structure. After the first source/drain etching, a second source/drain etching is performed to further recess the source/drain region of the fin structure. After the second source/drain etching, a third source/drain etching is performed to further recess the source/drain region of the fin structure, thereby forming a source/drain recess. One or more epitaxial layers are formed in the source/drain recess. The first source/drain etching is isotropic etching and the second source/drain etching is anisotropic etching.

Abstract: A method of manufacturing a semiconductor device includes forming a first transistor structure and a second transistor structure on a substrate, wherein source/drain structures of the first transistor structure and the second transistor structure are merged. The first and second transistor structures are separated by etching the source/drain structures.

Abstract: A synchronization method, suitable between a first electronic device and a second electronic device, includes following operations. A first pulse of a wireless signal sent from the first electronic device is received by the second electronic device. A first status of the second electronic device is determined. A second pulse of the wireless signal is received after the first pulse. A receiving time gap between the first pulse being received and the second pulse being received by the second electronic device is measured. A new status of the second electronic device is determined according to the receiving time gap and the first status of the second electronic device. Whether to synchronize a system clock on the second electronic device with the second pulse of the wireless signal is determined according to the new status.

Abstract: Methods for forming a semiconductor structure are provided. The method includes forming a first dummy gate structure and forming first spacers over a sidewall of the first dummy gate structure. The method includes removing the first dummy gate structure to form a first trench between the first spacers and forming a first capping layer in the first trench. A first portion of the first capping layer covers a sidewall of the first trench and a second portion of the first capping layer covers a bottom surface of the first trench. The method further includes oxidizing a sidewall of the first portion of the first capping layer and a top surface of the second portion of the first capping layer to form a first capping oxide layer and forming a first work function metal layer and forming a first gate electrode layer over the first work function metal layer.

Abstract: Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the layer. A plurality of bar or pillar structures are spaced apart from one another and laterally surround the conductive body. The plurality of bar or pillar structures are generally concentric around the conductive body.