Patents by Inventor Min Liang

Min Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor structure and manufacturing method thereof
    Patent number: 9865566
    Abstract: A semiconductor structure includes a substrate, a redistribution layer (RDL) including a dielectric layer disposed over the substrate and a plurality of conductive members surrounded by the dielectric layer, a first conductive pillar disposed over and electrically connected with one of the plurality of conductive members, a second conductive pillar disposed over and electrically connected with one of the plurality of conductive member, a first die disposed over the RDL and electrically connected with the first conductive pillar, and a second die disposed over the RDL and electrically connected with the second conductive pillar, wherein a height of the second conductive pillar is substantially greater than a height of the first conductive pillar, and a thickness of the first die is substantially greater than a thickness of the second die.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: January 9, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chi-Yang Yu, Kuan-Lin Ho, Chin-Liang Chen, Yu-Min Liang
  • SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20180005916
    Abstract: The present disclosure provides a semiconductor device. The semiconductor packaged device includes a first semiconductor die having a first surface. The semiconductor packaged device also includes a dielectric material surrounding the first semiconductor die, where the dielectric material comprises a surface substantially leveled with the first surface. The semiconductor packaged device further includes a capping layer covering the first surface of the first semiconductor die and the surface of the dielectric material. An adhesivity between the capping layer and a dicing tape is lower than an adhesivity between the dielectric material and the dicing tape.
    Type: Application
    Filed: September 2, 2016
    Publication date: January 4, 2018
    Inventors: CHIN-LIANG CHEN, CHI-YANG YU, KUAN-LIN HO, YU-MIN LIANG
  • SEMICONDUCTOR STRUCTURE AND ASSOCIATED METHOD FOR MANUFACTURING THE SAME
    Publication number: 20180005919
    Abstract: A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.
    Type: Application
    Filed: August 4, 2016
    Publication date: January 4, 2018
    Inventors: CHIN-LIANG CHEN, CHI-YANG YU, KUAN-LIN HO, YU-MIN LIANG
  • SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20170365581
    Abstract: A semiconductor structure includes a substrate, a redistribution layer (RDL) including a dielectric layer disposed over the substrate and a plurality of conductive members surrounded by the dielectric layer, a first conductive pillar disposed over and electrically connected with one of the plurality of conductive members, a second conductive pillar disposed over and electrically connected with one of the plurality of conductive member, a first die disposed over the RDL and electrically connected with the first conductive pillar, and a second die disposed over the RDL and electrically connected with the second conductive pillar, wherein a height of the second conductive pillar is substantially greater than a height of the first conductive pillar, and a thickness of the first die is substantially greater than a thickness of the second die.
    Type: Application
    Filed: June 15, 2016
    Publication date: December 21, 2017
    Inventors: CHI-YANG YU, KUAN-LIN HO, CHIN-LIANG CHEN, YU-MIN LIANG
  • ENERGY MONITORING METHODS AND BATTERY DEVICES
    Publication number: 20170351317
    Abstract: According to various embodiments, an energy monitoring method may be provided. The energy monitoring method may include: determining internal energy information indicating a charge state of an internal battery of a computing device; wirelessly receiving external energy information indicating a charge state of an external battery for the computing device; determining a combined energy information indicating a combined charge state of the internal battery and external battery based on the internal energy information and based on the external energy information; and providing a notification to a user of the computing device based on the combined energy information.
    Type: Application
    Filed: December 23, 2014
    Publication date: December 7, 2017
    Inventor: Min-Liang Tan
  • Systems and methods for presenting visual interface content
    Patent number: 9817442
    Abstract: A method for presenting visual interface content comprising adjunct visual interface content during application program execution, and the adjunct visual interface content provides visual information associated with application program execution. The method comprising displaying the adjunct visual interface content using a first interface, displaying the adjunct visual interface content using a second interface, and displaying the updated adjunct visual interface content on the at least one of the first and second interfaces based on actuation of the first and second interfaces.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: November 14, 2017
    Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.
    Inventor: Min-Liang Tan
  • RNAi molecule delivery platform based on single-siRNA and shRNA nanocapsules
    Patent number: 9782357
    Abstract: Novel siRNA and shRNA nanocapsules and delivery methods are disclosed herein. These siRNA and shRNA nanocapsules and delivery methods are highly robust and effective. This invention provides a platform for RNAi delivery with low toxicity and long intracellular half-life for practical therapeutic applications.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 10, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Yunfeng Lu, Irvin S. Y. Chen, Ming Yan, Min Liang, Masakazu Kamata, Jing Wen
  • Mutant vaccinia virus strains, uses thereof and method of producing the same
    Patent number: 9765305
    Abstract: The present disclosure provides mutant vaccinia virus strains that can selectively replicate in tumor cells. The present disclosure also provides use of the mutant vaccinia virus strains for preventing and treating tumors.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: September 19, 2017
    Assignee: TOT SHANGHAI R&D CENTER CO., LTD.
    Inventors: Li Qin, Min Liang, David H. Evans
  • Substrate design for semiconductor packages and method of forming same
    Patent number: 9768090
    Abstract: An embodiment device package includes a package substrate and a first and a second die bonded to the package substrate. The package substrate includes a build-up portion comprising a first contact pad and a plurality of bump pads. The package substrate further includes an organic core attached to the build-up portion, a through-via electrically connected to the first contact pad and extending through the organic core, a second contact pad on the through-via, a connector on the second contact pad, and a cavity extending through the organic core. The cavity exposes the plurality of bump pads, and the first die is disposed on the cavity and is bonded to the plurality of bump pads.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: September 19, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Min Liang, Mirng-Ji Lii, Jiun Yi Wu
  • RECONFIGURABLE REFLECT-ARRAY TO REALIZE TASK-SPECIFIC COMPRESSIVE SENSING IN SCREENING APPLICATIONS
    Publication number: 20170254750
    Abstract: A threat detection system having a reconfigurable reflect-array and compressive sensing unit to effectively detect objects that are a threat is presented. A statistical library, having a wide range of threat and non-threat examples and capable of incorporating new examples while being used, is utilized by several optimization algorithms to calculate an optimal illumination pattern for compressive sensing detection. The reflect-array is configured to produce the optimal illumination pattern via a plurality of reflect-array elements. In this way, a plurality of data may be parallel processed, thereby increasing the detection speed and reducing cost.
    Type: Application
    Filed: March 6, 2017
    Publication date: September 7, 2017
    Inventors: Hao Xin, Min Liang, Mark A. Neifeld, Tim Harvey
  • WATER QUALITY SENSOR SUITABLE FOR AUTOMATED PRODUCTION
    Publication number: 20170234848
    Abstract: A water quality sensor includes a housing having two hollow protruding portions, and a sensing module including a circuit board mounted inside the housing and having two positioning plates respectively positioned in the two hollow protruding portions, two identical connectors respectively mounted on the two positioning plates of the circuit board in reversed directions with a phase difference of 180 degrees therebetween, and a light emitter and a light receiver respectively mounted in the connectors to face toward each other for water quality detection. Thus, the invention allows the implementation of automated assembly to replace manual assembly, reducing the risk of human error, saving much labor and production costs, improving product quality and increasing product yield.
    Type: Application
    Filed: February 13, 2017
    Publication date: August 17, 2017
    Inventors: Chih-Teng CHENG, Fu-Min LIANG, Chin-Feng CHEN
  • Semiconductor structure including a substrate and a semiconductor chip with matching coefficients of thermal expansion
    Patent number: 9659881
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate comprising a recess portion filled with a conductive material; a conductive trace overlying and contacting the conductive material; a conductive pillar disposed on the conductive trace and over the recess portion of the substrate; and a semiconductor chip disposed on the conductive pillar, wherein the elastic modulus of the substrate is of about 3 to about 10 GPa at about 20 to about 30° C. and of about 1 to about 5 GPa at about 250 to about 270° C.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiun Yi Wu, Yu-Min Liang
  • SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20170133306
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate comprising a recess portion filled with a conductive material; a conductive trace overlying and contacting the conductive material; a conductive pillar disposed on the conductive trace and over the recess portion of the substrate; and a semiconductor chip disposed on the conductive pillar.
    Type: Application
    Filed: January 25, 2017
    Publication date: May 11, 2017
    Inventors: JIUN YI WU, YU-MIN LIANG
  • RADIO COMMUNICATION DEVICES AND METHODS FOR CONTROLLING A RADIO COMMUNICATION DEVICE
    Publication number: 20170118755
    Abstract: According to various embodiments, a radio communication device may be provided. The radio communication device may include: a plurality of light sources; a state determination circuit configured to determine an operation state of the radio communication device; an activation determination circuit configured to determine a respective activation state for each light source of the plurality of light sources based on the determined operation state; and a control circuit configured to control each light source of the plurality of light sources based on the respective activation state for the light source.
    Type: Application
    Filed: December 29, 2014
    Publication date: April 27, 2017
    Inventors: Min-Liang Tan, Sze Wei Joel Hong, Chee Oei Chan, Kah Yong Lee, Gregory James Breinholt
  • Semiconductor structure and method of manufacturing the same
    Patent number: 9589924
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate comprising a recess portion filled with a conductive material; a conductive trace overlying and contacting the conductive material; a conductive pillar disposed on the conductive trace and over the recess portion of the substrate; and a semiconductor chip disposed on the conductive pillar, wherein the conductive trace comprises a width WT and a thickness TT, the recess portion of the substrate comprises a width WR in the width direction of the conductive trace and a depth DR, and the ratio of WR to WT ranges from about 0.25 to about 1.8 and the ratio of DR to TT ranges from about 0.1 to about 3.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: March 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiun Yi Wu, Yu-Min Liang
  • Protrusion Bump Pads for Bond-on-Trace Processing
    Publication number: 20170053885
    Abstract: An embodiment apparatus includes a dielectric layer in a die, a conductive trace in the dielectric layer, and a protrusion bump pad on the conductive trace. The protrusion bump pad at least partially extends over the dielectric layer, and the protrusion bump pad includes a lengthwise axis and a widthwise axis. A ratio of a first dimension of the lengthwise axis to a second dimension of the widthwise axis is about 0.8 to about 1.
    Type: Application
    Filed: November 8, 2016
    Publication date: February 23, 2017
    Inventors: Chen-Shien Chen, Yu-Feng Chen, Yu-Wei Lin, Tin-Hao Kuo, Yu-Min Liang, Chun-Hung Lin
  • Method for outputting a modified audio signal and graphical user interfaces produced by an application program
    Patent number: 9569073
    Abstract: According to various embodiments, a method for outputting a modified audio signal may be provided. The method may include: receiving from a user an input indicating an angle; determining a parameter for a head-related transfer function based on the received input indicating the angle; modifying an audio signal in accordance with the head-related transfer function based on the determined parameter; and outputting the modified audio signal.
    Type: Grant
    Filed: November 22, 2012
    Date of Patent: February 14, 2017
    Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.
    Inventor: Min-Liang Tan
  • STEREO DISPLAY SYSTEM AND METHOD FOR ENDOSCOPE USING SHAPE-FROM-SHADING ALGORITHM
    Publication number: 20170035268
    Abstract: A stereo display system using shape from shading algorithm is an image conversion device connected between a monoscopic endoscope and a 3D monitor. The system applies the algorithm which generates a depth map for a 2D image of video frames. The algorithm first calculates a direction of a light source for the 2D image and based upon the information of light distribution and shading for the 2D image to generate the depth map. The depth map is used to calculate another view of the original 2D image by depth image based rendering algorithm in generation of stereoscopic images. After the new view is rendered, the stereo display system also needs to convert the display format of the stereoscopic images for different kinds of 3D displays. Base on this method, it is necessary to replace the whole monoscopic endoscope with a stereo-endoscope system and no modification is required for the monoscopic endoscope.
    Type: Application
    Filed: August 7, 2015
    Publication date: February 9, 2017
    Applicant: MING SHI CO., LTD.
    Inventors: Atul Kumar, Yen-Yu WANG, Kai-Che LIU, Min-Liang WANG, Ching-Jen WU
  • Package having substrate with embedded metal trace overlapped by landing pad
    Patent number: 9559076
    Abstract: An embodiment package includes a conductive pillar mounted on an integrated circuit chip, the conductive pillar having a stepper shape, a metal trace partially embedded in a substrate, the metal trace having a bonding pad portion protruding from the substrate, and a solder feature electrically coupling the conductive pillar to the bonding pad portion of the metal trace.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mirng-Ji Lii, Yu-Min Liang, Yu-Feng Chen
  • Wristband
    Patent number: D789929
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: June 20, 2017
    Assignee: RAZER (ASIA-PACIFIC) PTE. LTD.
    Inventors: Min-Liang Tan, Francois Laine, Stephane Blanchard, Yusuf Ali Roland