Abstract: The invention provides novel methods, materials and systems that can be used to generate viral vectors having altered tissue and cell targeting abilities. In illustrative embodiments of the invention, the specificity of lentiviral vectors was modulated by a thin polymer shell that synthesized and coupled to the viral envelope in situ. The polymer shell can confers such vectors with new targeting ability via agents such as cyclic RGD (cRGD) peptides that are coupled to the polymer shell. These polymer encapsulated viral vectors exhibit a number of highly desirable characteristics including a higher thermal stability, resistance to serum inactivation in vivo, and an ability to infect dividing and non-dividing cells with high efficiencies.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate comprising a recess portion filled with a conductive material; a conductive trace overlying and contacting the conductive material; a conductive pillar disposed on the conductive trace and over the recess portion of the substrate; and a semiconductor chip disposed on the conductive pillar.

Abstract: A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.

Abstract: An integrated fan-out package includes a die, an encapsulant, a redistribution structure, a plurality of conductive pillars, a seed layer, and a plurality of conductive bumps. The encapsulant encapsulates the die. The redistribution structure is over the die and the encapsulant. The redistribution structure is electrically connected to the die and includes a plurality of dielectric layers that are sequentially stacked and a plurality of conductive patterns sandwiched between the dielectric layers. A Young's modulus of the dielectric layer farthest away from the die is higher than a Young's modulus of each of the rest of the dielectric layers. The conductive patterns are electrically connected to each other. The conductive pillars are disposed on and electrically connected to the redistribution structure. The seed layer is located between the conductive pillars and the redistribution structure. The conductive bumps are disposed on the plurality of conductive pillars.

Abstract: A packaging structure and a method of forming a packaging structure are provided. The packaging structure, such as an interposer, is formed by optionally bonding two carrier substrates together and simultaneously processing two carrier substrates. The processing includes forming a sacrificial layer over the carrier substrates. Openings are formed in the sacrificial layers and pillars are formed in the openings. Substrates are attached to the sacrificial layer. Redistribution lines may be formed on an opposing side of the substrates and vias may be formed to provide electrical contacts to the pillars. A debond process may be performed to separate the carrier substrates. Integrated circuit dies may be attached to one side of the redistribution lines and the sacrificial layer is removed.

Abstract: According to an exemplary embodiment, a substrate having a first area and a second area is provided. The substrate includes a plurality of pads. Each of the pads has a pad size. The pad size in the first area is larger than the pad size in the second area.

Abstract: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a substrate including a gate structure separating source and drain (S/D) features. The semiconductor device further includes a first dielectric layer formed over the substrate, the first dielectric layer including a first interconnect structure in electrical contact with the S/D features. The semiconductor device further includes an intermediate layer formed over the first dielectric layer, the intermediate layer having a top surface that is substantially coplanar with a top surface of the first interconnect structure. The semiconductor device further includes a second dielectric layer formed over the intermediate layer, the second dielectric layer including a second interconnect structure in electrical contact with the first interconnect structure and a third interconnect structure in electrical contact with the gate structure.

Abstract: A package includes a package substrate, which includes a middle layer selected from the group consisting of a core and a middle metal layer, a top metal layer overlying the middle layer, and a bottom metal layer underlying the middle layer. All metal layers overlying the middle layer have a first total metal density that is equal to a sum of all densities of all metal layers over the middle layer. All metal layers underlying the middle layer have a second total metal density that is equal to a sum of all densities of all metal layers under the middle layer. An absolute value of a difference between the first total metal density and the second total metal density is lower than about 0.1.

Abstract: In some embodiments, a package substrate for a semiconductor device includes a substrate core and a material layer disposed over the substrate core. The package substrate includes a spot-faced aperture disposed in the substrate core and the material layer.

Abstract: An embodiment apparatus includes a dielectric layer, a conductive trace in the dielectric layer, and a bump pad. The conductive trace includes a first portion having an exposed top surface, wherein the exposed top surface is recessed from a top surface of the dielectric layer. Furthermore, the bump pad is disposed over and is electrically connected to a second portion of the conductive trace.

Abstract: A parameter processing method, an audio signal playing method and device of an audio equalizer, and an audio equalizer are provided. The parameter processing method includes: acquiring a current parameter preset set and a predetermined target parameter preset set of the audio equalizer, linearly processing at least a part of parameters in the current parameter preset set, to enable the parameters processed linearly to be identical to target parameters in the target parameter preset set.

Abstract: Most computer operating systems are able to automatically configure the coupled computer peripheral device for use with the computer operating system without the need for installation of a specific driver. However, when these peripheral devices are detected by the computing system, a generic UI control configuration is often assigned to them and whatever customized settings previously configured by the user will be lost and replaced with a new set of unfamiliar setting. This poses much inconvenience and hassle to gamers when they use a different computing system or machine. Described according to an embodiment of the invention is a profile management method, operating on a computing cloud, comprising steps for receiving client data provided by a computing system detecting coupling of a user-interface (UI) thereto and for retrieving configuration data corresponding to the client data for use in configuring the UI by the computing system.

Abstract: Most computer operating systems are able to automatically configure the coupled computer peripheral audio device for use with the computer operating system without the need for installation of a specific driver. However, when these computer peripheral audio devices are detected by the computing system, a generic audio device control configuration is often assigned to them and whatever customised settings previously configured by the user will be lost and replaced with a new set of unfamiliar setting. This poses much inconvenience and hassle to gainers when they use a different computing system or machine. Described according to an embodiment of the invention is a headset device and a device profile management method, operating on a computing cloud, comprising steps for receiving client data provided by a computing system detecting coupling of an audio device thereto and for retrieving configuration data corresponding to the client data for use in configuring the audio device by the computing system.

Abstract: A packaging structure and a method of forming a packaging structure are provided. The packaging structure, such as an interposer, is formed by optionally bonding two carrier substrates together and simultaneously processing two carrier substrates. The processing includes forming a sacrificial layer over the carrier substrates. Openings are formed in the sacrificial layers and pillars are formed in the openings. Substrates are attached to the sacrificial layer. Redistribution lines may be formed on an opposing side of the substrates and vias may be formed to provide electrical contacts to the pillars. A debond process may be performed to separate the carrier substrates. Integrated circuit dies may be attached to one side of the redistribution lines and the sacrificial layer is removed.

Abstract: A method for manufacturing a semiconductor structure is disclosed. The method includes: providing a semiconductor substrate having a plurality of dies thereon; dispensing an underfill material and a molding compound to fill spaces beneath and between the dies; disposing a temporary carrier over the dies; thinning a thickness of the semiconductor substrate; performing back side metallization upon the thinned semiconductor substrate; removing the temporary carrier; and attaching a plate over the dies. An associated semiconductor structure is also disclosed.

Abstract: In some embodiments, a package substrate for a semiconductor device includes a substrate core and a material layer disposed over the substrate core. The package substrate includes a spot-faced aperture disposed in the substrate core and the material layer.

Abstract: An embodiment apparatus includes a dielectric layer in a die, a conductive trace in the dielectric layer, and a protrusion bump pad on the conductive trace. The protrusion bump pad at least partially extends over the dielectric layer, and the protrusion bump pad includes a lengthwise axis and a widthwise axis. A ratio of a first dimension of the lengthwise axis to a second dimension of the widthwise axis is about 0.8 to about 1.2.