Abstract: A display apparatus includes a light source, a display panel, a light guide member, and an optical member. The light source is configured to generate light. The display panel is configured to display an image. The light guide member includes at least one surface adjacent to the light source. The optical member is between the light guide member and the display panel. The optical member includes a low refractive layer, a first cover layer, and a light conversion layer. The low refractive layer is on a light output surface of the light guide member and includes side surfaces. The first cover layer is on the low refractive layer and surrounds at least a portion of the side surfaces of the low refractive layer. The light conversion layer is on the first cover layer and is configured to covert a wavelength band of incident light.

Abstract: A simulation method and simulator for a system including a plurality of microring resonators, where the simulation method includes converting the plurality of microring resonators into an equivalent model, generating a virtual system including the equivalent model, inputting an input signal to the virtual system, and outputting an output signal from the virtual system.

Abstract: A personal mobility device includes a frame connected to at least one wheel, a connection part on the frame, a boarding part connected to the connection part to be tiltable, a first sensor disposed on the frame to measure an inclination of the frame, and a second sensor disposed on the boarding part to measure an inclination of the boarding part.

Abstract: The present disclosure relates to a supporting member for a display device, a display device including the same, and a manufacturing method of a supporting member for a display device. The supporting member for the display device according to an embodiment includes: a first region and a second region, and a third region positioned between the first region and the second region and made of a non-metal material. The supporting member includes a plurality of patterns positioned in the third region and adjacent to one another along a first direction and a second direction perpendicular to the first direction, where each of the plurality of patterns extends along the second direction.

Abstract: A semiconductor device including a memory device which has improved reliability is provided. The semiconductor device comprises at least one data pin configured to transfer a data signal, at least one command address pin configured to transfer a command and an address, at least one serial pin configured to transfer a serial data signal, and processing circuitry connected to the at least one data pin and the at least one serial pin. The processing circuitry is configured to receive the data signal from outside through the at least one data pin, and the processing circuitry is configured to output the serial data signal through the at least one serial pin in response to the received data signal.

Abstract: A touch display device for preventing the occurrence of a short circuit between routing lines is disclosed. The touch display device includes a dam forming a boundary with an encapsulation unit covering a light-emitting element, and the dam is formed such that the height thereof in a region that overlaps routing lines, which are connected to touch electrodes disposed on the encapsulation unit, and the height thereof in a region that does not overlap the routing lines are different from each other, thereby preventing the occurrence of a short circuit between the routing lines.

Abstract: An electrode loss measuring apparatus includes an electrode which moves in a roll-to-roll state between an unwinder and a rewinder and on which a plurality of reference points are marked at predetermined intervals . The apparatus further includes a reference point detector configured to detect the reference points marked on the electrode, a position measurer configured to derive a position value of the electrode according to a rotation amount of the unwinder or the rewinder and a position value of the corresponding reference point in conjunction with the reference point detector when the reference point detector detects the reference point, and a calculator configured to calculate a loss amount of the electrode by comparing the derived position value of the reference point with a position value of a set reference point when an interval between the reference points is changed due to a loss of a portion of the electrode.

Abstract: A roll map coordinate correction system simulating an electrode moving in a roll-to-roll state between an unwinder and a rewinder includes a position expressed as a coordinate in a length direction of the simulated electrode, an encoder configured to derive the position of the electrode according to rotation amounts of the unwinder and the rewinder, and a seam detection sensor configured to detect a seam connection member and acquire a coordinate of the seam connection member in conjunction with the encoder. The system includes a reference point detector configured to detect a plurality of reference points marked on the electrode and acquire coordinates of the reference points in conjunction with the encoder, and a roll map coordinate corrector wherein, the roll map coordinate corrector determines a roll map correction direction by comparing encoder values, calculates an electrode breakage length by comparing coordinates and corrects the coordinates of the roll map.

Abstract: An integrated circuit including: a first cell including first-a and second-a output pins, a first routing wire connecting the first-a output pin to the second-a output pin, a first-a via connecting the first-a output pin to the first routing wire, and a second-a via connecting the second-a output pin to the first routing wire; and a second cell including first-b and second-b output pins, a second routing wire connecting the first-b output pin to the second-b output pin, a first-b via connecting the first-b output pin to the second routing wire, and a second-b via connecting the second-b output pin to the second routing wire, wherein the first-a via is at a first-a position, the second-a via is at a second-a position, the first-b via is at a first-b position, the second-b via is at a second-b position different from each other.

Abstract: According to an embodiment, a painless syringe with an anti-slip structure for perforating an alveolar bone and injecting an anesthetic comprises an injecting part having a needle for perforating the alveolar bone and injecting the anesthetic, a holder having a first end coupled with the injecting part and a second end open and empty, an ampoule formed to be inserted into the holder and having a first end into which the needle of the injecting part is inserted and a second end having a piston for discharging the anesthetic, a housing formed to receive the holder and having a through hole to expose the first end of the holder to an outside, and a handpiece coupled with the housing, rotating the ampoule, the holder, and the injecting part to perforate the alveolar bone, and pressing the piston to inject the anesthetic.

Abstract: According to an embodiment, a painless syringe for reducing noise and friction caused when perforating an alveolar bone comprises an injecting part having a needle for perforating the alveolar bone and injecting an anesthetic, a holder having a first end coupled with the injecting part and a second end open and empty, an ampoule formed to be inserted into the holder and having a first end into which the needle of the injecting part is inserted and a second end having a piston for discharging the anesthetic, a housing formed to receive the holder and having a through hole to expose the first end of the holder to an outside, and a handpiece coupled with the housing, rotating the ampoule, the holder, and the injecting part to perforate the alveolar bone, and pressing the piston to inject the anesthetic.

Abstract: Provided are a latency prediction method and a computing device for the same. The latency prediction method includes receiving a deep learning model and predicting on-device latency of the received deep learning model using a latency predictor which is trained on the basis of a latency lookup table. The latency lookup table includes information on single neural network layers and latency information of the single neural network layers on an edge device.

Abstract: A mobility hub is composed of a plurality of layers and serves as a terminal of a ground mobility and an air mobility. The mobility hub includes: a ground layer provided with an entrance of the ground mobility; a port layer provided with a taking-off and landing site of the air mobility; and a middle layer provided between the ground layer and the port layer. The middle layer has the ground mobility elevating in a space with the ground layer, is provided with a plurality of connection slots to which the ground mobility is connected, and provides an activity space through the ground mobility if the ground mobility is coupled to the connection slot.

Abstract: A memory device including a plurality of memory cells, a peripheral circuit, and control logic. The peripheral circuit is configured to generate a plurality of operating voltages used in a memory operation, based on a target pump clock, and perform the memory operation by using the plurality of operating voltages. The control logic is configured to select the target pump clock among a plurality of pump clocks, based on a number of data bits which selected memory cells on which the memory operation is to be performed among the plurality of memory cells store, and control the peripheral circuit to perform the memory operation on the selected memory cells.

Abstract: A decorative print member and a display device including the decorative print member are provided. The decorative print member includes a base layer, a first decorative print pattern disposed on the base layer, and a shielding layer disposed over the first decorative print pattern. The first decorative print pattern includes a first decorative print layer disposed on the base layer, and a second decorative print layer disposed on the first decorative print layer. The shielding layer covers upper and side surfaces of the second decorative print layer, and a side surface of the first decorative print layer protrudes outwardly from the side surface of the second decorative print layer and a side surface of the shielding layer.

Abstract: A memory module includes a memory device configured to receive a first refresh command from a host, and perform a refresh operation in response to the first refresh command during a refresh time, and a computing unit configured to detect the first refresh command provided from the host to the memory device, and write a first error pattern at a first address of the memory device during the refresh time.

Abstract: A semiconductor circuit may include a first flip-flop configured to output a first input data as a first output signal in response to an inverted input clock signal, a second flip-flop configured to output a second input data as a second output signal in response to an input clock signal, a glitch-free circuit configured to receive the inverted input clock signal, the input clock signal, the first output signal, and the second output signal, and to determine a voltage level of a node on the basis of the inverted input clock signal, the input clock signal, the first output signal, and the second output signal, and an inverter configured to output an output clock signal obtained by inverting the voltage level of the node determined by the glitch-free circuit. The glitch-free circuit does not include a transistor having a gate connected to the node.

Abstract: A pulse-based flip flop circuit includes; a pulse generator generating a pulse signal and an inverted pulse signal, a scan hold buffer holding a scan input signal for a delay time, and a latch circuit including an intermediate node receiving one of a data signal and the scan input signal in response to a scan enable signal, the pulse signal and the inverted pulse signal. The pulse generator circuit includes; a direct path providing a clock signal as a direct path input to a NAND circuit, a delay path including a number of stages configured to delay the clock signal and provide a delayed clock signal as a delay path input to NAND circuit, wherein the NAND circuit performs a NAND operation on the direct path input and the delay path input to generate the inverted pulse signal, and a feedback path providing the pulse signal to a first stage among the number of stages of the delay path.

Abstract: The present disclosure relates to a supporting member for a display device, a display device including the same, and a manufacturing method of a supporting member for a display device. The supporting member for the display device according to an embodiment includes: a first region and a second region, and a third region positioned between the first region and the second region and made of a non-metal material. The supporting member includes a plurality of patterns positioned in the third region and adjacent to one another along a first direction and a second direction perpendicular to the first direction, where each of the plurality of patterns extends along the second direction.

Abstract: A semiconductor device includes first, second, and third power rails extending in a first direction on a substrate and sequentially spaced apart in a second direction intersecting the first direction. A fourth power rail extends in the first direction on the substrate between the first and third power rails. A first well of a first conductive type is displaced inside the substrate between the first and third power rails. Cells are continuously displaced between the first and third power rails and share the first well. The first and third power rails are provided with a first voltage, the second power rail is provided with a second voltage different from the first voltage, the fourth power rail is provided with a third voltage different from the first voltage and the second voltage, and the cells are provided with the third voltage from the fourth power rail.